URL
https://opencores.org/ocsvn/mac_layer_switch/mac_layer_switch/trunk
Subversion Repositories mac_layer_switch
[/] [mac_layer_switch/] [trunk/] [rtl/] [verilog/] [ethmac.vpj] - Rev 5
Go to most recent revision | Compare with Previous | Blame | View Log
<!DOCTYPE Project SYSTEM "http://www.slickedit.com/dtd/vse/9.0/vpj.dtd">
<Project
Version="9.0"
VendorName="SlickEdit"
WorkingDir=".">
<Config
Name="Release"
OutputFile=""
CompilerConfigName="Latest Version">
<Includes>
<Include Dir="%(INCLUDE)"/>
</Includes>
<Menu>
<Target
Name="Compile"
MenuCaption="&Compile"
CaptureOutputWith="ProcessBuffer"
SaveOption="SaveCurrent"
RunFromDir="%rw">
<Exec CmdLine="vlog %p%n%e"/>
</Target>
<Target
Name="Build"
MenuCaption="&Build"
CaptureOutputWith="ProcessBuffer"
SaveOption="SaveWorkspaceFiles"
RunFromDir="%rw">
<Exec CmdLine="nmake"/>
</Target>
<Target
Name="Rebuild"
MenuCaption="&Rebuild"
CaptureOutputWith="ProcessBuffer"
SaveOption="SaveWorkspaceFiles"
RunFromDir="%rw">
<Exec CmdLine="nmake /A"/>
</Target>
<Target
Name="Debug"
MenuCaption="&Debug"
SaveOption="SaveNone"
RunFromDir="%rw">
<Exec CmdLine="vsim"/>
</Target>
<Target
Name="Execute"
MenuCaption="E&xecute"
SaveOption="SaveNone"
RunFromDir="%rw">
<Exec CmdLine="vsim"/>
</Target>
</Menu>
</Config>
<Files>
<Folder
Name="Source Files"
Filters="*.v;*.verilog">
<F N="eth_clockgen.v"/>
<F N="eth_cop.v"/>
<F N="eth_crc.v"/>
<F N="eth_fifo.v"/>
<F N="eth_l3_checksum .v"/>
<F N="eth_maccontrol.v"/>
<F N="eth_macstatus.v"/>
<F N="eth_miim.v"/>
<F N="eth_outputcontrol.v"/>
<F N="eth_random.v"/>
<F N="eth_receivecontrol.v"/>
<F N="eth_register.v"/>
<F N="eth_registers.v"/>
<F N="eth_rxaddrcheck.v"/>
<F N="eth_rxcounters.v"/>
<F N="eth_rxethmac.v"/>
<F N="eth_rxstatem.v"/>
<F N="eth_shiftreg.v"/>
<F N="eth_spram_256x32.v"/>
<F N="eth_top.v"/>
<F N="eth_transmitcontrol.v"/>
<F N="eth_txcounters.v"/>
<F N="eth_txethmac.v"/>
<F N="eth_txstatem.v"/>
<F N="eth_wishbone.v"/>
<F N="ethmac.v"/>
<F N="ethmac_defines.v"/>
<F N="plu_moduls.v"/>
<F N="switch.v"/>
<F N="timescale.v"/>
<F N="xilinx_dist_ram_16x32.v"/>
</Folder>
<Folder
Name="Other Files"
Filters="">
<F N="BUGS"/>
<F N="ethmac.vpj"/>
<F N="ethmac.vpw"/>
<F N="ethmac.vpwhist"/>
<F N="ethmac.vtg"/>
<F N="TODO"/>
</Folder>
</Files>
</Project>
Go to most recent revision | Compare with Previous | Blame | View Log