Subversion Repositories mb-jpeg

############################################################################
## This system.ucf file is generated by Base System Builder based on the
## settings in the selected Xilinx Board Definition file. Please add other
## user constraints to this file based on customer design specifications.
############################################################################

Net sys_clk_pin LOC=AJ15;
Net sys_clk_pin IOSTANDARD = LVCMOS25;
Net sys_rst_pin LOC=AH5;
Net sys_rst_pin IOSTANDARD = LVTTL;
## System level constraints
Net sys_clk_pin TNM_NET = sys_clk_pin;
TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 10000 ps;
Net sys_rst_pin TIG;

## FPGA pin constraints
Net fpga_0_RS232_Uart_1_RX_pin LOC=AJ8;
Net fpga_0_RS232_Uart_1_RX_pin IOSTANDARD = LVCMOS25;
Net fpga_0_RS232_Uart_1_TX_pin LOC=AE7;
Net fpga_0_RS232_Uart_1_TX_pin IOSTANDARD = LVCMOS25;
Net fpga_0_RS232_Uart_1_TX_pin SLEW = SLOW;
Net fpga_0_RS232_Uart_1_TX_pin DRIVE = 12;
Net fpga_0_SysACE_CompactFlash_SysACE_CLK_pin LOC=AH15;
Net fpga_0_SysACE_CompactFlash_SysACE_CLK_pin PERIOD = 30000 ps;
Net fpga_0_SysACE_CompactFlash_SysACE_CLK_pin IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<0> LOC=AF21;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<0> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<0> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<0> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<1> LOC=AG21;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<1> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<1> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<1> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<2> LOC=AC19;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<2> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<2> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<2> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<3> LOC=AD19;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<3> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<3> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<3> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<4> LOC=AE22;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<4> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<4> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<4> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<5> LOC=AE21;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<5> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<5> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<5> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<6> LOC=AH22;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<6> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<6> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPA_pin<6> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<0> LOC=AE15;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<0> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<0> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<0> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<1> LOC=AD15;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<1> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<1> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<1> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<2> LOC=AG14;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<2> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<2> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<2> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<3> LOC=AF14;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<3> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<3> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<3> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<4> LOC=AE14;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<4> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<4> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<4> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<5> LOC=AD14;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<5> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<5> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<5> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<6> LOC=AC15;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<6> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<6> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<6> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<7> LOC=AB15;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<7> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<7> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<7> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<8> LOC=AJ9;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<8> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<8> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<8> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<9> LOC=AH9;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<9> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<9> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<9> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<10> LOC=AE10;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<10> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<10> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<10> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<11> LOC=AE9;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<11> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<11> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<11> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<12> LOC=AD12;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<12> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<12> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<12> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<13> LOC=AC12;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<13> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<13> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<13> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<14> LOC=AG10;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<14> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<14> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<14> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<15> LOC=AF10;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<15> IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<15> SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_MPD_pin<15> DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_CEN_pin LOC=AB16;
Net fpga_0_SysACE_CompactFlash_SysACE_CEN_pin IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_CEN_pin SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_CEN_pin DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_OEN_pin LOC=AD17;
Net fpga_0_SysACE_CompactFlash_SysACE_OEN_pin IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_OEN_pin SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_OEN_pin DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_WEN_pin LOC=AC16;
Net fpga_0_SysACE_CompactFlash_SysACE_WEN_pin IOSTANDARD = LVCMOS25;
Net fpga_0_SysACE_CompactFlash_SysACE_WEN_pin SLEW = SLOW;
Net fpga_0_SysACE_CompactFlash_SysACE_WEN_pin DRIVE = 8;
Net fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin LOC=AD16;
Net fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin IOSTANDARD = LVCMOS25;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<0> LOC=AC4;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<0> IOSTANDARD = LVTTL;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<0> SLEW = SLOW;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<0> DRIVE = 12;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<1> LOC=AC3;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<1> IOSTANDARD = LVTTL;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<1> SLEW = SLOW;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<1> DRIVE = 12;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<2> LOC=AA6;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<2> IOSTANDARD = LVTTL;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<2> SLEW = SLOW;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<2> DRIVE = 12;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<3> LOC=AA5;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<3> IOSTANDARD = LVTTL;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<3> SLEW = SLOW;
Net fpga_0_LEDs_4Bit_GPIO_IO_pin<3> DRIVE = 12;
Net fpga_0_DIPSWs_4Bit_GPIO_IO_pin<0> LOC=AC11;
Net fpga_0_DIPSWs_4Bit_GPIO_IO_pin<0> IOSTANDARD = LVCMOS25;
Net fpga_0_DIPSWs_4Bit_GPIO_IO_pin<1> LOC=AD11;
Net fpga_0_DIPSWs_4Bit_GPIO_IO_pin<1> IOSTANDARD = LVCMOS25;
Net fpga_0_DIPSWs_4Bit_GPIO_IO_pin<2> LOC=AF8;
Net fpga_0_DIPSWs_4Bit_GPIO_IO_pin<2> IOSTANDARD = LVCMOS25;
Net fpga_0_DIPSWs_4Bit_GPIO_IO_pin<3> LOC=AF9;
Net fpga_0_DIPSWs_4Bit_GPIO_IO_pin<3> IOSTANDARD = LVCMOS25;
Net fpga_0_PushButtons_5Bit_GPIO_IO_pin<0> LOC=AG5;
Net fpga_0_PushButtons_5Bit_GPIO_IO_pin<0> IOSTANDARD = LVTTL;
Net fpga_0_PushButtons_5Bit_GPIO_IO_pin<1> LOC=AH4;
Net fpga_0_PushButtons_5Bit_GPIO_IO_pin<1> IOSTANDARD = LVTTL;
Net fpga_0_PushButtons_5Bit_GPIO_IO_pin<2> LOC=AG3;
Net fpga_0_PushButtons_5Bit_GPIO_IO_pin<2> IOSTANDARD = LVTTL;
Net fpga_0_PushButtons_5Bit_GPIO_IO_pin<3> LOC=AH1;
Net fpga_0_PushButtons_5Bit_GPIO_IO_pin<3> IOSTANDARD = LVTTL;
Net fpga_0_PushButtons_5Bit_GPIO_IO_pin<4> LOC=AH2;
Net fpga_0_PushButtons_5Bit_GPIO_IO_pin<4> IOSTANDARD = LVTTL;