URL
https://opencores.org/ocsvn/mblite/mblite/trunk
Subversion Repositories mblite
[/] [mblite/] [trunk/] [designs/] [core_syn/] [sram_init.vhd] - Rev 10
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---------------------------------------------------------------------------------------------- -- -- Input file : sram_init.vhd -- Design name : sram_init -- Author : Tamar Kranenburg -- Company : Delft University of Technology -- : Faculty EEMCS, Department ME&CE -- : Systems and Circuits group -- -- Description : Single Port Synchronous Random Access Memory -- ---------------------------------------------------------------------------------------------- library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; library mblite; use mblite.std_Pkg.all; entity sram_init is generic ( WIDTH : integer := 32; SIZE : integer := 11 ); port ( dat_o : out std_logic_vector(WIDTH - 1 downto 0); dat_i : in std_logic_vector(WIDTH - 1 downto 0); adr_i : in std_logic_vector(SIZE - 1 downto 0); wre_i : in std_logic; ena_i : in std_logic; clk_i : in std_logic ); end sram_init; architecture arch of sram_init is type ram_type is array (0 to 2 ** SIZE - 1) of std_logic_vector(WIDTH - 1 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