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[/] [mcip_open/] [trunk/] [MCIPopen_XilinxISEproject/] [Reset_module.vhd] - Rev 4
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-------------------------------------------------------------------------------- -- Company: Ferhat Abbas University - Algeria -- Engineer: Ibrahim MEZZAH -- Progect Supervisor: Dr H. Chemali -- Create Date: 14:24:19 06/01/05 -- Design Name: Reset device -- Module Name: Rest_module - reset -- Project Name: Microcontroller IP (MCIP) -- Target Device: xc3s500e-4fg320 -- Tool versions: Xilinx ISE 9.1.03i -- Description: This module generate the global reset of the device (nreset). -- nreset is active (low) if one of following events occure: -- soft reset, stack overflow, Watchdog time out, external reset. -- Revision: 07/09/2008 -- Revision 3 - Extend a soft reset time. -------------------------------------------------------------------------------- library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity reset_module is Port ( clock : in std_logic; nExternal_reset : in std_logic; Soft_reset : in std_logic; WDT_reset : in std_logic; Stack_reset : in std_logic; nreset : out std_logic); end reset_module; architecture reset of reset_module is constant reset_counter_length : integer := 5; signal reset_enable : std_logic; signal reset_counter : std_logic_vector(reset_counter_length downto 1); signal disable_counter_value : std_logic_vector(reset_counter_length downto 1); begin disable_counter_value <= (others => '1'); Enabling_reset : process(nExternal_reset, clock, reset_counter, disable_counter_value, Soft_reset, WDT_reset, Stack_reset) begin if nExternal_reset = '0' then reset_enable <= '0'; else if clock'event and clock = '1' then if reset_counter = disable_counter_value then reset_enable <= '0'; else if Soft_reset = '1' or WDT_reset = '1' or Stack_reset = '1' then reset_enable <= '1'; else reset_enable <= reset_enable; end if; end if; else reset_enable <= reset_enable; end if; end if; end process; Counter : process(reset_enable, clock) begin if reset_enable = '0' then reset_counter <= (others => '0'); else if clock'event and clock = '1' then reset_counter <= reset_counter + "1"; else reset_counter <= reset_counter; end if; end if; end process; nreset <= '0' when ( nExternal_reset = '0' or reset_enable = '1') else '1'; end reset;