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--------------------------------------------------------------------------------
-- Company:        Ferhat Abbas University - Algeria
-- Engineer:       Ibrahim MEZZAH
-- Progect Supervisor: Dr H. Chemali
-- Create Date:    01:01:08 08/01/05
-- Design Name:    Block select block
-- Module Name:    Select_bloc - selection
-- Project Name:   Microcontroller IP (MCIP)
-- Target Device:  xc3s500e-4fg320
-- Tool versions:  Xilinx ISE 9.1.03i
-- Description:	 This module activate the block selected by the instruction
--						 for read or write operations.
-- Revision: 		 07/07/2008
-- Revision  1.2 - Add description
--------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
 
entity Selection_block is
    Port ( R_W        : in std_logic_vector(1 downto 0);
	 		  Address    : in  std_logic_vector(11 downto 0);
			  r_w_ram    : out std_logic_vector(1 downto 0);
			  r_w_add_pr : out std_logic_vector(1 downto 0);
--			  r_w_pc     : out std_logic_vector(1 downto 0);
			  r_w_opu    : out std_logic_vector(1 downto 0);
			  r_w_port   : out std_logic_vector(1 downto 0);
			  r_w_dec    : out std_logic_vector(1 downto 0);
--			  r_w_tmr0   : out std_logic_vector(1 downto 0);
--			  r_w_tmr1   : out std_logic_vector(1 downto 0);
--			  r_w_tbr    : out std_logic_vector(1 downto 0);
			  r_w_wdt    : out std_logic_vector(1 downto 0) );
end Selection_block;
 
architecture selection of Selection_block is
 
begin
 
	process(Address, R_W)
		begin
		  case Address is
			 -- address provider
--			 when X"EA" => r_w_add_pr <= R_W; -- FSR0H
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"E9" => r_w_add_pr <= R_W; -- FSR0L
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"E2" => r_w_add_pr <= R_W; -- FSR1H
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"E1" => r_w_add_pr <= R_W; -- FSR1L
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
			 when X"FE0" => r_w_add_pr <= R_W; -- BSR
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_port   <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
--			 when X"DA" => r_w_add_pr <= R_W; -- FSR2H
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"D9" => r_w_add_pr <= R_W; -- FSR2L
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
			 -- program counter
--			 when X"FF" => r_w_pc     <= R_W; -- POSU
--								r_w_add_pr <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"FE" => r_w_pc     <= R_W; -- TOSH
--								r_w_add_pr <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"FD" => r_w_pc     <= R_W; -- TOSL
--								r_w_add_pr <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"FC" => r_w_pc     <= R_W; -- STKPTR
--								r_w_add_pr <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"FB" => r_w_pc     <= R_W; -- PCLATU
--								r_w_add_pr <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"FA" => r_w_pc     <= R_W; -- PCLATH
--								r_w_add_pr <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"F9" => r_w_pc     <= R_W; -- PCL
--								r_w_add_pr <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
			 -- calcul unit
			 when X"FF4" => r_w_opu     <= R_W; -- PRODH
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_port   <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 when X"FF3" => r_w_opu     <= R_W; -- PRODL
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_port   <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 when X"FE8" => r_w_opu     <= R_W; -- WREG
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_port   <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 -- port
			 when X"F95" => r_w_port   <= R_W; -- TRISD
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 when X"F94" => r_w_port   <= R_W; -- TRISC
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 when X"F93" => r_w_port   <= R_W; -- TRISB
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 when X"F92" => r_w_port   <= R_W; -- TRISA
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 when X"F8C" => r_w_port   <= R_W; -- LATD
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 when X"F8B" => r_w_port   <= R_W; -- LATC
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 when X"F8A" => r_w_port   <= R_W; -- LATB
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 when X"F89" => r_w_port   <= R_W; -- LATA
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 when X"F83" => r_w_port   <= R_W; -- PORTD
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 when X"F82" => r_w_port   <= R_W; -- PORTC
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 when X"F81" => r_w_port   <= R_W; -- PORTB
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 when X"F80" => r_w_port   <= R_W; -- PORTA
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 -- decoder
--			 when X"F2" => r_w_dec    <= R_W; -- INTCON
--								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"F1" => r_w_dec    <= R_W; -- INTCON2
--								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"F0" => r_w_dec    <= R_W; -- INTCON3
--								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
			 when X"FD8" => r_w_dec    <= R_W; -- STATUS
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_port   <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 -- timer0
--			 when X"D7" => r_w_tmr0   <= R_W; -- TMR0H
--								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"D6" => r_w_tmr0   <= R_W; -- TMR0L
--								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"D5" => r_w_tmr0   <= R_W; -- T0CON
--								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 -- timer1
--			 when X"CF" => r_w_tmr1   <= R_W; -- TMR1H
--								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"CE" => r_w_tmr1   <= R_W; -- TMR1L
--								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
--			 when X"CD" => r_w_tmr1   <= R_W; -- T1CON
--								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
--								r_w_ram    <= "00";
			 -- watchdog
			 when X"FC0" => r_w_wdt    <= R_W; -- WDTCON
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_port   <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_tbr    <= "00";
								r_w_ram    <= "00";
			 -- table read
--			 when X"F8" => r_w_tbr    <= R_W; -- TBLPTRU
--								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_ram    <= "00";
--			 when X"F7" => r_w_tbr    <= R_W; -- TBLPTRH
--								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_ram    <= "00";
--			 when X"F6" => r_w_tbr    <= R_W; -- TBLPTRL
--								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_ram    <= "00";
--			 when X"F5" => r_w_tbr    <= R_W; -- TABLAT
--								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
--								r_w_opu     <= "00";
--								r_w_port   <= "00";
--								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
--								r_w_wdt    <= "00";
--								r_w_ram    <= "00";
			 -- ram
			 when others=> r_w_ram    <= R_W; -- RAM
								r_w_add_pr <= "00";
--								r_w_pc     <= "00";
								r_w_opu     <= "00";
								r_w_port   <= "00";
								r_w_dec    <= "00";
--								r_w_tmr0   <= "00";
--								r_w_tmr1   <= "00";
								r_w_wdt    <= "00";
--								r_w_tbr    <= "00";
		  end case;
		end process;
 
end selection;

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