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https://opencores.org/ocsvn/mesi_isc/mesi_isc/trunk
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[/] [mesi_isc/] [trunk/] [sim/] [a.out] - Rev 8
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#! /usr/bin/vvp:ivl_version "0.9.3 " "(v0_9_3)";:vpi_time_precision - 12;:vpi_module "system";:vpi_module "v2005_math";:vpi_module "va_math";S_0x90c59c0 .scope module, "mesi_isc_tb_cpu" "mesi_isc_tb_cpu" 2 48;.timescale -9 -12;P_0x90d529c .param/l "ADDR_WIDTH" 2 70, +C4<0100000>;P_0x90d52b0 .param/l "BREQ_FIFO_SIZE" 2 77, +C4<010>;P_0x90d52c4 .param/l "BREQ_FIFO_SIZE_LOG2" 2 78, +C4<01>;P_0x90d52d8 .param/l "BROAD_ID_WIDTH" 2 73, +C4<0101>;P_0x90d52ec .param/l "BROAD_REQ_FIFO_SIZE" 2 74, +C4<0100>;P_0x90d5300 .param/l "BROAD_REQ_FIFO_SIZE_LOG2" 2 75, +C4<010>;P_0x90d5314 .param/l "BROAD_TYPE_WIDTH" 2 72, +C4<010>;P_0x90d5328 .param/l "CBUS_CMD_WIDTH" 2 69, +C4<011>;P_0x90d533c .param/l "CPU_ID" 2 68, +C4<0>;P_0x90d5350 .param/l "DATA_WIDTH" 2 71, +C4<0100000>;P_0x90d5364 .param/l "MBUS_CMD_WIDTH" 2 76, +C4<010>;v0x90d5d78_0 .var "c_addr", 31 0;v0x90fee40_0 .var "c_state", 3 0;v0x90feea0_0 .var "cbus_ack_o", 0 0;v0x90fef00_0 .net "cbus_addr_i", 31 0, C4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; 0 driversv0x90fef60_0 .net "cbus_cmd_i", 2 0, C4<zzz>; 0 driversv0x90fefc0_0 .net "clk", 0 0, C4<z>; 0 driversv0x90ff040_0 .var/i "i", 31 0;v0x90ff0a0_0 .var "m_addr", 31 0;v0x90ff128_0 .var "m_state", 3 0;v0x90ff188_0 .var "m_state_c_state_priority", 0 0;v0x90ff218_0 .net "mbus_ack_i", 0 0, C4<z>; 0 driversv0x90ff278_0 .var "mbus_addr_o", 31 0;v0x90ff310_0 .var "mbus_cmd_o", 1 0;v0x90ff370_0 .net "mbus_data_i", 31 0, C4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; 0 driversv0x90ff410_0 .var "mbus_data_o", 31 0;v0x90ff470 .array "mem", 0 9, 31 0;v0x90ff508 .array "mem_state", 0 9, 2 0;v0x90ff558_0 .var "rd_proc_addr", 31 0;v0x90ff5f8_0 .var "rd_proc_wait_for_en", 0 0;v0x90ff648_0 .net "rst", 0 0, C4<z>; 0 driversv0x90ff5a8_0 .var "tb_ins_ack_o", 0 0;v0x90ff6f0_0 .net "tb_ins_addr_i", 31 0, C4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; 0 driversv0x90ff7a0_0 .net "tb_ins_i", 31 0, C4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; 0 driversv0x90ff7f0_0 .var "wr_data", 31 0;v0x90ff740_0 .var "wr_proc_addr", 31 0;v0x90ff8a8_0 .var "wr_proc_wait_for_en", 0 0;E_0x90cb4d8 .event posedge, v0x90ff648_0, v0x90fefc0_0;.scope S_0x90c59c0;T_0 ;%set/v v0x90ff040_0, 0, 32;T_0.0 ;%load/v 8, v0x90ff040_0, 32;%cmpi/s 8, 10, 32;%jmp/0xz T_0.1, 5;%ix/getv/s 3, v0x90ff040_0;%jmp/1 t_0, 4;%ix/load 1, 0, 0;%set/av v0x90ff470, 0, 32;t_0 ;%ix/getv/s 3, v0x90ff040_0;%jmp/1 t_1, 4;%ix/load 1, 0, 0;%set/av v0x90ff508, 0, 3;t_1 ;%ix/load 0, 1, 0;%load/vp0/s 8, v0x90ff040_0, 32;%set/v v0x90ff040_0, 8, 32;%jmp T_0.0;T_0.1 ;%end;.thread T_0;.scope S_0x90c59c0;T_1 ;%wait E_0x90cb4d8;%load/v 8, v0x90ff648_0, 1;%jmp/0xz T_1.0, 8;%ix/load 0, 1, 0;%assign/v0 v0x90ff188_0, 0, 0;%jmp T_1.1;T_1.0 ;%load/v 8, v0x90ff188_0, 1;%mov 9, 0, 1;%inv 8, 2;%cmpi/u 8, 0, 2;%or 5, 4, 1;%mov 8, 5, 1;%ix/load 0, 1, 0;%assign/v0 v0x90ff188_0, 0, 8;T_1.1 ;%jmp T_1;.thread T_1;.scope S_0x90c59c0;T_2 ;%wait E_0x90cb4d8;%load/v 8, v0x90ff648_0, 1;%jmp/0xz T_2.0, 8;%ix/load 0, 4, 0;%assign/v0 v0x90ff128_0, 0, 0;%ix/load 0, 1, 0;%assign/v0 v0x90ff5a8_0, 0, 0;%ix/load 0, 32, 0;%assign/v0 v0x90ff7f0_0, 0, 0;%ix/load 0, 2, 0;%assign/v0 v0x90ff310_0, 0, 0;%ix/load 0, 1, 0;%assign/v0 v0x90ff8a8_0, 0, 0;%ix/load 0, 32, 0;%assign/v0 v0x90ff740_0, 0, 0;%ix/load 0, 1, 0;%assign/v0 v0x90ff5f8_0, 0, 0;%ix/load 0, 32, 0;%assign/v0 v0x90ff558_0, 0, 0;%jmp T_2.1;T_2.0 ;%load/v 8, v0x90ff128_0, 4;%cmpi/u 8, 0, 4;%jmp/1 T_2.2, 6;%cmpi/u 8, 1, 4;%jmp/1 T_2.3, 6;%cmpi/u 8, 2, 4;%jmp/1 T_2.4, 6;%cmpi/u 8, 3, 4;%jmp/1 T_2.5, 6;%cmpi/u 8, 4, 4;%jmp/1 T_2.6, 6;%jmp T_2.7;T_2.2 ;%ix/load 0, 1, 0;%assign/v0 v0x90ff5a8_0, 0, 0;%load/v 8, v0x90fee40_0, 4;%mov 12, 0, 1;%cmpi/u 8, 0, 5;%inv 4, 1;%mov 8, 4, 1;%load/v 9, v0x90ff188_0, 1;%inv 9, 1;%or 8, 9, 1;%jmp/0xz T_2.8, 8;%ix/load 0, 4, 0;%assign/v0 v0x90ff128_0, 0, 0;%jmp T_2.9;T_2.8 ;%load/v 8, v0x90ff7a0_0, 32;%cmpi/u 8, 1, 32;%mov 8, 4, 1;%load/v 9, v0x90ff7a0_0, 32;%cmpi/u 9, 2, 32;%mov 9, 4, 1;%or 8, 9, 1;%jmp/0xz T_2.10, 8;%load/v 8, v0x90ff6f0_0, 32;%ix/load 0, 32, 0;%assign/v0 v0x90ff0a0_0, 0, 8;%ix/getv 3, v0x90ff6f0_0;%load/av 8, v0x90ff508, 3;%cmpi/u 8, 0, 3;%jmp/1 T_2.12, 6;%cmpi/u 8, 1, 3;%jmp/1 T_2.13, 6;%cmpi/u 8, 2, 3;%jmp/1 T_2.14, 6;%cmpi/u 8, 3, 3;%jmp/1 T_2.15, 6;%jmp T_2.16;T_2.12 ;%load/v 8, v0x90ff7a0_0, 32;%cmpi/u 8, 1, 32;%mov 8, 4, 1;%jmp/0 T_2.17, 8;%movi 9, 1, 4;%jmp/1 T_2.19, 8;T_2.17 ; End of true expr.%movi 13, 2, 4;%jmp/0 T_2.18, 8;; End of false expr.%blend 9, 13, 4; Condition unknown.%jmp T_2.19;T_2.18 ;%mov 9, 13, 4; Return false valueT_2.19 ;%ix/load 0, 4, 0;%assign/v0 v0x90ff128_0, 0, 9;%jmp T_2.16;T_2.13 ;%load/v 8, v0x90ff7a0_0, 32;%cmpi/u 8, 1, 32;%mov 8, 4, 1;%jmp/0 T_2.20, 8;%movi 9, 1, 4;%jmp/1 T_2.22, 8;T_2.20 ; End of true expr.%movi 13, 2, 4;%jmp/0 T_2.21, 8;; End of false expr.%blend 9, 13, 4; Condition unknown.%jmp T_2.22;T_2.21 ;%mov 9, 13, 4; Return false valueT_2.22 ;%ix/load 0, 4, 0;%assign/v0 v0x90ff128_0, 0, 9;%jmp T_2.16;T_2.14 ;%load/v 8, v0x90ff7a0_0, 32;%cmpi/u 8, 1, 32;%jmp/0xz T_2.23, 4;%ix/load 0, 1, 0;%assign/v0 v0x90ff8a8_0, 0, 1;%load/v 8, v0x90ff6f0_0, 32;%ix/load 0, 32, 0;%assign/v0 v0x90ff740_0, 0, 8;%movi 8, 3, 4;%ix/load 0, 4, 0;%assign/v0 v0x90ff128_0, 0, 8;%jmp T_2.24;T_2.23 ;%movi 8, 2, 4;%ix/load 0, 4, 0;%assign/v0 v0x90ff128_0, 0, 8;T_2.24 ;%jmp T_2.16;T_2.15 ;%load/v 8, v0x90ff7a0_0, 32;%cmpi/u 8, 1, 32;%jmp/0xz T_2.25, 4;%ix/load 0, 1, 0;%assign/v0 v0x90ff8a8_0, 0, 1;%load/v 8, v0x90ff6f0_0, 32;%ix/load 0, 32, 0;%assign/v0 v0x90ff740_0, 0, 8;%movi 8, 3, 4;%ix/load 0, 4, 0;%assign/v0 v0x90ff128_0, 0, 8;%jmp T_2.26;T_2.25 ;%ix/load 0, 1, 0;%assign/v0 v0x90ff5f8_0, 0, 1;%load/v 8, v0x90ff6f0_0, 32;%ix/load 0, 32, 0;%assign/v0 v0x90ff558_0, 0, 8;%movi 8, 4, 4;%ix/load 0, 4, 0;%assign/v0 v0x90ff128_0, 0, 8;T_2.26 ;%jmp T_2.16;T_2.16 ;T_2.10 ;T_2.9 ;%jmp T_2.7;T_2.3 ;%ix/getv 3, v0x90ff0a0_0;%jmp/1 t_2, 4;%ix/load 0, 3, 0; word width%ix/load 1, 0, 0; part off%assign/av v0x90ff508, 0, 0;t_2 ;%load/v 8, v0x90ff7f0_0, 32;%ix/getv 3, v0x90ff0a0_0;%jmp/1 t_3, 4;%ix/load 1, 0, 0;%set/av v0x90ff470, 8, 8;t_3 ;%load/v 8, v0x90ff7f0_0, 32;%mov 40, 0, 1;%addi 8, 1, 33;%ix/load 0, 32, 0;%assign/v0 v0x90ff7f0_0, 0, 8;%ix/load 0, 4, 0;%assign/v0 v0x90ff128_0, 0, 0;%ix/load 0, 1, 0;%assign/v0 v0x90ff5a8_0, 0, 1;%jmp T_2.7;T_2.4 ;%ix/load 0, 4, 0;%assign/v0 v0x90ff128_0, 0, 0;%ix/load 0, 1, 0;%assign/v0 v0x90ff5a8_0, 0, 1;%jmp T_2.7;T_2.5 ;%movi 8, 1, 2;%ix/load 0, 2, 0;%assign/v0 v0x90ff310_0, 0, 8;%load/v 8, v0x90ff0a0_0, 32;%ix/load 0, 32, 0;%assign/v0 v0x90ff278_0, 0, 8;%load/v 8, v0x90ff218_0, 1;%jmp/0xz T_2.27, 8;%ix/load 0, 4, 0;%assign/v0 v0x90ff128_0, 0, 0;%ix/load 0, 1, 0;%assign/v0 v0x90ff5a8_0, 0, 1;%jmp T_2.28;T_2.27 ;%movi 8, 3, 4;%ix/load 0, 4, 0;%assign/v0 v0x90ff128_0, 0, 8;T_2.28 ;%jmp T_2.7;T_2.6 ;%movi 8, 2, 2;%ix/load 0, 2, 0;%assign/v0 v0x90ff310_0, 0, 8;%load/v 8, v0x90ff0a0_0, 32;%ix/load 0, 32, 0;%assign/v0 v0x90ff278_0, 0, 8;%load/v 8, v0x90ff218_0, 1;%jmp/0xz T_2.29, 8;%ix/load 0, 4, 0;%assign/v0 v0x90ff128_0, 0, 0;%ix/load 0, 1, 0;%assign/v0 v0x90ff5a8_0, 0, 1;%jmp T_2.30;T_2.29 ;%movi 8, 3, 4;%ix/load 0, 4, 0;%assign/v0 v0x90ff128_0, 0, 8;T_2.30 ;%jmp T_2.7;T_2.7 ;T_2.1 ;%jmp T_2;.thread T_2;.scope S_0x90c59c0;T_3 ;%wait E_0x90cb4d8;%load/v 8, v0x90ff648_0, 1;%jmp/0xz T_3.0, 8;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 0;%ix/load 0, 1, 0;%assign/v0 v0x90feea0_0, 0, 0;%jmp T_3.1;T_3.0 ;%load/v 8, v0x90fee40_0, 4;%cmpi/u 8, 0, 4;%jmp/1 T_3.2, 6;%cmpi/u 8, 1, 4;%jmp/1 T_3.3, 6;%cmpi/u 8, 2, 4;%jmp/1 T_3.4, 6;%cmpi/u 8, 3, 4;%jmp/1 T_3.5, 6;%cmpi/u 8, 4, 4;%jmp/1 T_3.6, 6;%cmpi/u 8, 5, 4;%jmp/1 T_3.7, 6;%cmpi/u 8, 6, 4;%jmp/1 T_3.8, 6;%cmpi/u 8, 7, 4;%jmp/1 T_3.9, 6;%jmp T_3.10;T_3.2 ;%ix/load 0, 1, 0;%assign/v0 v0x90feea0_0, 0, 0;%load/v 8, v0x90fef00_0, 32;%ix/load 0, 32, 0;%assign/v0 v0x90d5d78_0, 0, 8;%load/v 8, v0x90ff128_0, 4;%mov 12, 0, 1;%cmpi/u 8, 0, 5;%inv 4, 1;%mov 8, 4, 1;%load/v 9, v0x90ff188_0, 1;%or 8, 9, 1;%jmp/0xz T_3.11, 8;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 0;%jmp T_3.12;T_3.11 ;%load/v 8, v0x90fef60_0, 3;%cmpi/u 8, 0, 3;%jmp/1 T_3.13, 6;%cmpi/u 8, 1, 3;%jmp/1 T_3.14, 6;%cmpi/u 8, 2, 3;%jmp/1 T_3.15, 6;%cmpi/u 8, 3, 3;%jmp/1 T_3.16, 6;%cmpi/u 8, 4, 3;%jmp/1 T_3.17, 6;%vpi_call 2 371 "$display", "Error 1. cbus_cmd_i = %h\012", v0x90fef60_0;%jmp T_3.19;T_3.13 ;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 0;%jmp T_3.19;T_3.14 ;%movi 8, 1, 4;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 8;%jmp T_3.19;T_3.15 ;%movi 8, 2, 4;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 8;%jmp T_3.19;T_3.16 ;%movi 8, 7, 4;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 8;%jmp T_3.19;T_3.17 ;%movi 8, 6, 4;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 8;%jmp T_3.19;T_3.19 ;T_3.12 ;%jmp T_3.10;T_3.3 ;%ix/getv 3, v0x90fef00_0;%load/av 8, v0x90ff508, 3;%mov 11, 0, 1;%cmpi/u 8, 0, 4;%jmp/0xz T_3.20, 4;%movi 8, 3, 4;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 8;%jmp T_3.21;T_3.20 ;%ix/load 0, 1, 0;%assign/v0 v0x90feea0_0, 0, 1;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 0;T_3.21 ;%jmp T_3.10;T_3.4 ;%ix/getv 3, v0x90fef00_0;%load/av 8, v0x90ff508, 3;%mov 11, 0, 1;%cmpi/u 8, 0, 4;%jmp/0xz T_3.22, 4;%movi 8, 4, 4;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 8;%jmp T_3.23;T_3.22 ;%ix/load 0, 1, 0;%assign/v0 v0x90feea0_0, 0, 1;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 0;T_3.23 ;%jmp T_3.10;T_3.5 ;%ix/getv 3, v0x90d5d78_0;%load/av 8, v0x90ff508, 3;%mov 11, 0, 1;%cmpi/u 8, 0, 4;%inv 4, 1;%jmp/0xz T_3.24, 4;%vpi_call 2 396 "$DISPLAY", "Error 2. mem_state[cbus_addr_i] is not M.\012", "c_addr=%h,mem_state[cbus_addr_i]=%h", v0x90d5d78_0, &A<v0x90ff508, v0x90d5d78_0 >;%jmp T_3.25;T_3.24 ;%movi 8, 1, 2;%ix/load 0, 2, 0;%assign/v0 v0x90ff310_0, 0, 8;%load/v 8, v0x90ff0a0_0, 32;%ix/load 0, 32, 0;%assign/v0 v0x90ff278_0, 0, 8;%ix/getv 3, v0x90d5d78_0;%load/av 8, v0x90ff470, 32;%ix/load 0, 32, 0;%assign/v0 v0x90ff410_0, 0, 8;%load/v 8, v0x90ff218_0, 1;%jmp/0xz T_3.26, 8;%movi 8, 3, 3;%ix/getv 3, v0x90d5d78_0;%jmp/1 t_4, 4;%ix/load 0, 3, 0; word width%ix/load 1, 0, 0; part off%assign/av v0x90ff508, 0, 8;t_4 ;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 0;%ix/load 0, 1, 0;%assign/v0 v0x90feea0_0, 0, 1;T_3.26 ;T_3.25 ;%jmp T_3.10;T_3.6 ;%ix/getv 3, v0x90d5d78_0;%load/av 8, v0x90ff508, 3;%mov 11, 0, 1;%cmpi/u 8, 2, 4;%mov 8, 4, 1;%ix/getv 3, v0x90d5d78_0;%load/av 9, v0x90ff508, 3;%mov 12, 0, 1;%cmpi/u 9, 1, 4;%mov 9, 4, 1;%or 8, 9, 1;%inv 8, 1;%jmp/0xz T_3.28, 8;%vpi_call 2 419 "$DISPLAY", "Error 3. mem_state[cbus_addr_i] is not S or E.\012";%vpi_call 2 420 "$DISPLAY", "c_addr=%h,mem_state[cbus_addr_i]=%h", v0x90d5d78_0, &A<v0x90ff508, v0x90d5d78_0 >;%jmp T_3.29;T_3.28 ;%movi 8, 1, 2;%ix/load 0, 2, 0;%assign/v0 v0x90ff310_0, 0, 8;%load/v 8, v0x90ff0a0_0, 32;%ix/load 0, 32, 0;%assign/v0 v0x90ff278_0, 0, 8;%ix/getv 3, v0x90d5d78_0;%load/av 8, v0x90ff470, 32;%ix/load 0, 32, 0;%assign/v0 v0x90ff410_0, 0, 8;%load/v 8, v0x90ff218_0, 1;%jmp/0xz T_3.30, 8;%movi 8, 2, 3;%ix/getv 3, v0x90d5d78_0;%jmp/1 t_5, 4;%ix/load 0, 3, 0; word width%ix/load 1, 0, 0; part off%assign/av v0x90ff508, 0, 8;t_5 ;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 0;%ix/load 0, 1, 0;%assign/v0 v0x90feea0_0, 0, 1;T_3.30 ;T_3.29 ;%jmp T_3.10;T_3.7 ;%load/v 8, v0x90ff8a8_0, 1;%mov 9, 0, 2;%cmpi/u 8, 1, 3;%inv 4, 1;%mov 8, 4, 1;%load/v 9, v0x90ff740_0, 32;%load/v 41, v0x90d5d78_0, 32;%cmp/u 9, 41, 32;%inv 4, 1;%mov 9, 4, 1;%or 8, 9, 1;%jmp/0xz T_3.32, 8;%vpi_call 2 441 "$DISPLAY", "Error 4. Write to cache witout early broadcast.\012", "wr_proc_wait_for_en=%h,wr_proc_addr=%h,c_addr=%h", v0x90ff8a8_0, v0x90ff740_0, v0x90d5d78_0;%jmp T_3.33;T_3.32 ;%movi 8, 1, 2;%ix/load 0, 2, 0;%assign/v0 v0x90ff310_0, 0, 8;%load/v 8, v0x90ff0a0_0, 32;%ix/load 0, 32, 0;%assign/v0 v0x90ff278_0, 0, 8;%load/v 8, v0x90ff218_0, 1;%jmp/0xz T_3.34, 8;%load/v 8, v0x90ff370_0, 32;%ix/getv 3, v0x90ff0a0_0;%jmp/1 t_6, 4;%ix/load 0, 32, 0; word width%ix/load 1, 0, 0; part off%assign/av v0x90ff470, 0, 8;t_6 ;%movi 8, 7, 4;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 8;T_3.34 ;T_3.33 ;%jmp T_3.10;T_3.8 ;%load/v 8, v0x90ff5f8_0, 1;%mov 9, 0, 2;%cmpi/u 8, 1, 3;%inv 4, 1;%mov 8, 4, 1;%load/v 9, v0x90ff558_0, 32;%load/v 41, v0x90d5d78_0, 32;%cmp/u 9, 41, 32;%inv 4, 1;%mov 9, 4, 1;%or 8, 9, 1;%jmp/0xz T_3.36, 8;%vpi_call 2 462 "$DISPLAY", "Error 5. Read to cache witout early broadcast.\012", "rd_proc_wait_for_en=%h,rd_proc_addr=%h,c_addr=%h", v0x90ff5f8_0, v0x90ff558_0, v0x90d5d78_0;%jmp T_3.37;T_3.36 ;%movi 8, 1, 2;%ix/load 0, 2, 0;%assign/v0 v0x90ff310_0, 0, 8;%load/v 8, v0x90ff0a0_0, 32;%ix/load 0, 32, 0;%assign/v0 v0x90ff278_0, 0, 8;%load/v 8, v0x90ff218_0, 1;%jmp/0xz T_3.38, 8;%load/v 8, v0x90ff370_0, 32;%ix/getv 3, v0x90ff0a0_0;%jmp/1 t_7, 4;%ix/load 0, 32, 0; word width%ix/load 1, 0, 0; part off%assign/av v0x90ff470, 0, 8;t_7 ;%movi 8, 7, 4;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 8;%ix/load 0, 1, 0;%assign/v0 v0x90ff5f8_0, 0, 0;T_3.38 ;T_3.37 ;%jmp T_3.10;T_3.9 ;%load/v 8, v0x90ff7f0_0, 32;%ix/getv 3, v0x90ff0a0_0;%jmp/1 t_8, 4;%ix/load 0, 8, 0; word width%ix/load 1, 0, 0; part off%assign/av v0x90ff470, 0, 8;t_8 ;%load/v 8, v0x90ff7f0_0, 32;%mov 40, 0, 1;%addi 8, 1, 33;%ix/load 0, 32, 0;%assign/v0 v0x90ff7f0_0, 0, 8;%ix/load 0, 4, 0;%assign/v0 v0x90fee40_0, 0, 0;%ix/load 0, 1, 0;%assign/v0 v0x90feea0_0, 0, 1;%ix/load 0, 1, 0;%assign/v0 v0x90ff5f8_0, 0, 1;%jmp T_3.10;T_3.10 ;T_3.1 ;%jmp T_3;.thread T_3;# The file index is used to find the file name in the following table.:file_names 3;"N/A";"<interactive>";"../src/tb/mesi_isc_tb_cpu.v";
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