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[/] [minimips_superscalar/] [trunk/] [gasm_with_mult2_instruction/] [psd_instr.sx] - Rev 22

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; This file is part of gasm.
;
;    
; If you encountered any problem, please contact :
;                                                 
;   lmouton@enserg.fr                             
;   shangoue@enserg.fr                            
;                                                 




;================================= Surnoms des registres ==================================

#D $ZERO    {} {} { $0 }

#D $AT      {} {} { $1 }

#D $V0      {} {} { $2 }
#D $V1      {} {} { $3 }

#D $A0      {} {} { $4 }
#D $A1      {} {} { $5 }
#D $A2      {} {} { $6 }
#D $A3      {} {} { $7 }

#D $T0      {} {} { $8 }
#D $T1      {} {} { $9 }
#D $T2      {} {} { $10 }
#D $T3      {} {} { $11 }
#D $T4      {} {} { $12 }
#D $T5      {} {} { $13 }
#D $T6      {} {} { $14 }
#D $T7      {} {} { $15 }

#D $S1      {} {} { $16 }
#D $S2      {} {} { $17 }
#D $S3      {} {} { $18 }
#D $S4      {} {} { $19 }
#D $S5      {} {} { $20 }
#D $S6      {} {} { $21 }
#D $S7      {} {} { $22 }
#D $S8      {} {} { $23 }

#D $T8      {} {} { $24 }
#D $T9      {} {} { $25 }

#D $K0      {} {} { $26 }
#D $K1      {} {} { $27 }

#D $GP      {} {} { $28 }

#D $SP      {} {} { $29 }

#D $FP      {} {} { $30 }

#D $RA      {} {} { $31 }

; Registres internes du coprocesseur systeme

#D STATUS   {} {} { $12 }
#D CAUSE    {} {} { $13 }
#D EPC      {} {} { $14 }
#D VECTIT   {} {} { $15 }


;============= Fonctions du coprocesseur systeme pour l'instruction COP0 ================

#D MASK     {}      {}      { 1 }
#D UNMASK   {}      {}      { 2 }
#D ITRET    {}      {}      { 4 } ; Retour d'interruption


;================================== Pseudo-instructions ===================================

#D NOP      {}      {}          { SLL $0, $0, 0 }

#D BLT      {r o a} {r, o, a}   { SLT $1,r, o           ;/ Justifie le registre at ($1) 
                                  BNE $1, $0, a }       ;/ reserve par l'assembleur.

#D MOVE     { Rt Rs }  {Rt, Rs} { ADDU Rt, $0, Rs}      ;/ addition 'unsigned' avec zero
#D LI       { Rt Int } {Rt, Int}{ ORI  Rt, $ZERO, Int}  ;/ Chargement de valeur immediate

#D INC      { R }   { R }   { ADDI R, R, 1 }
#D DEC      { R }   { R }   { ADDI R, R, -1 }
#D INCW     { R }   { R }   { ADDI R, R, 4 }
#D DECW     { R }   { R }   { ADDI R, R, -4 }
#D STOP     { etq } { etq } { etq: J etq }
#D RETURN   {}      {}      { JR $31 }
#D RIT      {}      {}      { COP0 ITRET }

#D LOCK     {}      {}      { LI $K0, @FFFF LW $ZERO, 0($K0) }   ;/ plantage du processeur

; Utilisation d'une pile

#D INIT_SP  { adresse } { adresse } { ADDI $SP, $0, adresse }
#D PUSH     { reg }     { reg }     { DECW $SP SW reg, 0($SP) }
#D PULL     { reg }     { reg }     { LW reg, 0($SP) INCW $SP }

#D FOR          { boucle reg max }
                { reg from max downto 0 DO boucle }
                { boucle: LI reg, max }
#D NEXT         { reg boucle }
                { reg, boucle }
                { DEC reg BGEZ reg, boucle }

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