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[/] [minsoc/] [branches/] [verilator/] [utils/] [contributions/] [gpio/] [rtl/] [minsoc_top.ucf] - Rev 164

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NET "clk" LOC = E12;    # 50 MHz on-board clock oscillator
NET "reset" LOC = T14;  # Push Button BTN_NORTH

# UART Peripheral 
NET "uart_stx" LOC = E15;    # RS232 Serial port ( DTE Connector )
NET "uart_srx" LOC = F16;    # 

# GPIO
NET "io_pins<0>" LOC = R20;
NET "io_pins<1>" LOC = T19;
NET "io_pins<2>" LOC = U20;
NET "io_pins<3>" LOC = U19;
NET "io_pins<4>" LOC = V19;
NET "io_pins<5>" LOC = V20;
NET "io_pins<6>" LOC = Y22;
NET "io_pins<7>" LOC = W21;

NET "i_pins<0>" LOC = V8;
NET "i_pins<1>" LOC = U10;
NET "i_pins<2>" LOC = U8;
NET "i_pins<3>" LOC = T9;
NET "i_pins<4>" LOC = T16;
NET "i_pins<5>" LOC = U15;
#NET "i_pins<6>" LOC = ;
NET "i_pins<7>" LOC = T15;

#################################################################################
#    Pin constraints including the IOSTANDARD and DRIVE 
#    Reference : Spartan-3A/3AN FPGA Starter Kit Board User Guide ( UG334 v1.1 )
#################################################################################

#NET "clk" LOC = E12 | IOSTANDARD = LVCMOS33;
#NET "uart_stx" LOC = E15 | IOSTANDARD = LVCMOS33 | DRIVE = 8 | SLEW = SLOW ;
#NET "uart_srx" LOC = F16 | IOSTANDARD = LVCMOS33;
#NET "reset" LOC = T14 | IOSTANDARD = LVCMOS33 | PULLDOWN ;

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