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https://opencores.org/ocsvn/minsoc/minsoc/trunk
Subversion Repositories minsoc
[/] [minsoc/] [trunk/] [backend/] [spartan3a_dsp_kit/] [spartan3a_dsp_kit.ucf] - Rev 161
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###########################
##
## Global signals
##
net "clk" loc = "f13"; #125MHz clock
net "reset" loc = "j17"; #SW5
###########################
###########################
##
## JTAG
##
#net "jtag_tms" loc = "aa23"; #SAM D0
#net "jtag_tdi" loc = "u20"; #SAM D2
#net "jtag_tdo" loc = "aa25"; #SAM D4
#net "jtag_tck" loc = "u18" | CLOCK_DEDICATED_ROUTE = FALSE; #SAM D6
#net "jtag_gnd" loc = "y23"; #SAM D8
#net "jtag_vref" loc = "t20"; #SAM D10
###########################
#############################
##
## SPI Flash External Memory
##
#NET "spi_flash_mosi" LOC = "ab15";
#NET "spi_flash_miso" LOC = "af24";
#NET "spi_flash_sclk" LOC = "ae24";
#NET "spi_flash_ss(1)" LOC = "ac25";
#NET "spi_flash_ss(0)" LOC = "aa7";
###########################
###########################
##
## UART
##
net "uart_stx" loc = "p22";
net "uart_srx" loc = "n21";
###########################
###########################
##
## ETH
##
NET "eth_txd(3)" LOC = "b1";
NET "eth_txd(2)" LOC = "b2";
NET "eth_txd(1)" LOC = "j9";
NET "eth_txd(0)" LOC = "j8";
NET "eth_tx_en" LOC = "d3";
NET "eth_tx_clk" LOC = "p2";
NET "eth_tx_er" LOC = "e4";
NET "eth_rxd(3)" LOC = "d2";
NET "eth_rxd(2)" LOC = "g5";
NET "eth_rxd(1)" LOC = "g2";
NET "eth_rxd(0)" LOC = "c2";
NET "eth_rx_er" LOC = "j3";
NET "eth_rx_dv" LOC = "d1";
NET "eth_rx_clk" LOC = "p1";
NET "eth_mdio" LOC = "f5" | PULLUP;
NET "eth_crs" LOC = "g1";
NET "eth_col" LOC = "y3";
NET "eth_mdc" LOC = "f4";
NET "eth_trste" LOC = "g4";
NET "eth_fds_mdint" LOC = "j1";
###########################
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