Subversion Repositories mips32

                        ori $t0, $zero, 10
                        nop
                        nop
                        nop
                        add $s0, $s0, $t0
        
                
                
                    /* create a bypath for reg1 output */
            if(regwrite_flag && write_reg == rs)
                reg1_data <= write_data;
            else
                reg1_data <= registers[rs];
            /* create a bypath for reg2 output */
            if( regwrite_flag && write_reg == rt)
                reg2_data <= write_data;
            else
                reg2_data <= registers[rt];
                assign forwardA_ex_mem_condition = (ex_mem_regwrite_flag == 1'b1) && (ex_mem_rd != 0) && (ex_mem_rd == id_ex_rs);
                assign forwardA_mem_wb_condition = (mem_wb_regwrite_flag == 1'b1) && (mem_wb_rd != 0) && ( mem_wb_rd == id_ex_rs);
    
                assign forwardB_ex_mem_condition = (ex_mem_regwrite_flag == 1'b1) && (ex_mem_rd != 0) && (ex_mem_rd == id_ex_rt);
                assign forwardB_mem_wb_condition = (mem_wb_regwrite_flag == 1'b1) && (mem_wb_rd != 0) && ( mem_wb_rd == id_ex_rt);
                lw $t0, 0($zero)
                addi $s0, $t0, $t1
        
                assign addr = ALU_out[9:2];
        
        
                        //    assign isFlush =  ((ctr_m[3:2] == `BRANCH_OP_BEQ) && (zero_flag == 1'b1)) || 
                        //                ( (ctr_m[3:2] == `BRANCH_OP_BNE) && (zero_flag == 1'b0) );
                                assign isFlush =  ((ctr_m[3:2] == `BRANCH_OP_BEQ) && (ALU_out == 32'h0)) || 
                                                ( (ctr_m[3:2] == `BRANCH_OP_BNE) && (ALU_out != 32'h0) );
        
                
                
                FF: 1463
                LUT: 1744
                


PipelineMIPS_opt5_cache
        
PipelineMIPS_opt5_cache_example3
                
                

        
PipelineMIPS_opt6_cache_bht
                
                        FF:                     1626
                        LUT:                    3004
                        MEMORY LUT:             983
                        BRAM:                   7.5
                        
PipelineMIPS_opt7_cache_bht
                        FF:                     1630
                        LUT:                    3163
                        MEMORY LUT:             1015
                        BRAM:                   7.5

PipelineMIPS_opt8_cache_bht
        
PipelineMIPS_opt9_cache_bht
                
                
                FF:                     1709
                LUT:                    3171
                MEMORY LUT:             1015
                BRAM:                   7.5