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https://opencores.org/ocsvn/mips32/mips32/trunk
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[/] [mips32/] [trunk/] [Classic-MIPS/] [TestBenchs/] [cache/] [code.smd] - Rev 2
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lw $t0, 2220($zero)
lw $t1, 4280($zero)
sub $s0, $t1, $t0
sw $s0, 2216($zero)
lw $t0, 2220($zero)
lw $t1, 2216($zero)
lw $t2, 4268($zero)
nop
nop
nop