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Timing Analyzer report for mips_top
Mon Oct 13 12:02:29 2008
Version 4.2 Build 157 12/07/2004 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Timing Analyzer Summary
3. Timing Analyzer Settings
4. Clock Settings Summary
5. Clock Setup: 'pll50:Ipll|altpll:altpll_component|_clk0'
6. Clock Hold: 'pll50:Ipll|altpll:altpll_component|_clk0'
7. tsu
8. tco
9. th
10. Timing Analyzer Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2004 Altera Corporation
Any megafunction design, and related netlist (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only
to program PLD devices (but not masked PLD devices) from Altera. Any
other use of such megafunction design, netlist, support information,
device programming or simulation file, or any other related documentation
or information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner. Title to the
intellectual property, including patents, copyrights, trademarks, trade
secrets, or maskworks, embodied in any such megafunction design, netlist,
support information, device programming or simulation file, or any other
related documentation or information provided by Altera or a megafunction
partner, remains with Altera, the megafunction partner, or their respective
licensors. No other licenses, including any licenses needed under any third
party's intellectual property, are provided herein.
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary ;
+---------------------------------------------------------+----------+----------------------------------+----------------------------------+----------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------------------------------------+------------------------------------------+--------------+
; Type ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ;
+---------------------------------------------------------+----------+----------------------------------+----------------------------------+----------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------------------------------------+------------------------------------------+--------------+
; Worst-case tsu ; N/A ; None ; 5.491 ns ; key1 ; mips_sys:isys|mips_dvc:imips_dvc|r_key1 ; ; clk ; 0 ;
; Worst-case tco ; N/A ; None ; 6.738 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd_6 ; led2 ; clk ; ; 0 ;
; Worst-case th ; N/A ; None ; -4.639 ns ; rst ; r_rst ; ; clk ; 0 ;
; Clock Setup: 'pll50:Ipll|altpll:altpll_component|_clk0' ; 0.083 ns ; 50.00 MHz ( period = 20.000 ns ) ; 50.21 MHz ( period = 19.917 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0 ;
; Clock Hold: 'pll50:Ipll|altpll:altpll_component|_clk0' ; 0.566 ns ; 50.00 MHz ( period = 20.000 ns ) ; N/A ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|delay_counter_Sreg0[0] ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|delay_counter_Sreg0[0] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0 ;
; Total number of failed paths ; ; ; ; ; ; ; ; 0 ;
+---------------------------------------------------------+----------+----------------------------------+----------------------------------+----------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------+------------------------------------------+------------------------------------------+--------------+
+------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Option ; Setting ; From ; To ; Entity Name ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Device Name ; EP1C6Q240C6 ; ; ; ;
; Timing Models ; Final ; ; ; ;
; Number of source nodes to report per destination node ; 10 ; ; ; ;
; Number of destination nodes to report ; 10 ; ; ; ;
; Number of paths to report ; 200 ; ; ; ;
; Report Minumum Timing Checks ; Off ; ; ; ;
; Use Fast Timing Models ; Off ; ; ; ;
; Report IO Paths Separately ; Off ; ; ; ;
; Clock Analysis Only ; Off ; ; ; ;
; Default hold multicycle ; Same as Multicycle ; ; ; ;
; Cut paths between unrelated clock domains ; On ; ; ; ;
; Cut off read during write signal paths ; On ; ; ; ;
; Cut off clear and preset signal paths ; On ; ; ; ;
; Cut off feedback from I/O pins ; On ; ; ; ;
; Ignore Clock Settings ; Off ; ; ; ;
; Analyze latches as synchronous elements ; Off ; ; ; ;
; Do Min/Max analysis using Rise/Fall delays ; Off ; ; ; ;
; Enable Recovery/Removal analysis ; Off ; ; ; ;
; Use Clock Latency for PLL offset ; Off ; ; ; ;
+-------------------------------------------------------+--------------------+------+----+-------------+
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary ;
+------------------------------------------+--------------------+------------+------------------+----------+-----------------------+---------------------+-----------+
; Clock Node Name ; Clock Setting Name ; Type ; Fmax Requirement ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ;
+------------------------------------------+--------------------+------------+------------------+----------+-----------------------+---------------------+-----------+
; pll50:Ipll|altpll:altpll_component|_clk0 ; ; PLL output ; 50.0 MHz ; clk ; 2 ; 1 ; -1.450 ns ;
; clk ; ; User Pin ; 25.0 MHz ; NONE ; N/A ; N/A ; N/A ;
+------------------------------------------+--------------------+------------+------------------+----------+-----------------------+---------------------+-----------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'pll50:Ipll|altpll:altpll_component|_clk0' ;
+-----------------------------------------+-----------------------------------------------------+---------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------------------------------+------------------------------------------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+---------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------------------------------+------------------------------------------+-----------------------------+---------------------------+-------------------------+
; 0.083 ns ; 50.21 MHz ( period = 19.917 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.721 ns ;
; 0.167 ns ; 50.42 MHz ( period = 19.833 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.637 ns ;
; 0.219 ns ; 50.55 MHz ( period = 19.781 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.585 ns ;
; 0.221 ns ; 50.56 MHz ( period = 19.779 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.583 ns ;
; 0.226 ns ; 50.57 MHz ( period = 19.774 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a4~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.578 ns ;
; 0.239 ns ; 50.60 MHz ( period = 19.761 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.565 ns ;
; 0.242 ns ; 50.61 MHz ( period = 19.758 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.562 ns ;
; 0.252 ns ; 50.64 MHz ( period = 19.748 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.789 ns ; 19.537 ns ;
; 0.252 ns ; 50.64 MHz ( period = 19.748 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_24 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.546 ns ;
; 0.267 ns ; 50.68 MHz ( period = 19.733 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.512 ns ;
; 0.287 ns ; 50.73 MHz ( period = 19.713 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.517 ns ;
; 0.289 ns ; 50.73 MHz ( period = 19.711 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.515 ns ;
; 0.302 ns ; 50.77 MHz ( period = 19.698 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.502 ns ;
; 0.303 ns ; 50.77 MHz ( period = 19.697 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.501 ns ;
; 0.312 ns ; 50.79 MHz ( period = 19.688 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.492 ns ;
; 0.327 ns ; 50.83 MHz ( period = 19.673 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.477 ns ;
; 0.332 ns ; 50.84 MHz ( period = 19.668 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_19 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.466 ns ;
; 0.340 ns ; 50.86 MHz ( period = 19.660 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.464 ns ;
; 0.345 ns ; 50.88 MHz ( period = 19.655 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.459 ns ;
; 0.346 ns ; 50.88 MHz ( period = 19.654 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.458 ns ;
; 0.351 ns ; 50.89 MHz ( period = 19.649 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.428 ns ;
; 0.357 ns ; 50.91 MHz ( period = 19.643 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.447 ns ;
; 0.362 ns ; 50.92 MHz ( period = 19.638 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a4~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.442 ns ;
; 0.375 ns ; 50.96 MHz ( period = 19.625 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.429 ns ;
; 0.378 ns ; 50.96 MHz ( period = 19.622 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.426 ns ;
; 0.388 ns ; 50.99 MHz ( period = 19.612 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.789 ns ; 19.401 ns ;
; 0.388 ns ; 50.99 MHz ( period = 19.612 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_24 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.410 ns ;
; 0.394 ns ; 51.00 MHz ( period = 19.606 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_28 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.823 ns ; 19.429 ns ;
; 0.395 ns ; 51.01 MHz ( period = 19.605 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a4~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.409 ns ;
; 0.405 ns ; 51.03 MHz ( period = 19.595 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a3~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.399 ns ;
; 0.405 ns ; 51.03 MHz ( period = 19.595 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.374 ns ;
; 0.410 ns ; 51.05 MHz ( period = 19.590 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a4~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.369 ns ;
; 0.413 ns ; 51.05 MHz ( period = 19.587 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.391 ns ;
; 0.423 ns ; 51.08 MHz ( period = 19.577 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.356 ns ;
; 0.423 ns ; 51.08 MHz ( period = 19.577 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.381 ns ;
; 0.425 ns ; 51.09 MHz ( period = 19.575 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.379 ns ;
; 0.426 ns ; 51.09 MHz ( period = 19.574 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.353 ns ;
; 0.436 ns ; 51.11 MHz ( period = 19.564 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.328 ns ;
; 0.436 ns ; 51.11 MHz ( period = 19.564 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_24 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.773 ns ; 19.337 ns ;
; 0.438 ns ; 51.12 MHz ( period = 19.562 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.366 ns ;
; 0.442 ns ; 51.13 MHz ( period = 19.558 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.362 ns ;
; 0.448 ns ; 51.15 MHz ( period = 19.552 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.356 ns ;
; 0.455 ns ; 51.16 MHz ( period = 19.545 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.349 ns ;
; 0.463 ns ; 51.18 MHz ( period = 19.537 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.341 ns ;
; 0.463 ns ; 51.18 MHz ( period = 19.537 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.341 ns ;
; 0.468 ns ; 51.20 MHz ( period = 19.532 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_19 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.330 ns ;
; 0.471 ns ; 51.21 MHz ( period = 19.529 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.308 ns ;
; 0.473 ns ; 51.21 MHz ( period = 19.527 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a6~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.291 ns ;
; 0.473 ns ; 51.21 MHz ( period = 19.527 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.306 ns ;
; 0.473 ns ; 51.21 MHz ( period = 19.527 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.331 ns ;
; 0.476 ns ; 51.22 MHz ( period = 19.524 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.328 ns ;
; 0.479 ns ; 51.23 MHz ( period = 19.521 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a6~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.285 ns ;
; 0.480 ns ; 51.23 MHz ( period = 19.520 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a6~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.284 ns ;
; 0.481 ns ; 51.23 MHz ( period = 19.519 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a7~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.283 ns ;
; 0.481 ns ; 51.23 MHz ( period = 19.519 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.323 ns ;
; 0.482 ns ; 51.23 MHz ( period = 19.518 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.322 ns ;
; 0.483 ns ; 51.24 MHz ( period = 19.517 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a6~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.281 ns ;
; 0.484 ns ; 51.24 MHz ( period = 19.516 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a6~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.280 ns ;
; 0.486 ns ; 51.25 MHz ( period = 19.514 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.293 ns ;
; 0.488 ns ; 51.25 MHz ( period = 19.512 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a2~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.276 ns ;
; 0.489 ns ; 51.25 MHz ( period = 19.511 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a2~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.275 ns ;
; 0.492 ns ; 51.26 MHz ( period = 19.508 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a4~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.312 ns ;
; 0.495 ns ; 51.27 MHz ( period = 19.505 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a6~porta_address_reg1 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.269 ns ;
; 0.496 ns ; 51.27 MHz ( period = 19.504 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.283 ns ;
; 0.497 ns ; 51.27 MHz ( period = 19.503 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a7~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.267 ns ;
; 0.497 ns ; 51.27 MHz ( period = 19.503 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a3~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.307 ns ;
; 0.499 ns ; 51.28 MHz ( period = 19.501 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a7~porta_address_reg1 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.265 ns ;
; 0.502 ns ; 51.29 MHz ( period = 19.498 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_23 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.296 ns ;
; 0.511 ns ; 51.31 MHz ( period = 19.489 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.268 ns ;
; 0.516 ns ; 51.32 MHz ( period = 19.484 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_19 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.773 ns ; 19.257 ns ;
; 0.518 ns ; 51.33 MHz ( period = 19.482 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a5~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.286 ns ;
; 0.520 ns ; 51.33 MHz ( period = 19.480 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.284 ns ;
; 0.524 ns ; 51.35 MHz ( period = 19.476 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.255 ns ;
; 0.529 ns ; 51.36 MHz ( period = 19.471 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.250 ns ;
; 0.530 ns ; 51.36 MHz ( period = 19.470 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.249 ns ;
; 0.530 ns ; 51.36 MHz ( period = 19.470 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_28 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.823 ns ; 19.293 ns ;
; 0.531 ns ; 51.36 MHz ( period = 19.469 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a4~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.273 ns ;
; 0.541 ns ; 51.39 MHz ( period = 19.459 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a3~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.263 ns ;
; 0.543 ns ; 51.40 MHz ( period = 19.457 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.261 ns ;
; 0.549 ns ; 51.41 MHz ( period = 19.451 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.255 ns ;
; 0.559 ns ; 51.44 MHz ( period = 19.441 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_25 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.239 ns ;
; 0.561 ns ; 51.44 MHz ( period = 19.439 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.243 ns ;
; 0.578 ns ; 51.49 MHz ( period = 19.422 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.226 ns ;
; 0.578 ns ; 51.49 MHz ( period = 19.422 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_28 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.220 ns ;
; 0.579 ns ; 51.49 MHz ( period = 19.421 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a4~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.200 ns ;
; 0.589 ns ; 51.52 MHz ( period = 19.411 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a3~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.190 ns ;
; 0.591 ns ; 51.52 MHz ( period = 19.409 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.213 ns ;
; 0.597 ns ; 51.54 MHz ( period = 19.403 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.182 ns ;
; 0.599 ns ; 51.54 MHz ( period = 19.401 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.205 ns ;
; 0.604 ns ; 51.56 MHz ( period = 19.396 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.200 ns ;
; 0.609 ns ; 51.57 MHz ( period = 19.391 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a6~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.155 ns ;
; 0.609 ns ; 51.57 MHz ( period = 19.391 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.195 ns ;
; 0.615 ns ; 51.59 MHz ( period = 19.385 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a6~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.149 ns ;
; 0.616 ns ; 51.59 MHz ( period = 19.384 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a6~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.148 ns ;
; 0.617 ns ; 51.59 MHz ( period = 19.383 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a7~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.147 ns ;
; 0.619 ns ; 51.60 MHz ( period = 19.381 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a6~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.145 ns ;
; 0.620 ns ; 51.60 MHz ( period = 19.380 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a6~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.144 ns ;
; 0.624 ns ; 51.61 MHz ( period = 19.376 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a2~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.140 ns ;
; 0.625 ns ; 51.61 MHz ( period = 19.375 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a2~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.139 ns ;
; 0.626 ns ; 51.62 MHz ( period = 19.374 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.153 ns ;
; 0.628 ns ; 51.62 MHz ( period = 19.372 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a4~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.176 ns ;
; 0.628 ns ; 51.62 MHz ( period = 19.372 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_16 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.170 ns ;
; 0.631 ns ; 51.63 MHz ( period = 19.369 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a6~porta_address_reg1 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.133 ns ;
; 0.633 ns ; 51.63 MHz ( period = 19.367 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a7~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.131 ns ;
; 0.633 ns ; 51.63 MHz ( period = 19.367 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a3~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.171 ns ;
; 0.634 ns ; 51.64 MHz ( period = 19.366 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_27 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.164 ns ;
; 0.635 ns ; 51.64 MHz ( period = 19.365 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a7~porta_address_reg1 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.129 ns ;
; 0.638 ns ; 51.65 MHz ( period = 19.362 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_23 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.160 ns ;
; 0.639 ns ; 51.65 MHz ( period = 19.361 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.140 ns ;
; 0.640 ns ; 51.65 MHz ( period = 19.360 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_18 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.158 ns ;
; 0.643 ns ; 51.66 MHz ( period = 19.357 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a5~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.161 ns ;
; 0.647 ns ; 51.67 MHz ( period = 19.353 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.132 ns ;
; 0.648 ns ; 51.67 MHz ( period = 19.352 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a5~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.156 ns ;
; 0.650 ns ; 51.68 MHz ( period = 19.350 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a5~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.154 ns ;
; 0.652 ns ; 51.68 MHz ( period = 19.348 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a4~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.152 ns ;
; 0.654 ns ; 51.69 MHz ( period = 19.346 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a5~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.150 ns ;
; 0.656 ns ; 51.70 MHz ( period = 19.344 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_3 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.123 ns ;
; 0.657 ns ; 51.70 MHz ( period = 19.343 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a6~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.739 ns ; 19.082 ns ;
; 0.657 ns ; 51.70 MHz ( period = 19.343 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.122 ns ;
; 0.658 ns ; 51.70 MHz ( period = 19.342 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.146 ns ;
; 0.663 ns ; 51.71 MHz ( period = 19.337 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a6~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.739 ns ; 19.076 ns ;
; 0.663 ns ; 51.71 MHz ( period = 19.337 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a4~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.141 ns ;
; 0.664 ns ; 51.72 MHz ( period = 19.336 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a6~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.739 ns ; 19.075 ns ;
; 0.665 ns ; 51.72 MHz ( period = 19.335 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a7~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.739 ns ; 19.074 ns ;
; 0.667 ns ; 51.73 MHz ( period = 19.333 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a6~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.739 ns ; 19.072 ns ;
; 0.667 ns ; 51.73 MHz ( period = 19.333 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg7 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.137 ns ;
; 0.668 ns ; 51.73 MHz ( period = 19.332 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a6~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.739 ns ; 19.071 ns ;
; 0.672 ns ; 51.74 MHz ( period = 19.328 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a2~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.739 ns ; 19.067 ns ;
; 0.673 ns ; 51.74 MHz ( period = 19.327 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a6~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.091 ns ;
; 0.673 ns ; 51.74 MHz ( period = 19.327 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a2~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.739 ns ; 19.066 ns ;
; 0.676 ns ; 51.75 MHz ( period = 19.324 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a7~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.088 ns ;
; 0.676 ns ; 51.75 MHz ( period = 19.324 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a4~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.103 ns ;
; 0.676 ns ; 51.75 MHz ( period = 19.324 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.128 ns ;
; 0.679 ns ; 51.76 MHz ( period = 19.321 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.125 ns ;
; 0.679 ns ; 51.76 MHz ( period = 19.321 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.125 ns ;
; 0.679 ns ; 51.76 MHz ( period = 19.321 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a6~porta_address_reg1 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.739 ns ; 19.060 ns ;
; 0.681 ns ; 51.76 MHz ( period = 19.319 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a7~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.739 ns ; 19.058 ns ;
; 0.681 ns ; 51.76 MHz ( period = 19.319 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a3~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.098 ns ;
; 0.681 ns ; 51.76 MHz ( period = 19.319 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.123 ns ;
; 0.682 ns ; 51.77 MHz ( period = 19.318 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg7 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.122 ns ;
; 0.683 ns ; 51.77 MHz ( period = 19.317 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a7~porta_address_reg1 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.739 ns ; 19.056 ns ;
; 0.686 ns ; 51.78 MHz ( period = 19.314 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_23 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.773 ns ; 19.087 ns ;
; 0.689 ns ; 51.78 MHz ( period = 19.311 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.789 ns ; 19.100 ns ;
; 0.689 ns ; 51.78 MHz ( period = 19.311 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_24 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.109 ns ;
; 0.695 ns ; 51.80 MHz ( period = 19.305 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_25 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.103 ns ;
; 0.697 ns ; 51.81 MHz ( period = 19.303 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.107 ns ;
; 0.702 ns ; 51.82 MHz ( period = 19.298 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a3~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.102 ns ;
; 0.702 ns ; 51.82 MHz ( period = 19.298 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a5~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.077 ns ;
; 0.717 ns ; 51.86 MHz ( period = 19.283 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a5~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.087 ns ;
; 0.722 ns ; 51.87 MHz ( period = 19.278 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.082 ns ;
; 0.724 ns ; 51.88 MHz ( period = 19.276 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.080 ns ;
; 0.726 ns ; 51.88 MHz ( period = 19.274 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.078 ns ;
; 0.727 ns ; 51.89 MHz ( period = 19.273 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.052 ns ;
; 0.729 ns ; 51.89 MHz ( period = 19.271 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a3~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.075 ns ;
; 0.733 ns ; 51.90 MHz ( period = 19.267 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a5~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.071 ns ;
; 0.734 ns ; 51.90 MHz ( period = 19.266 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a5~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.070 ns ;
; 0.735 ns ; 51.91 MHz ( period = 19.265 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a6~porta_address_reg1 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.029 ns ;
; 0.739 ns ; 51.92 MHz ( period = 19.261 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.065 ns ;
; 0.740 ns ; 51.92 MHz ( period = 19.260 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_3 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.039 ns ;
; 0.742 ns ; 51.93 MHz ( period = 19.258 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a5~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.062 ns ;
; 0.743 ns ; 51.93 MHz ( period = 19.257 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_25 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.773 ns ; 19.030 ns ;
; 0.745 ns ; 51.93 MHz ( period = 19.255 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 19.034 ns ;
; 0.749 ns ; 51.95 MHz ( period = 19.251 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.055 ns ;
; 0.754 ns ; 51.96 MHz ( period = 19.246 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.050 ns ;
; 0.760 ns ; 51.98 MHz ( period = 19.240 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a2~porta_address_reg1 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 19.004 ns ;
; 0.761 ns ; 51.98 MHz ( period = 19.239 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg2 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.043 ns ;
; 0.764 ns ; 51.99 MHz ( period = 19.236 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.040 ns ;
; 0.764 ns ; 51.99 MHz ( period = 19.236 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_16 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.034 ns ;
; 0.769 ns ; 52.00 MHz ( period = 19.231 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_19 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.029 ns ;
; 0.770 ns ; 52.00 MHz ( period = 19.230 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_27 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.028 ns ;
; 0.776 ns ; 52.02 MHz ( period = 19.224 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_18 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.798 ns ; 19.022 ns ;
; 0.777 ns ; 52.02 MHz ( period = 19.223 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.027 ns ;
; 0.779 ns ; 52.03 MHz ( period = 19.221 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a5~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.025 ns ;
; 0.780 ns ; 52.03 MHz ( period = 19.220 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a5~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.024 ns ;
; 0.781 ns ; 52.03 MHz ( period = 19.219 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a0~porta_address_reg1 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 18.983 ns ;
; 0.782 ns ; 52.03 MHz ( period = 19.218 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.022 ns ;
; 0.783 ns ; 52.04 MHz ( period = 19.217 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a3~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.021 ns ;
; 0.783 ns ; 52.04 MHz ( period = 19.217 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_0 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.021 ns ;
; 0.784 ns ; 52.04 MHz ( period = 19.216 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a5~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.020 ns ;
; 0.786 ns ; 52.05 MHz ( period = 19.214 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a5~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.018 ns ;
; 0.788 ns ; 52.05 MHz ( period = 19.212 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a4~porta_address_reg10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.016 ns ;
; 0.794 ns ; 52.07 MHz ( period = 19.206 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.010 ns ;
; 0.794 ns ; 52.07 MHz ( period = 19.206 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_3 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 18.985 ns ;
; 0.799 ns ; 52.08 MHz ( period = 19.201 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_3 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a4~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 18.980 ns ;
; 0.800 ns ; 52.08 MHz ( period = 19.200 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a1~porta_address_reg6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.789 ns ; 18.989 ns ;
; 0.803 ns ; 52.09 MHz ( period = 19.197 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg7 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 19.001 ns ;
; 0.809 ns ; 52.11 MHz ( period = 19.191 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a6~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 18.955 ns ;
; 0.812 ns ; 52.12 MHz ( period = 19.188 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a7~porta_address_reg9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 18.952 ns ;
; 0.812 ns ; 52.12 MHz ( period = 19.188 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_3 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a6~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 18.967 ns ;
; 0.812 ns ; 52.12 MHz ( period = 19.188 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_16 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.773 ns ; 18.961 ns ;
; 0.815 ns ; 52.12 MHz ( period = 19.185 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_3 ; mem_array:ram_8k|ram2048x8_2:ram2|altsyncram:altsyncram_component|altsyncram_ght1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 18.964 ns ;
; 0.817 ns ; 52.13 MHz ( period = 19.183 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 18.987 ns ;
; 0.818 ns ; 52.13 MHz ( period = 19.182 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_24 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a3~porta_address_reg7 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 18.986 ns ;
; 0.818 ns ; 52.13 MHz ( period = 19.182 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_27 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.773 ns ; 18.955 ns ;
; 0.824 ns ; 52.15 MHz ( period = 19.176 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_18 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.773 ns ; 18.949 ns ;
; 0.825 ns ; 52.15 MHz ( period = 19.175 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_3 ; mem_array:ram_8k|ram2048x8_1:ram1|altsyncram:altsyncram_component|altsyncram_fht1:auto_generated|ram_block1a4~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 18.939 ns ;
; 0.825 ns ; 52.15 MHz ( period = 19.175 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_3 ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_24 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.773 ns ; 18.948 ns ;
; 0.827 ns ; 52.16 MHz ( period = 19.173 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_0:ram0|altsyncram:altsyncram_component|altsyncram_eht1:auto_generated|ram_block1a5~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.804 ns ; 18.977 ns ;
; 0.827 ns ; 52.16 MHz ( period = 19.173 ns ) ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_1 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a5~porta_address_reg8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.779 ns ; 18.952 ns ;
; 0.828 ns ; 52.16 MHz ( period = 19.172 ns ) ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23 ; mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a6~porta_address_reg5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 20.000 ns ; 19.764 ns ; 18.936 ns ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ; ;
+-----------------------------------------+-----------------------------------------------------+---------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------+------------------------------------------+------------------------------------------+-----------------------------+---------------------------+-------------------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Hold: 'pll50:Ipll|altpll:altpll_component|_clk0' ;
+-----------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------+------------------------------------------+----------------------------+----------------------------+--------------------------+
; Minimum Slack ; From ; To ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
+-----------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------+------------------------------------------+----------------------------+----------------------------+--------------------------+
; 0.566 ns ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|delay_counter_Sreg0[0] ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|delay_counter_Sreg0[0] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.405 ns ;
; 0.662 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_5 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.501 ns ;
; 0.662 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_3:cop_data_reg|r32_o_25 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|s_cntr_25__Z ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.501 ns ;
; 0.662 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_3:cop_data_reg|r32_o_15 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|s_cntr_15__Z ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.501 ns ;
; 0.662 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_9 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.501 ns ;
; 0.662 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_13 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_13 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.501 ns ;
; 0.662 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_18 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_18 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.501 ns ;
; 0.662 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_27 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_27 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.501 ns ;
; 0.663 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_19 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_19 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.502 ns ;
; 0.666 ns ; mips_sys:isys|mips_core:mips_core|r5_reg:rnd_pass0|r5_o_2 ; mips_sys:isys|mips_core:mips_core|r5_reg_1:rnd_pass1|r5_o_2 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.505 ns ;
; 0.666 ns ; mips_sys:isys|mips_dvc:imips_dvc|r_key1 ; mips_sys:isys|mips_dvc:imips_dvc|rr_key1_Z ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.505 ns ;
; 0.666 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_23 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_23 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.505 ns ;
; 0.667 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_21 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_21 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.506 ns ;
; 0.667 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_20 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_20 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.506 ns ;
; 0.667 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_25 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_25 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.506 ns ;
; 0.668 ns ; r_rst ; sys_rst ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.507 ns ;
; 0.668 ns ; mips_sys:isys|mips_dvc:imips_dvc|r_key2 ; mips_sys:isys|mips_dvc:imips_dvc|rr_key2_Z ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.507 ns ;
; 0.668 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_10 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.507 ns ;
; 0.668 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_11 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_11 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.507 ns ;
; 0.668 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_14 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_14 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.507 ns ;
; 0.668 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_24 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_24 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.507 ns ;
; 0.671 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_6 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.510 ns ;
; 0.671 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_12 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_12 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.510 ns ;
; 0.671 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_15 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_15 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.510 ns ;
; 0.674 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_3:cop_data_reg|r32_o_10 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|s_cntr_10__Z ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.513 ns ;
; 0.675 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_3:cop_data_reg|r32_o_14 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|s_cntr_14__Z ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.514 ns ;
; 0.795 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_6 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.634 ns ;
; 0.795 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_4 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.634 ns ;
; 0.795 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[25] ; mips_sys:isys|mips_dvc:imips_dvc|dout_25 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.634 ns ;
; 0.795 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_28 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_28 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.634 ns ;
; 0.795 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_4:cop_dout_reg|r32_o_27 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_27 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.634 ns ;
; 0.796 ns ; mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|pipelinedregs:pipereg|wb_mux_ctl_reg_1:U21|wb_mux_ctl_o_0 ; mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|pipelinedregs:pipereg|wb_mux_ctl_reg:U18|wb_mux_ctl_o_0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.635 ns ;
; 0.798 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_23 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_23 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.637 ns ;
; 0.799 ns ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_12 ; mips_sys:isys|mips_core:mips_core|r32_reg_5:ext_reg|r32_o_28 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.638 ns ;
; 0.799 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[28] ; mips_sys:isys|mips_dvc:imips_dvc|dout_28 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.638 ns ;
; 0.799 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[16] ; mips_sys:isys|mips_dvc:imips_dvc|dout_16 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.638 ns ;
; 0.799 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[15] ; mips_sys:isys|mips_dvc:imips_dvc|dout_15 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.638 ns ;
; 0.800 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_21 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_21 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.639 ns ;
; 0.800 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_11 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_11 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.639 ns ;
; 0.801 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[14] ; mips_sys:isys|mips_dvc:imips_dvc|dout_14 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.640 ns ;
; 0.801 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[20] ; mips_sys:isys|mips_dvc:imips_dvc|dout_20 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.640 ns ;
; 0.801 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_31 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_31 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.640 ns ;
; 0.801 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_30 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_30 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.640 ns ;
; 0.802 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[8] ; mips_sys:isys|mips_dvc:imips_dvc|dout_8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.641 ns ;
; 0.802 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_4:cop_dout_reg|r32_o_22 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_22 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.641 ns ;
; 0.803 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[10] ; mips_sys:isys|mips_dvc:imips_dvc|dout_10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.642 ns ;
; 0.803 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_17 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_17 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.642 ns ;
; 0.803 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_25 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_25 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.642 ns ;
; 0.804 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[30] ; mips_sys:isys|mips_dvc:imips_dvc|dout_30 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.643 ns ;
; 0.804 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[19] ; mips_sys:isys|mips_dvc:imips_dvc|dout_19 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.643 ns ;
; 0.804 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_20 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_20 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.643 ns ;
; 0.804 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_10 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.643 ns ;
; 0.804 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_13 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_13 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.643 ns ;
; 0.805 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[31] ; mips_sys:isys|mips_dvc:imips_dvc|dout_31 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.644 ns ;
; 0.805 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[11] ; mips_sys:isys|mips_dvc:imips_dvc|dout_11 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.644 ns ;
; 0.805 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[26] ; mips_sys:isys|mips_dvc:imips_dvc|dout_26 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.644 ns ;
; 0.805 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_16 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_16 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.644 ns ;
; 0.806 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[1] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[0] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.645 ns ;
; 0.806 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|ua_state[7] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|ua_state_i[0] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.645 ns ;
; 0.806 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_7 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_7 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.645 ns ;
; 0.806 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_3:cop_data_reg|r32_o_31 ; mips_sys:isys|mips_dvc:imips_dvc|cmd[31] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.645 ns ;
; 0.806 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_29 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_29 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.645 ns ;
; 0.807 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[7] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[6] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.646 ns ;
; 0.808 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[7] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|buffer_reg_7 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.647 ns ;
; 0.810 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[4] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[3] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.649 ns ;
; 0.814 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rxq1 ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|ua_state_i[0] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.653 ns ;
; 0.815 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|bit_ctr[2] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|bit_ctr[2] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.654 ns ;
; 0.815 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rxq1 ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|ua_state[1] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.654 ns ;
; 0.816 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|ua_state_2 ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|ua_state[4] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.655 ns ;
; 0.818 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[3] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[2] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.657 ns ;
; 0.819 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[3] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|buffer_reg_3 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.658 ns ;
; 0.819 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[1] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[0] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.658 ns ;
; 0.821 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_31 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_31 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.660 ns ;
; 0.823 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[1] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|buffer_reg_1 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.662 ns ;
; 0.830 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|buffer_reg_2 ; mips_sys:isys|mips_dvc:imips_dvc|dout_2 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.669 ns ;
; 0.830 ns ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_3 ; mips_sys:isys|mips_core:mips_core|r32_reg_5:ext_reg|r32_o_0_3 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.669 ns ;
; 0.837 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|ua_state[4] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|int_req ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.676 ns ;
; 0.857 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|b_non_empty ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|b_non_empty ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.696 ns ;
; 0.857 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_22 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_22 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.696 ns ;
; 0.859 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|b_non_empty ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|b_full ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.698 ns ;
; 0.861 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|ua_state[1] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|ua_state[1] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.700 ns ;
; 0.863 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_3:cop_data_reg|r32_o_28 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|s_cntr_28__Z ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.702 ns ;
; 0.865 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_3:cop_data_reg|r32_o_9 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|s_cntr_9__Z ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.704 ns ;
; 0.869 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_3:cop_data_reg|r32_o_1 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|s_cntr_1__Z ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.708 ns ;
; 0.873 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|ua_state[2] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|ua_state[3] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.712 ns ;
; 0.874 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_17 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_17 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.713 ns ;
; 0.876 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|ua_state[1] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|ua_state[2] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.715 ns ;
; 0.876 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_1 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_1 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.715 ns ;
; 0.877 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_1 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg:pc_nxt|r32_o_1__Z ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.716 ns ;
; 0.879 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_3:cop_data_reg|r32_o_26 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|s_cntr_26__Z ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.718 ns ;
; 0.907 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|read_request_ff ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[7] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.746 ns ;
; 0.911 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|r32_o_3 ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|r32_reg_cls:spc|r32_o_3 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.750 ns ;
; 0.913 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|read_request_ff ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[5] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.752 ns ;
; 0.918 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|read_request_ff ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[3] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.757 ns ;
; 0.920 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|read_request_ff ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[1] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.759 ns ;
; 0.921 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|read_request_ff ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[4] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.760 ns ;
; 0.922 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|read_request_ff ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[2] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.761 ns ;
; 0.922 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|read_request_ff ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[6] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.761 ns ;
; 0.940 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_1 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_1 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.779 ns ;
; 0.941 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_12 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_12 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.780 ns ;
; 0.942 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_6 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.781 ns ;
; 0.942 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_2 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_2 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.781 ns ;
; 0.942 ns ; mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|pipelinedregs:pipereg|wb_we_reg_clr:U19|wb_we_o_0 ; mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|pipelinedregs:pipereg|wb_we_reg_1:U20|wb_we_o_0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.781 ns ;
; 0.942 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_8 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.781 ns ;
; 0.942 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_9 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.781 ns ;
; 0.943 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_5 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_5 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.782 ns ;
; 0.943 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_21 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_21 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.782 ns ;
; 0.943 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_4:cop_dout_reg|r32_o_19 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_19 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.782 ns ;
; 0.945 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[5] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[4] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.784 ns ;
; 0.946 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[4] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[3] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.785 ns ;
; 0.946 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_13 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_13 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.785 ns ;
; 0.946 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_27 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_27 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.785 ns ;
; 0.947 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_4 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.786 ns ;
; 0.947 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[21] ; mips_sys:isys|mips_dvc:imips_dvc|dout_21 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.786 ns ;
; 0.947 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_3:cop_data_reg|r32_o_24 ; mips_sys:isys|mips_dvc:imips_dvc|cmd[24] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.786 ns ;
; 0.948 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_4:cop_dout_reg|r32_o_17 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_17 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.787 ns ;
; 0.948 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_4:cop_dout_reg|r32_o_23 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_23 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.787 ns ;
; 0.950 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[0] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|buffer_reg_0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.789 ns ;
; 0.951 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_4:cop_dout_reg|r32_o_7 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_7 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.790 ns ;
; 0.951 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[3] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[2] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.790 ns ;
; 0.951 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_22 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_22 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.790 ns ;
; 0.952 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[2] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rx_sr[1] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.791 ns ;
; 0.952 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_20 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_20 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.791 ns ;
; 0.957 ns ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|CurrState_Sreg0_2 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|CurrState_Sreg0[8] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.796 ns ;
; 0.960 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|ua_state_i[0] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|ua_state_i[0] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.799 ns ;
; 0.963 ns ; mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|pipelinedregs:pipereg|dmem_ctl_reg_clr:U15|dmem_ctl_o_3 ; mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|infile_dmem_ctl_reg:dmem_ctl_post|ctl_o_3 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.802 ns ;
; 0.968 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_3 ; mips_sys:isys|mips_dvc:imips_dvc|dout_3 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.807 ns ;
; 0.969 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|ua_state[1] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|ua_state[2] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.808 ns ;
; 0.971 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|b_full ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|b_full ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.810 ns ;
; 0.971 ns ; mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|pipelinedregs:pipereg|dmem_ctl_reg_clr:U15|dmem_ctl_o_0 ; mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|infile_dmem_ctl_reg:dmem_ctl_post|ctl_o_0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.810 ns ;
; 0.973 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|ua_state_i[0] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|ua_state_i[0] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.812 ns ;
; 0.973 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:rd_ptr_count|safe_q[8] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:rd_ptr_count|safe_q[8] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.812 ns ;
; 0.976 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|ua_state_i[0] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|ua_state[1] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.815 ns ;
; 0.979 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[9] ; mips_sys:isys|mips_dvc:imips_dvc|dout_9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.818 ns ;
; 0.983 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_26 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_26 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.822 ns ;
; 1.011 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_9 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.850 ns ;
; 1.012 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_4:cop_dout_reg|r32_o_15 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_15 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.851 ns ;
; 1.015 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[17] ; mips_sys:isys|mips_dvc:imips_dvc|dout_17 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.854 ns ;
; 1.015 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_19 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_19 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.854 ns ;
; 1.016 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:rd_ptr_count|safe_q[5] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:rd_ptr_count|safe_q[5] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.855 ns ;
; 1.017 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:rd_ptr_count|safe_q[3] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:rd_ptr_count|safe_q[3] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.856 ns ;
; 1.017 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_8 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_8 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.856 ns ;
; 1.017 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_27 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_27 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.856 ns ;
; 1.018 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:wr_ptr|safe_q[4] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:wr_ptr|safe_q[4] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.857 ns ;
; 1.018 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:wr_ptr|safe_q[8] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:wr_ptr|safe_q[8] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.857 ns ;
; 1.018 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_10 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_10 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.857 ns ;
; 1.018 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_14 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_14 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.857 ns ;
; 1.018 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr_2 ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr_2 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.857 ns ;
; 1.018 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr[6] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr[6] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.857 ns ;
; 1.018 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_22 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_22 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.857 ns ;
; 1.018 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_12 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_12 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.857 ns ;
; 1.019 ns ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|big_alu:MIPS_alu|muldiv_ff:muldiv_ff|count[3] ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|big_alu:MIPS_alu|muldiv_ff:muldiv_ff|count[3] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.858 ns ;
; 1.019 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_24 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_24 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.858 ns ;
; 1.020 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:wr_ptr|safe_q[0] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:wr_ptr|safe_q[0] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.859 ns ;
; 1.020 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:wr_ptr|safe_q[5] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:wr_ptr|safe_q[5] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.859 ns ;
; 1.020 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_6 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_6 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.859 ns ;
; 1.020 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_16 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_16 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.859 ns ;
; 1.020 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_21 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_21 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.859 ns ;
; 1.020 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_11 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_11 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.859 ns ;
; 1.021 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[5] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[4] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.860 ns ;
; 1.021 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_20 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_20 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.860 ns ;
; 1.021 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_26 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_26 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.860 ns ;
; 1.021 ns ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|big_alu:MIPS_alu|muldiv_ff:muldiv_ff|count[1] ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|big_alu:MIPS_alu|muldiv_ff:muldiv_ff|count[1] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.860 ns ;
; 1.022 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_7 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_7 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.861 ns ;
; 1.022 ns ; mips_sys:isys|mips_core:mips_core|r32_reg_2:alu_pass1|r32_o_3 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_3 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.861 ns ;
; 1.022 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|cntr_cc7:count_usedw|safe_q[8] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|cntr_cc7:count_usedw|safe_q[8] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.861 ns ;
; 1.022 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_24 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_24 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.861 ns ;
; 1.022 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr_3 ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr_3 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.861 ns ;
; 1.022 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd[29] ; mips_sys:isys|mips_dvc:imips_dvc|dout_29 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.861 ns ;
; 1.023 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:wr_ptr|safe_q[3] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|cntr_ud8:wr_ptr|safe_q[3] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.862 ns ;
; 1.023 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|clk_ctr[8] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|clk_ctr[8] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.862 ns ;
; 1.023 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[6] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[5] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.862 ns ;
; 1.023 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr[8] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr[8] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.862 ns ;
; 1.023 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_19 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_19 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.862 ns ;
; 1.023 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_9 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_9 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.862 ns ;
; 1.023 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|bit_ctr[2] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|bit_ctr[2] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.862 ns ;
; 1.023 ns ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|big_alu:MIPS_alu|muldiv_ff:muldiv_ff|count[2] ; mips_sys:isys|mips_core:mips_core|exec_stage:iexec_stage|big_alu:MIPS_alu|muldiv_ff:muldiv_ff|count[2] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.862 ns ;
; 1.024 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_1 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_1 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.863 ns ;
; 1.024 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|cntr_cc7:count_usedw|safe_q[0] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|cntr_cc7:count_usedw|safe_q[0] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.863 ns ;
; 1.024 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[7] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|tx_sr[6] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.863 ns ;
; 1.025 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_4 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_4 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.864 ns ;
; 1.025 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|clk_ctr[6] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|clk_ctr[6] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.864 ns ;
; 1.025 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|clk_ctr[2] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|clk_ctr[2] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.864 ns ;
; 1.025 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_18 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_18 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.864 ns ;
; 1.025 ns ; mips_sys:isys|mips_dvc:imips_dvc|dout_29 ; mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|r_data_29 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.864 ns ;
; 1.026 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|clk_ctr[11] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|clk_ctr[11] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.865 ns ;
; 1.026 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr[11] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr[11] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.865 ns ;
; 1.027 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|cntr_cc7:count_usedw|safe_q[4] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|cntr_cc7:count_usedw|safe_q[4] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.866 ns ;
; 1.027 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|cntr_cc7:count_usedw|safe_q[3] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|cntr_cc7:count_usedw|safe_q[3] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.866 ns ;
; 1.027 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|clk_ctr[12] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|clk_ctr[12] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.866 ns ;
; 1.027 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|ua_state_2 ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|ua_state_2 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.866 ns ;
; 1.027 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr[12] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr[12] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.866 ns ;
; 1.028 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|cntr_cc7:count_usedw|safe_q[5] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|fifo512_cyclone:fifo|scfifo_Z1:scfifo_component|scfifo:U1|scfifo_e4u:auto_generated|a_dpfifo_lqr:dpfifo|a_fefifo_s7f:fifo_state|cntr_cc7:count_usedw|safe_q[5] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.867 ns ;
; 1.028 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr[13] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr[13] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.867 ns ;
; 1.029 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_30 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_30 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.868 ns ;
; 1.030 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|clk_ctr[13] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|clk_ctr[13] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.869 ns ;
; 1.031 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_0 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.870 ns ;
; 1.031 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|clk_ctr[3] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|clk_ctr[3] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.870 ns ;
; 1.036 ns ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_26 ; mips_sys:isys|mips_dvc:imips_dvc|tmr0:mips_tmr0|cntr_26 ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.875 ns ;
; 1.037 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr[1] ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|clk_ctr[1] ; pll50:Ipll|altpll:altpll_component|_clk0 ; pll50:Ipll|altpll:altpll_component|_clk0 ; 0.000 ns ; -0.161 ns ; 0.876 ns ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ; ; ; ; ; ; ;
+-----------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------+------------------------------------------+----------------------------+----------------------------+--------------------------+
+-----------------------------------------------------------------------------------------------------------------------------------+
; tsu ;
+-------+--------------+------------+---------+--------------------------------------------------------------------------+----------+
; Slack ; Required tsu ; Actual tsu ; From ; To ; To Clock ;
+-------+--------------+------------+---------+--------------------------------------------------------------------------+----------+
; N/A ; None ; 5.491 ns ; key1 ; mips_sys:isys|mips_dvc:imips_dvc|r_key1 ; clk ;
; N/A ; None ; 5.479 ns ; key2 ; mips_sys:isys|mips_dvc:imips_dvc|r_key2 ; clk ;
; N/A ; None ; 5.129 ns ; ser_rxd ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rxq1 ; clk ;
; N/A ; None ; 4.680 ns ; rst ; r_rst ; clk ;
+-------+--------------+------------+---------+--------------------------------------------------------------------------+----------+
+--------------------------------------------------------------------------------------------------------------------------------------+
; tco ;
+-------+--------------+------------+-----------------------------------------------------------------------+-------------+------------+
; Slack ; Required tco ; Actual tco ; From ; To ; From Clock ;
+-------+--------------+------------+-----------------------------------------------------------------------+-------------+------------+
; N/A ; None ; 6.738 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd_6 ; led2 ; clk ;
; N/A ; None ; 6.163 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd_5 ; led1 ; clk ;
; N/A ; None ; 5.584 ns ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_write:uart_txd|txd ; ser_txd ; clk ;
; N/A ; None ; 4.764 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[0] ; seg7led2[5] ; clk ;
; N/A ; None ; 4.633 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[2] ; seg7led2[0] ; clk ;
; N/A ; None ; 4.629 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[2] ; seg7led2[6] ; clk ;
; N/A ; None ; 4.523 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[1] ; seg7led2[0] ; clk ;
; N/A ; None ; 4.523 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[1] ; seg7led2[5] ; clk ;
; N/A ; None ; 4.519 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[1] ; seg7led2[6] ; clk ;
; N/A ; None ; 4.392 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[0] ; seg7led2[0] ; clk ;
; N/A ; None ; 4.391 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[0] ; seg7led2[6] ; clk ;
; N/A ; None ; 4.315 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[3] ; seg7led2[5] ; clk ;
; N/A ; None ; 4.312 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[7] ; seg7led1[5] ; clk ;
; N/A ; None ; 4.311 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[3] ; seg7led2[0] ; clk ;
; N/A ; None ; 4.300 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[6] ; seg7led1[4] ; clk ;
; N/A ; None ; 4.300 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[6] ; seg7led1[6] ; clk ;
; N/A ; None ; 4.296 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[6] ; seg7led1[0] ; clk ;
; N/A ; None ; 4.294 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[2] ; seg7led2[3] ; clk ;
; N/A ; None ; 4.292 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[2] ; seg7led2[4] ; clk ;
; N/A ; None ; 4.292 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[6] ; seg7led1[1] ; clk ;
; N/A ; None ; 4.289 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[2] ; seg7led2[2] ; clk ;
; N/A ; None ; 4.284 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[2] ; seg7led2[1] ; clk ;
; N/A ; None ; 4.190 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[1] ; seg7led2[3] ; clk ;
; N/A ; None ; 4.186 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[1] ; seg7led2[2] ; clk ;
; N/A ; None ; 4.177 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[1] ; seg7led2[1] ; clk ;
; N/A ; None ; 4.173 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[4] ; seg7led1[0] ; clk ;
; N/A ; None ; 4.173 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[4] ; seg7led1[4] ; clk ;
; N/A ; None ; 4.171 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[5] ; seg7led1[6] ; clk ;
; N/A ; None ; 4.170 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[5] ; seg7led1[5] ; clk ;
; N/A ; None ; 4.164 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[4] ; seg7led1[1] ; clk ;
; N/A ; None ; 4.137 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[0] ; seg7led2[4] ; clk ;
; N/A ; None ; 4.078 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[5] ; seg7led1[0] ; clk ;
; N/A ; None ; 4.072 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[5] ; seg7led1[1] ; clk ;
; N/A ; None ; 4.058 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd_2 ; lcd_rs ; clk ;
; N/A ; None ; 4.047 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[0] ; seg7led2[2] ; clk ;
; N/A ; None ; 4.044 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[0] ; seg7led2[1] ; clk ;
; N/A ; None ; 4.012 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[2] ; seg7led2[5] ; clk ;
; N/A ; None ; 4.010 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[3] ; seg7led2[6] ; clk ;
; N/A ; None ; 3.982 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[3] ; seg7led2[3] ; clk ;
; N/A ; None ; 3.978 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[3] ; seg7led2[2] ; clk ;
; N/A ; None ; 3.974 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[3] ; seg7led2[4] ; clk ;
; N/A ; None ; 3.969 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[3] ; seg7led2[1] ; clk ;
; N/A ; None ; 3.946 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[6] ; seg7led1[3] ; clk ;
; N/A ; None ; 3.943 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[7] ; seg7led1[0] ; clk ;
; N/A ; None ; 3.943 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[6] ; seg7led1[2] ; clk ;
; N/A ; None ; 3.943 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[7] ; seg7led1[4] ; clk ;
; N/A ; None ; 3.934 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[4] ; seg7led1[5] ; clk ;
; N/A ; None ; 3.933 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[7] ; seg7led1[1] ; clk ;
; N/A ; None ; 3.930 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[4] ; seg7led1[6] ; clk ;
; N/A ; None ; 3.819 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[4] ; seg7led1[2] ; clk ;
; N/A ; None ; 3.817 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[5] ; seg7led1[3] ; clk ;
; N/A ; None ; 3.725 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[5] ; seg7led1[2] ; clk ;
; N/A ; None ; 3.721 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd_3 ; lcd_rw ; clk ;
; N/A ; None ; 3.683 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[5] ; seg7led1[4] ; clk ;
; N/A ; None ; 3.682 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[7] ; seg7led1[6] ; clk ;
; N/A ; None ; 3.681 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[6] ; seg7led1[5] ; clk ;
; N/A ; None ; 3.678 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[0] ; seg7led2[3] ; clk ;
; N/A ; None ; 3.675 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[1] ; seg7led2[4] ; clk ;
; N/A ; None ; 3.590 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[7] ; seg7led1[2] ; clk ;
; N/A ; None ; 3.583 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[7] ; seg7led1[3] ; clk ;
; N/A ; None ; 3.395 ns ; mips_sys:isys|mips_dvc:imips_dvc|cmd_4 ; lcd_en ; clk ;
; N/A ; None ; 3.378 ns ; mips_sys:isys|mips_dvc:imips_dvc|lcd_data_0 ; lcd_data[0] ; clk ;
; N/A ; None ; 3.374 ns ; mips_sys:isys|mips_dvc:imips_dvc|lcd_data_1 ; lcd_data[1] ; clk ;
; N/A ; None ; 3.327 ns ; mips_sys:isys|mips_dvc:imips_dvc|seg7data[4] ; seg7led1[3] ; clk ;
; N/A ; None ; 3.303 ns ; mips_sys:isys|mips_dvc:imips_dvc|lcd_data_4 ; lcd_data[4] ; clk ;
; N/A ; None ; 3.302 ns ; mips_sys:isys|mips_dvc:imips_dvc|lcd_data_5 ; lcd_data[5] ; clk ;
; N/A ; None ; 3.299 ns ; mips_sys:isys|mips_dvc:imips_dvc|lcd_data_6 ; lcd_data[6] ; clk ;
; N/A ; None ; 3.299 ns ; mips_sys:isys|mips_dvc:imips_dvc|lcd_data_7 ; lcd_data[7] ; clk ;
; N/A ; None ; 3.044 ns ; mips_sys:isys|mips_dvc:imips_dvc|lcd_data_2 ; lcd_data[2] ; clk ;
; N/A ; None ; 3.039 ns ; mips_sys:isys|mips_dvc:imips_dvc|lcd_data_3 ; lcd_data[3] ; clk ;
+-------+--------------+------------+-----------------------------------------------------------------------+-------------+------------+
+-----------------------------------------------------------------------------------------------------------------------------------------+
; th ;
+---------------+-------------+-----------+---------+--------------------------------------------------------------------------+----------+
; Minimum Slack ; Required th ; Actual th ; From ; To ; To Clock ;
+---------------+-------------+-----------+---------+--------------------------------------------------------------------------+----------+
; N/A ; None ; -4.639 ns ; rst ; r_rst ; clk ;
; N/A ; None ; -5.088 ns ; ser_rxd ; mips_sys:isys|mips_dvc:imips_dvc|uart0:iuart0|uart_read:uart_rd_tak|rxq1 ; clk ;
; N/A ; None ; -5.438 ns ; key2 ; mips_sys:isys|mips_dvc:imips_dvc|r_key2 ; clk ;
; N/A ; None ; -5.450 ns ; key1 ; mips_sys:isys|mips_dvc:imips_dvc|r_key1 ; clk ;
+---------------+-------------+-----------+---------+--------------------------------------------------------------------------+----------+
+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Timing Analyzer
Info: Version 4.2 Build 157 12/07/2004 SJ Full Version
Info: Processing started: Mon Oct 13 12:02:10 2008
Info: Command: quartus_tan --import_settings_files=off --export_settings_files=off mips_top -c mips_top --timing_analysis_only
Warning: Timing Analysis found one or more latches implemented as combinational loops
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_7__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_6__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_5__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_4__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_3__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_2__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_1__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_0__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:fsm_dly_1_2__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:fsm_dly_1_1__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:fsm_dly_1_0_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:ext_ctl_1_1_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:ext_ctl_1_2_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:rd_sel_1_0_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:cmp_ctl_1_0_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:alu_func_1_1_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:alu_func_1_4_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:alu_func_1_0_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_8__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:wb_mux_0_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_9__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:wb_we_0_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:alu_we_0_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:muxa_ctl_1_0_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_31__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:pc_gen_ctl_1_1_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_20__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|SYNLPM_LATS1:next_delay_counter_Sreg0_5_|lpm_latch:U1|q[0]~14" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:dmem_ctl_1_3_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_22__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_21__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_19__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_18__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_17__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_16__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_30__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_28__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_29__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_10__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_11__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_12__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_23__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_13__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_14__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_25__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_26__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|SYNLPM_LATR1:next_delay_counter_Sreg0_3__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:muxb_ctl_1_0_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_15__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_27__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_24__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:cmp_ctl_1_1_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:cmp_ctl_1_2_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|SYNLPM_LATR1:next_delay_counter_Sreg0_0_|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|SYNLPM_LATR1:next_delay_counter_Sreg0_4__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|SYNLPM_LATR1:next_delay_counter_Sreg0_2__Z|lpm_latch:U1|q[0]~56" is a latch
Warning: Node "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|SYNLPM_LATS1:next_delay_counter_Sreg0_1_|lpm_latch:U1|q[0]~14" is a latch
Info: Found combinational loop of 3 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:cmp_ctl_1_2_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|cmp_ctl_2_0_0_a[2]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|cmp_ctl_2_0_0_2"
Info: Found combinational loop of 5 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:cmp_ctl_1_1_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|cmp_ctl_2_0_0_1"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|cmp_ctl_2_0_0_1_a[1]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|cmp_ctl_2_0_0_1_Z[1]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|cmp_ctl_2_0_0_a[1]"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|SYNLPM_LATR1:next_delay_counter_Sreg0_3__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|SYNLPM_LATS1:next_delay_counter_Sreg0_1_|lpm_latch:U1|q[0]~14"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|SYNLPM_LATR1:next_delay_counter_Sreg0_2__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|SYNLPM_LATR1:next_delay_counter_Sreg0_4__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_23__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_24__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_27__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_19__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_15__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_16__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_10__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|SYNLPM_LATS1:next_delay_counter_Sreg0_5_|lpm_latch:U1|q[0]~14"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|SYNLPM_LATR1:next_delay_counter_Sreg0_0_|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_20__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_18__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_17__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_26__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_25__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_22__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_21__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_14__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_12__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_13__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_11__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_29__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_28__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_30__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 3 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:cmp_ctl_1_0_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|cmp_ctl_2_0_0_0"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|cmp_ctl_2_0_0_1_Z[0]"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_31__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_8__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 2 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_addr_ctl:i_mem_addr_ctl|SYNLPM_LATRS1:wr_en_1_1_|lpm_latch:U1|q[0]~95"
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_addr_ctl:i_mem_addr_ctl|SYNLPM_LATRS1:wr_en_1_1_|lpm_latch:U1|q[0]~94"
Info: Found combinational loop of 2 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_addr_ctl:i_mem_addr_ctl|SYNLPM_LATRS1:wr_en_1_3_|lpm_latch:U1|q[0]~85"
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_addr_ctl:i_mem_addr_ctl|SYNLPM_LATRS1:wr_en_1_3_|lpm_latch:U1|q[0]~84"
Info: Found combinational loop of 6 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:pc_gen_ctl_1_0_|lpm_latch:U1|q[0]~68"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:pc_gen_ctl_1_0_|lpm_latch:U1|q[0]~69"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|pc_gen_ctl_2_i_m3_0_2_a[0]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|pc_gen_ctl_2_i_m3_0_2[0]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|pc_gen_ctl_2_i_m3_0_5[0]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|pc_gen_ctl_2_i_m3_0_0"
Info: Found combinational loop of 4 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:pc_gen_ctl_1_1_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|pc_gen_ctl_2_0_0_a3[1]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|pc_gen_ctl_2_0_0_a[1]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|pc_gen_ctl_2_0_0_0"
Info: Found combinational loop of 7 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:pc_gen_ctl_1_2_|lpm_latch:U1|q[0]~68"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:pc_gen_ctl_1_2_|lpm_latch:U1|q[0]~69"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|pc_gen_ctl_2_i_0_a[2]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|pc_gen_ctl_2_i_0_0"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|pc_gen_ctl_2_i_0_a3_3[2]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|pc_gen_ctl_2_i_0_1_x[2]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|pc_gen_ctl_2_i_0_5[2]"
Info: Found combinational loop of 3 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:rd_sel_1_1_|lpm_latch:U1|q[0]~68"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:rd_sel_1_1_|lpm_latch:U1|q[0]~69"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|rd_sel_2_0_0_1"
Info: Found combinational loop of 2 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:rd_sel_1_0_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|rd_sel_2_0_0_0"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_9__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 3 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:dmem_ctl_1_0_|lpm_latch:U1|q[0]~68"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:dmem_ctl_1_0_|lpm_latch:U1|q[0]~69"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|dmem_ctl_2_0_0_0"
Info: Found combinational loop of 3 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:dmem_ctl_1_1_|lpm_latch:U1|q[0]~68"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:dmem_ctl_1_1_|lpm_latch:U1|q[0]~69"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|dmem_ctl_2_0_0_1"
Info: Found combinational loop of 4 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:dmem_ctl_1_2_|lpm_latch:U1|q[0]~68"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:dmem_ctl_1_2_|lpm_latch:U1|q[0]~69"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|dmem_ctl_2_0_0_a3[2]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|dmem_ctl_2_0_0_2"
Info: Found combinational loop of 2 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:dmem_ctl_1_3_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|dmem_ctl_2_0_0_3"
Info: Found combinational loop of 2 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:ext_ctl_1_2_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|ext_ctl_2_0_0_0"
Info: Found combinational loop of 3 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:ext_ctl_1_1_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|ext_ctl_2_i_m3_0_a[1]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|ext_ctl_2_i_m3_0_1"
Info: Found combinational loop of 6 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:ext_ctl_1_0_|lpm_latch:U1|q[0]~68"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:ext_ctl_1_0_|lpm_latch:U1|q[0]~69"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|ext_ctl_2_i_m3_0_a_x[0]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|ext_ctl_2_i_m3_0_0"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|ext_ctl_2_i_m3_0_2_a[0]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|ext_ctl_2_i_m3_0_2[0]"
Info: Found combinational loop of 6 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:muxa_ctl_1_1_|lpm_latch:U1|q[0]~68"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:muxa_ctl_1_1_|lpm_latch:U1|q[0]~69"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|muxa_ctl_2_0_0_0_a[1]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|muxa_ctl_2_0_0_0_Z[1]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|muxa_ctl_2_0_0_2[1]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|muxa_ctl_2_0_0_x_0"
Info: Found combinational loop of 5 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:muxb_ctl_1_1_|lpm_latch:U1|q[0]~68"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:muxb_ctl_1_1_|lpm_latch:U1|q[0]~69"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|muxb_ctl_2_0_0_0_a[1]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|muxb_ctl_2_0_0_0_Z[1]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|muxb_ctl_2_0_0_1"
Info: Found combinational loop of 3 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:muxb_ctl_1_0_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|muxb_ctl_2_0_0_a[0]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|muxb_ctl_2_0_0_0"
Info: Found combinational loop of 3 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:alu_we_0_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|alu_we_1_0_0_0_Z[0]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|alu_we_1_0_0_0"
Info: Found combinational loop of 2 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:wb_we_0_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|wb_we_1_0_0_0"
Info: Found combinational loop of 7 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:alu_func_1_2_|lpm_latch:U1|q[0]~68"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:alu_func_1_2_|lpm_latch:U1|q[0]~69"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|alu_func_2_i_m3_0_5_a[2]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|alu_func_2_i_m3_0_5[2]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|alu_func_2_i_m3_0_0"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|alu_func_2_i_m3_0_2_a[2]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|alu_func_2_i_m3_0_2[2]"
Info: Found combinational loop of 2 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_addr_ctl:i_mem_addr_ctl|SYNLPM_LATRS1:wr_en_1_2_|lpm_latch:U1|q[0]~85"
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_addr_ctl:i_mem_addr_ctl|SYNLPM_LATRS1:wr_en_1_2_|lpm_latch:U1|q[0]~84"
Info: Found combinational loop of 2 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:wb_mux_0_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|wb_mux_1_0_0_0"
Info: Found combinational loop of 2 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_addr_ctl:i_mem_addr_ctl|SYNLPM_LATRS1:wr_en_1_0_|lpm_latch:U1|q[0]~95"
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_addr_ctl:i_mem_addr_ctl|SYNLPM_LATRS1:wr_en_1_0_|lpm_latch:U1|q[0]~94"
Info: Found combinational loop of 4 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:alu_func_1_3_|lpm_latch:U1|q[0]~68"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATRS1:alu_func_1_3_|lpm_latch:U1|q[0]~69"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|alu_func_2_0_0_a3_0[3]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|alu_func_2_0_0_3"
Info: Found combinational loop of 3 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:muxa_ctl_1_0_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|muxa_ctl_2_0_0_a[0]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|muxa_ctl_2_0_0_0"
Info: Found combinational loop of 2 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:alu_func_1_1_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|alu_func_2_0_0_1"
Info: Found combinational loop of 2 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:fsm_dly_1_0_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|fsm_dly_2_0_0_0"
Info: Found combinational loop of 3 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:fsm_dly_1_1__Z|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|fsm_dly_2_i_m3_0_a[1]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|fsm_dly_2_i_m3_0[1]"
Info: Found combinational loop of 3 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:fsm_dly_1_2__Z|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|fsm_dly_2_0_0_a[2]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|fsm_dly_2_0_0[2]"
Info: Found combinational loop of 2 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:alu_func_1_4_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|alu_func_2_0_0_4"
Info: Found combinational loop of 3 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|SYNLPM_LATR1:alu_func_1_0_|lpm_latch:U1|q[0]~56"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|alu_func_2_0_0_a[0]"
Info: Node "mips_sys:isys|mips_core:mips_core|decode_pipe:decoder_pipe|decoder:idecoder|alu_func_2_0_0_0"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_0__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_1__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_2__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_3__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_4__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_5__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_6__Z|lpm_latch:U1|q[0]~56"
Info: Found combinational loop of 1 nodes
Info: Node "mips_sys:isys|mips_core:mips_core|mem_module:MEM_CTL|mem_dout_ctl:i_mem_dout_ctl|SYNLPM_LATR1:dout_1_7__Z|lpm_latch:U1|q[0]~56"
Info: Found timing assignments -- calculating delays
Info: Slack time is 83 ps for clock "pll50:Ipll|altpll:altpll_component|_clk0" between source register "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23" and destination memory "mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg5"
Info: Fmax is 50.21 MHz (period= 19.917 ns)
Info: + Largest register to memory requirement is 19.804 ns
Info: + Setup relationship between source and destination is 20.000 ns
Info: + Latch edge is 18.550 ns
Info: Clock period of Destination clock "pll50:Ipll|altpll:altpll_component|_clk0" is 20.000 ns with offset of -1.450 ns and duty cycle of 50
Info: Multicycle Setup factor for Destination register is 1
Info: - Launch edge is -1.450 ns
Info: Clock period of Source clock "pll50:Ipll|altpll:altpll_component|_clk0" is 20.000 ns with offset of -1.450 ns and duty cycle of 50
Info: Multicycle Setup factor for Source register is 1
Info: Clock setup uncertainty between source and destination is 0.000 ns
Info: + Largest clock skew is 0.049 ns
Info: + Shortest clock path from clock "pll50:Ipll|altpll:altpll_component|_clk0" to destination memory is 1.857 ns
Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1560; CLK Node = 'pll50:Ipll|altpll:altpll_component|_clk0'
Info: 2: + IC(1.301 ns) + CELL(0.556 ns) = 1.857 ns; Loc. = M4K_X17_Y19; Fanout = 2; MEM Node = 'mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg5'
Info: Total cell delay = 0.556 ns ( 29.94 % )
Info: Total interconnect delay = 1.301 ns ( 70.06 % )
Info: - Longest clock path from clock "pll50:Ipll|altpll:altpll_component|_clk0" to source register is 1.808 ns
Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1560; CLK Node = 'pll50:Ipll|altpll:altpll_component|_clk0'
Info: 2: + IC(1.261 ns) + CELL(0.547 ns) = 1.808 ns; Loc. = LC_X26_Y9_N8; Fanout = 4; REG Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23'
Info: Total cell delay = 0.547 ns ( 30.25 % )
Info: Total interconnect delay = 1.261 ns ( 69.75 % )
Info: - Micro clock to output delay of source is 0.173 ns
Info: - Micro setup delay of destination is 0.072 ns
Info: - Longest register to memory delay is 19.721 ns
Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X26_Y9_N8; Fanout = 4; REG Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|r32_reg_clr_cls:ins_reg|r32_o_23'
Info: 2: + IC(1.264 ns) + CELL(0.340 ns) = 1.604 ns; Loc. = LC_X25_Y10_N4; Fanout = 1; COMB Node = 'mips_sys:isys|mips_core:mips_core|forward:iforward|forward_node_fw_alu_rs_2:fw_cmp_rs|un1_mux_fw_NE_a'
Info: 3: + IC(0.980 ns) + CELL(0.454 ns) = 3.038 ns; Loc. = LC_X25_Y8_N2; Fanout = 1; COMB Node = 'mips_sys:isys|mips_core:mips_core|forward:iforward|forward_node_fw_alu_rs_2:fw_cmp_rs|un1_mux_fw_NE'
Info: 4: + IC(0.326 ns) + CELL(0.454 ns) = 3.818 ns; Loc. = LC_X25_Y8_N8; Fanout = 35; COMB Node = 'mips_sys:isys|mips_core:mips_core|forward:iforward|forward_node_fw_alu_rs_2:fw_cmp_rs|mux_fw_1'
Info: 5: + IC(0.377 ns) + CELL(0.225 ns) = 4.420 ns; Loc. = LC_X25_Y8_N6; Fanout = 32; COMB Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|reg_array:reg_bank_cZ|N_14_i_0_s2'
Info: 6: + IC(1.765 ns) + CELL(0.088 ns) = 6.273 ns; Loc. = LC_X16_Y11_N0; Fanout = 1; COMB Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|fwd_mux_1:rs_fwd_rs|dout_iv_1_a[4]'
Info: 7: + IC(0.307 ns) + CELL(0.340 ns) = 6.920 ns; Loc. = LC_X16_Y11_N8; Fanout = 2; COMB Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|fwd_mux_1:rs_fwd_rs|dout_iv_1_4'
Info: 8: + IC(0.140 ns) + CELL(0.088 ns) = 7.148 ns; Loc. = LC_X16_Y11_N9; Fanout = 3; COMB Node = 'mips_sys:isys|mips_core:mips_core|r32_reg_7:rs_reg|dout_iv_4'
Info: 9: + IC(1.599 ns) + CELL(0.340 ns) = 9.087 ns; Loc. = LC_X21_Y7_N4; Fanout = 1; COMB Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|compare:i_cmp|res_2_NE_6'
Info: 10: + IC(1.199 ns) + CELL(0.340 ns) = 10.626 ns; Loc. = LC_X24_Y11_N0; Fanout = 1; COMB Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|compare:i_cmp|res_2_NE_10_0'
Info: 11: + IC(0.313 ns) + CELL(0.340 ns) = 11.279 ns; Loc. = LC_X24_Y11_N5; Fanout = 2; COMB Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|compare:i_cmp|res_2_NE'
Info: 12: + IC(0.326 ns) + CELL(0.088 ns) = 11.693 ns; Loc. = LC_X24_Y11_N4; Fanout = 1; COMB Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|compare:i_cmp|res_3_0'
Info: 13: + IC(0.525 ns) + CELL(0.340 ns) = 12.558 ns; Loc. = LC_X23_Y11_N1; Fanout = 2; COMB Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|compare:i_cmp|res_7_0'
Info: 14: + IC(0.140 ns) + CELL(0.088 ns) = 12.786 ns; Loc. = LC_X23_Y11_N2; Fanout = 31; COMB Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|pc_gen:i_pc_gen|un1_pc_prectl_1_0_a3[0]'
Info: 15: + IC(1.030 ns) + CELL(0.088 ns) = 13.904 ns; Loc. = LC_X24_Y12_N4; Fanout = 3; COMB Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|pc_gen:i_pc_gen|un1_pc_prectl_1_0_a4[6]'
Info: 16: + IC(0.989 ns) + CELL(0.443 ns) = 15.336 ns; Loc. = LC_X23_Y10_N0; Fanout = 2; COMB Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|pc_gen:i_pc_gen|un1_pc_carry_6~COUT1_1'
Info: 17: + IC(0.000 ns) + CELL(0.468 ns) = 15.804 ns; Loc. = LC_X23_Y10_N1; Fanout = 2; COMB Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|pc_gen:i_pc_gen|un1_pc_add7'
Info: 18: + IC(1.228 ns) + CELL(0.088 ns) = 17.120 ns; Loc. = LC_X19_Y9_N6; Fanout = 16; COMB Node = 'mips_sys:isys|mips_core:mips_core|r32_reg_6:pc|pc_next_0_iv_7'
Info: 19: + IC(2.306 ns) + CELL(0.295 ns) = 19.721 ns; Loc. = M4K_X17_Y19; Fanout = 2; MEM Node = 'mem_array:ram_8k|ram2048x8_3:ram3|altsyncram:altsyncram_component|altsyncram_hht1:auto_generated|ram_block1a4~porta_address_reg5'
Info: Total cell delay = 4.907 ns ( 24.88 % )
Info: Total interconnect delay = 14.814 ns ( 75.12 % )
Info: No valid register-to-register data paths exist for clock "clk"
Info: Minimum slack time is 566 ps for clock "pll50:Ipll|altpll:altpll_component|_clk0" between source register "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|delay_counter_Sreg0[0]" and destination register "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|delay_counter_Sreg0[0]"
Info: + Shortest register to register delay is 0.405 ns
Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X30_Y17_N7; Fanout = 9; REG Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|delay_counter_Sreg0[0]'
Info: 2: + IC(0.000 ns) + CELL(0.291 ns) = 0.291 ns; Loc. = LC_X30_Y17_N7; Fanout = 2; COMB LOOP Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|SYNLPM_LATR1:next_delay_counter_Sreg0_0_|lpm_latch:U1|q[0]~56'
Info: Loc. = LC_X30_Y17_N7; Node "mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|SYNLPM_LATR1:next_delay_counter_Sreg0_0_|lpm_latch:U1|q[0]~56"
Info: 3: + IC(0.000 ns) + CELL(0.114 ns) = 0.405 ns; Loc. = LC_X30_Y17_N7; Fanout = 9; REG Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|delay_counter_Sreg0[0]'
Info: Total cell delay = 0.405 ns ( 100.00 % )
Info: - Smallest register to register requirement is -0.161 ns
Info: + Hold relationship between source and destination is 0.000 ns
Info: + Latch edge is -1.450 ns
Info: Clock period of Destination clock "pll50:Ipll|altpll:altpll_component|_clk0" is 20.000 ns with offset of -1.450 ns and duty cycle of 50
Info: Multicycle Setup factor for Destination register is 1
Info: Multicycle Hold factor for Destination register is 1
Info: - Launch edge is -1.450 ns
Info: Clock period of Source clock "pll50:Ipll|altpll:altpll_component|_clk0" is 20.000 ns with offset of -1.450 ns and duty cycle of 50
Info: Multicycle Setup factor for Source register is 1
Info: Multicycle Hold factor for Source register is 1
Info: Clock hold uncertainty between source and destination is 0.000 ns
Info: + Smallest clock skew is 0.000 ns
Info: + Longest clock path from clock "pll50:Ipll|altpll:altpll_component|_clk0" to destination register is 1.848 ns
Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1560; CLK Node = 'pll50:Ipll|altpll:altpll_component|_clk0'
Info: 2: + IC(1.301 ns) + CELL(0.547 ns) = 1.848 ns; Loc. = LC_X30_Y17_N7; Fanout = 9; REG Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|delay_counter_Sreg0[0]'
Info: Total cell delay = 0.547 ns ( 29.60 % )
Info: Total interconnect delay = 1.301 ns ( 70.40 % )
Info: - Shortest clock path from clock "pll50:Ipll|altpll:altpll_component|_clk0" to source register is 1.848 ns
Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1560; CLK Node = 'pll50:Ipll|altpll:altpll_component|_clk0'
Info: 2: + IC(1.301 ns) + CELL(0.547 ns) = 1.848 ns; Loc. = LC_X30_Y17_N7; Fanout = 9; REG Node = 'mips_sys:isys|mips_core:mips_core|rf_stage:iRF_stage|ctl_FSM:MIAN_FSM|delay_counter_Sreg0[0]'
Info: Total cell delay = 0.547 ns ( 29.60 % )
Info: Total interconnect delay = 1.301 ns ( 70.40 % )
Info: - Micro clock to output delay of source is 0.173 ns
Info: + Micro hold delay of destination is 0.012 ns
Info: tsu for register "mips_sys:isys|mips_dvc:imips_dvc|r_key1" (data pin = "key1", clock pin = "clk") is 5.491 ns
Info: + Longest pin to register delay is 5.820 ns
Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_156; Fanout = 1; PIN Node = 'key1'
Info: 2: + IC(4.452 ns) + CELL(0.238 ns) = 5.820 ns; Loc. = LC_X33_Y6_N9; Fanout = 1; REG Node = 'mips_sys:isys|mips_dvc:imips_dvc|r_key1'
Info: Total cell delay = 1.368 ns ( 23.51 % )
Info: Total interconnect delay = 4.452 ns ( 76.49 % )
Info: + Micro setup delay of destination is 0.029 ns
Info: - Offset between input clock "clk" and output clock "pll50:Ipll|altpll:altpll_component|_clk0" is -1.450 ns
Info: - Shortest clock path from clock "pll50:Ipll|altpll:altpll_component|_clk0" to destination register is 1.808 ns
Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1560; CLK Node = 'pll50:Ipll|altpll:altpll_component|_clk0'
Info: 2: + IC(1.261 ns) + CELL(0.547 ns) = 1.808 ns; Loc. = LC_X33_Y6_N9; Fanout = 1; REG Node = 'mips_sys:isys|mips_dvc:imips_dvc|r_key1'
Info: Total cell delay = 0.547 ns ( 30.25 % )
Info: Total interconnect delay = 1.261 ns ( 69.75 % )
Info: tco from clock "clk" to destination pin "led2" through register "mips_sys:isys|mips_dvc:imips_dvc|cmd_6" is 6.738 ns
Info: + Offset between input clock "clk" and output clock "pll50:Ipll|altpll:altpll_component|_clk0" is -1.450 ns
Info: + Longest clock path from clock "pll50:Ipll|altpll:altpll_component|_clk0" to source register is 1.808 ns
Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1560; CLK Node = 'pll50:Ipll|altpll:altpll_component|_clk0'
Info: 2: + IC(1.261 ns) + CELL(0.547 ns) = 1.808 ns; Loc. = LC_X34_Y6_N8; Fanout = 2; REG Node = 'mips_sys:isys|mips_dvc:imips_dvc|cmd_6'
Info: Total cell delay = 0.547 ns ( 30.25 % )
Info: Total interconnect delay = 1.261 ns ( 69.75 % )
Info: + Micro clock to output delay of source is 0.173 ns
Info: + Longest register to pin delay is 6.207 ns
Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X34_Y6_N8; Fanout = 2; REG Node = 'mips_sys:isys|mips_dvc:imips_dvc|cmd_6'
Info: 2: + IC(4.573 ns) + CELL(1.634 ns) = 6.207 ns; Loc. = PIN_2; Fanout = 0; PIN Node = 'led2'
Info: Total cell delay = 1.634 ns ( 26.33 % )
Info: Total interconnect delay = 4.573 ns ( 73.67 % )
Info: th for register "r_rst" (data pin = "rst", clock pin = "clk") is -4.639 ns
Info: + Offset between input clock "clk" and output clock "pll50:Ipll|altpll:altpll_component|_clk0" is -1.450 ns
Info: + Longest clock path from clock "pll50:Ipll|altpll:altpll_component|_clk0" to destination register is 1.848 ns
Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 1560; CLK Node = 'pll50:Ipll|altpll:altpll_component|_clk0'
Info: 2: + IC(1.301 ns) + CELL(0.547 ns) = 1.848 ns; Loc. = LC_X33_Y13_N8; Fanout = 1; REG Node = 'r_rst'
Info: Total cell delay = 0.547 ns ( 29.60 % )
Info: Total interconnect delay = 1.301 ns ( 70.40 % )
Info: + Micro hold delay of destination is 0.012 ns
Info: - Shortest pin to register delay is 5.049 ns
Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_159; Fanout = 1; PIN Node = 'rst'
Info: 2: + IC(3.830 ns) + CELL(0.089 ns) = 5.049 ns; Loc. = LC_X33_Y13_N8; Fanout = 1; REG Node = 'r_rst'
Info: Total cell delay = 1.219 ns ( 24.14 % )
Info: Total interconnect delay = 3.830 ns ( 75.86 % )
Info: All timing requirements were met. See Report window for more details.
Info: Quartus II Timing Analyzer was successful. 0 errors, 58 warnings
Info: Processing ended: Mon Oct 13 12:02:29 2008
Info: Elapsed time: 00:00:19
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