OpenCores
URL https://opencores.org/ocsvn/mips_enhanced/mips_enhanced/trunk

Subversion Repositories mips_enhanced

[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [bin/] [tkconfig/] [.null] - Rev 2

Compare with Previous | Blame | View Log

/*
 * Automatically generated C config: don't edit
 */
#define AUTOCONF_INCLUDED
#define CONFIG_PERI_LCONF 1
/*
 * Synthesis 
 */
#undef  CONFIG_SYN_GENERIC
#undef  CONFIG_SYN_ATC35
#undef  CONFIG_SYN_ATC25
#undef  CONFIG_SYN_ATC18
#undef  CONFIG_SYN_FS90
#undef  CONFIG_SYN_UMC018
#undef  CONFIG_SYN_TSMC025
#undef  CONFIG_SYN_PROASIC
#undef  CONFIG_SYN_AXCEL
#define CONFIG_SYN_VIRTEX 1
#undef  CONFIG_SYN_VIRTEX2
#undef  CONFIG_SYN_INFER_RAM
#undef  CONFIG_SYN_INFER_REGF
#undef  CONFIG_SYN_INFER_ROM
#define CONFIG_SYN_INFER_MULT 1
#define CONFIG_SYN_RFTYPE 1
#define CONFIG_SYN_TRACE_DPRAM 1
/*
 * Clock generation
 */
#define CONFIG_CLK_VIRTEX 1
#undef  CONFIG_CLKDLL_1_2
#define CONFIG_CLKDLL_1_1 1
#undef  CONFIG_CLKDLL_2_1
#undef  CONFIG_PCI_DLL
/*
 * Processor            
 */
/*
 * Integer unit                                           
 */
#define CONFIG_IU_NWINDOWS (8)
#undef  CONFIG_IU_V8MULDIV
#define CONFIG_IU_LDELAY (1)
#define CONFIG_IU_FASTJUMP 1
#define CONFIG_IU_ICCHOLD 1
#define CONFIG_IU_FASTDECODE 1
#define CONFIG_IU_WATCHPOINTS (2)
#define CONFIG_IU_IMPL 0x0
#define CONFIG_IU_VER 0x0
/*
 * Floating-point unit
 */
#undef  CONFIG_FPU_ENABLE
/*
 * Co-processor
 */
#undef  CONFIG_CP_ENABLE
/*
 * Cache system              
 */
/*
 * Instruction cache                              
 */
#undef  CONFIG_ICACHE_ASSO1
#define CONFIG_ICACHE_ASSO2 1
#undef  CONFIG_ICACHE_ASSO3
#undef  CONFIG_ICACHE_ASSO4
#undef  CONFIG_ICACHE_SZ1
#define CONFIG_ICACHE_SZ2 1
#undef  CONFIG_ICACHE_SZ4
#undef  CONFIG_ICACHE_SZ8
#undef  CONFIG_ICACHE_SZ16
#undef  CONFIG_ICACHE_SZ32
#undef  CONFIG_ICACHE_SZ64
#undef  CONFIG_ICACHE_LZ16
#define CONFIG_ICACHE_LZ32 1
#undef  CONFIG_ICACHE_ALGORND
#define CONFIG_ICACHE_ALGOLRR 1
#undef  CONFIG_ICACHE_ALGOLRU
#undef  CONFIG_ICACHE_LOCK
/*
 * Data cache
 */
#undef  CONFIG_DCACHE_ASSO1
#define CONFIG_DCACHE_ASSO2 1
#undef  CONFIG_DCACHE_ASSO3
#undef  CONFIG_DCACHE_ASSO4
#undef  CONFIG_DCACHE_SZ1
#define CONFIG_DCACHE_SZ2 1
#undef  CONFIG_DCACHE_SZ4
#undef  CONFIG_DCACHE_SZ8
#undef  CONFIG_DCACHE_SZ16
#undef  CONFIG_DCACHE_SZ32
#undef  CONFIG_DCACHE_SZ64
#undef  CONFIG_DCACHE_LZ16
#define CONFIG_DCACHE_LZ32 1
#undef  CONFIG_DCACHE_ALGORND
#define CONFIG_DCACHE_ALGOLRR 1
#undef  CONFIG_DCACHE_ALGOLRU
#undef  CONFIG_DCACHE_LOCK
#undef  CONFIG_DCACHE_SNOOP
#undef  CONFIG_DCACHE_RFAST
#undef  CONFIG_DCACHE_WFAST
#undef  CONFIG_DCACHE_LRAM
/*
 * Debug support unit          
 */
#define CONFIG_DSU_ENABLE 1
#define CONFIG_DSU_TRACEBUF 1
#undef  CONFIG_DSU_MIXED_TRACE
#undef  CONFIG_DSU_TRACESZ64
#define CONFIG_DSU_TRACESZ128 1
#undef  CONFIG_DSU_TRACESZ256
#undef  CONFIG_DSU_TRACESZ512
#undef  CONFIG_DSU_TRACESZ1024
/*
 * AMBA configuration
 */
#define CONFIG_AHB_DEFMST (0)
#undef  CONFIG_AHB_SPLIT
/*
 * Memory controller
 */
#undef  CONFIG_MCTRL_8BIT
#undef  CONFIG_MCTRL_16BIT
#undef  CONFIG_PERI_WPROT
#undef  CONFIG_MCTRL_WFB
#undef  CONFIG_MCTRL_5CS
#undef  CONFIG_MCTRL_SDRAM
/*
 * Peripherals        
 */
#define CONFIG_PERI_LCONF 1
#undef  CONFIG_PERI_IRQ2
#undef  CONFIG_PERI_WDOG
#undef  CONFIG_PERI_AHBSTAT
#undef  CONFIG_AHBRAM_ENABLE
/*
 * Ethernet interface          
 */
#undef  CONFIG_ETH_ENABLE
/*
 * PCI interface          
 */
#undef  CONFIG_PCI_ENABLE
/*
 * Boot options
 */
#define CONFIG_BOOT_EXTPROM 1
#undef  CONFIG_BOOT_INTPROM
#undef  CONFIG_BOOT_MIXPROM
/*
 * VHDL Debugging        
 */
#undef  CONFIG_DEBUG_UART
#undef  CONFIG_DEBUG_IURF
#undef  CONFIG_DEBUG_NOHALT
#undef  CONFIG_DEBUG_PC32

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.