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Subversion Repositories mips_enhanced
[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [boards/] [avnet-xc2v1500/] [default.ucf] - Rev 2
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################################################################################# UCF Generator File Disclaimer## The UCF file information provided by Xilinx is provided solely for your# convenience. Xilinx makes no warranties, and accepts no liability, with# respect to such information or its use, and any use thereof is solely at# the risk of the user. In addition, Xilinx does not assume any liability# arising out of such use; nor does it convey any license under its# patents, copyrights, maskwork, or any rights of others.## File: xc2v1500ff896_64_66.ucf (PCI edge: left CLK edge: up)# Rev: 1.0.0# This is for generating PCI-X only bitstreams.## Use this file only with the device listed below. Any other# combination is invalid. Do not modify this file except in# regions designated for "User" constraints.## Copyright (c) 2000 Xilinx, Inc. All rights reserved.################################################################################## Define Device, Package, And Speed Grade#################################################################################CONFIG PART = XC2V1500-FF896-5 ;################################################################################## Prohibited Pins List#################################################################################CONFIG PROHIBIT = "AJ28" ; #IO_RDWR_BCONFIG PROHIBIT = "AK29" ; #IO_CS_BCONFIG PROHIBIT = "AK2" ; #IO_DOUTCONFIG PROHIBIT = "AE8" ; #IO_D0CONFIG PROHIBIT = "AF9" ; #IO_D1CONFIG PROHIBIT = "AH5" ; #IO_D2CONFIG PROHIBIT = "AH6" ; #IO_D3CONFIG PROHIBIT = "AH26" ; #IO_D4CONFIG PROHIBIT = "AJ27" ; #IO_D5CONFIG PROHIBIT = "AE22" ; #IO_D6CONFIG PROHIBIT = "AE23" ; #IO_D7CONFIG PROHIBIT = "AJ3" ; #IO_INIT_B################################################################################### I/O Assignment#################################################################################NET "XPCI_WRAP/CLK_I" LOC = "F14" ; #NET "XPCI_WRAP/INT_O" LOC = "K5" ; #NET "XPCI_WRAP/PME_O" LOC = "L2" ; #NET "XPCI_WRAP/REQ_O" LOC = "K2" ; #NET "XPCI_WRAP/GNT_I" LOC = "M8" ; #NET "XPCI_WRAP/RST_I" LOC = "N8" ; #NET "XPCI_WRAP/AD_IO<31>" LOC = "L4" ; #NET "XPCI_WRAP/AD_IO<30>" LOC = "M4" ; #NET "XPCI_WRAP/AD_IO<29>" LOC = "M1" ; #NET "XPCI_WRAP/AD_IO<28>" LOC = "L1" ; #NET "XPCI_WRAP/AD_IO<27>" LOC = "M7" ; #NET "XPCI_WRAP/AD_IO<26>" LOC = "N7" ; #NET "XPCI_WRAP/AD_IO<25>" LOC = "M3" ; #NET "XPCI_WRAP/AD_IO<24>" LOC = "L3" ; #NET "XPCI_WRAP/CBE_IO<3>" LOC = "R2" ; #NET "XPCI_WRAP/IDSEL_I" LOC = "P2" ; #NET "XPCI_WRAP/AD_IO<23>" LOC = "P8" ; #NET "XPCI_WRAP/AD_IO<22>" LOC = "R8" ; #NET "XPCI_WRAP/AD_IO<21>" LOC = "P4" ; #NET "XPCI_WRAP/AD_IO<20>" LOC = "R4" ; #NET "XPCI_WRAP/AD_IO<19>" LOC = "R1" ; #NET "XPCI_WRAP/AD_IO<18>" LOC = "T2" ; #NET "XPCI_WRAP/AD_IO<17>" LOC = "R7" ; #NET "XPCI_WRAP/AD_IO<16>" LOC = "R6" ; #NET "XPCI_WRAP/CBE_IO<2>" LOC = "R3" ; #NET "XPCI_WRAP/FRAME_IO" LOC = "P3" ; #NET "XPCI_WRAP/IRDY_IO" LOC = "T7" ; #NET "XPCI_WRAP/TRDY_IO" LOC = "T6" ; #NET "XPCI_WRAP/DEVSEL_IO" LOC = "U1" ; #NET "XPCI_WRAP/STOP_IO" LOC = "V1" ; #NET "XPCI_WRAP/PERR_IO" LOC = "T3" ; #NET "XPCI_WRAP/SERR_IO" LOC = "U3" ; #NET "XPCI_WRAP/PAR_IO" LOC = "T8" ; #NET "XPCI_WRAP/CBE_IO<1>" LOC = "U8" ; #NET "XPCI_WRAP/AD_IO<15>" LOC = "U2" ; #NET "XPCI_WRAP/AD_IO<14>" LOC = "V2" ; #NET "XPCI_WRAP/AD_IO<13>" LOC = "T4" ; #NET "XPCI_WRAP/AD_IO<12>" LOC = "U4" ; #NET "XPCI_WRAP/AD_IO<11>" LOC = "W7" ; #NET "XPCI_WRAP/AD_IO<10>" LOC = "V7" ; #NET "XPCI_WRAP/AD_IO<9>" LOC = "V5" ; #NET "XPCI_WRAP/AD_IO<8>" LOC = "W6" ; #NET "XPCI_WRAP/CBE_IO<0>" LOC = "W3" ; #NET "XPCI_WRAP/AD_IO<7>" LOC = "Y3" ; #NET "XPCI_WRAP/AD_IO<6>" LOC = "V8" ; #NET "XPCI_WRAP/AD_IO<5>" LOC = "W8" ; #NET "XPCI_WRAP/AD_IO<4>" LOC = "AA1" ; #NET "XPCI_WRAP/AD_IO<3>" LOC = "AB1" ; #NET "XPCI_WRAP/AD_IO<2>" LOC = "Y4" ; #NET "XPCI_WRAP/AD_IO<1>" LOC = "AA4" ; #NET "XPCI_WRAP/AD_IO<0>" LOC = "Y5"; # "AA6" ; #NET "XPCI_WRAP/ACK64_IO" LOC = "Y6" ; #NET "XPCI_WRAP/REQ64_IO" LOC = "AD2"; # "AA2" ; #NET "XPCI_WRAP/CBE_IO<7>" LOC = "Y7"; # "AB2" ; #NET "XPCI_WRAP/CBE_IO<6>" LOC = "AC2"; # "Y5" ; #NET "XPCI_WRAP/CBE_IO<5>" LOC = "AA6"; # "AA5" ; #NET "XPCI_WRAP/CBE_IO<4>" LOC = "AA2"; # "Y8" ; #NET "XPCI_WRAP/PAR64_IO" LOC = "AA8" ; #NET "XPCI_WRAP/AD_IO<63>" LOC = "AA7"; # "AC2" ; #NET "XPCI_WRAP/AD_IO<62>" LOC = "AB2"; # "AD2" ; #NET "XPCI_WRAP/AD_IO<61>" LOC = "Y8"; # "Y7" ; #NET "XPCI_WRAP/AD_IO<60>" LOC = "AA5"; # "AA7" ; #NET "XPCI_WRAP/AD_IO<59>" LOC = "AB3"; # "AC6" ; #NET "XPCI_WRAP/AD_IO<58>" LOC = "AB6" ; #NET "XPCI_WRAP/AD_IO<57>" LOC = "AC4"; # "AD1" ; #NET "XPCI_WRAP/AD_IO<56>" LOC = "AB5"; # "AE1" ; #NET "XPCI_WRAP/AD_IO<55>" LOC = "AB4"; # "AB3" ; #NET "XPCI_WRAP/AD_IO<54>" LOC = "AC6"; # "AC3" ; #NET "XPCI_WRAP/AD_IO<53>" LOC = "AD1"; # "AB7" ; #NET "XPCI_WRAP/AD_IO<52>" LOC = "AC7" ; #NET "XPCI_WRAP/AD_IO<51>" LOC = "AC5"; # "AB4" ; #NET "XPCI_WRAP/AD_IO<50>" LOC = "AE1"; # "AC4" ; #NET "XPCI_WRAP/AD_IO<49>" LOC = "AB7"; # "AB5" ; #NET "XPCI_WRAP/AD_IO<48>" LOC = "AC3"; # "AC5" ; #NET "XPCI_WRAP/AD_IO<47>" LOC = "AD3"; # "AC8" ; #NET "XPCI_WRAP/AD_IO<46>" LOC = "AB8" ; #NET "XPCI_WRAP/AD_IO<45>" LOC = "AG1"; # "AE2" ; #NET "XPCI_WRAP/AD_IO<44>" LOC = "AD4"; # "AF3" ; #NET "XPCI_WRAP/AD_IO<43>" LOC = "AF1"; # "AD3" ; #NET "XPCI_WRAP/AD_IO<42>" LOC = "AC8"; # "AE3" ; #NET "XPCI_WRAP/AD_IO<41>" LOC = "AE2"; # "AD6" ; #NET "XPCI_WRAP/AD_IO<40>" LOC = "AD7" ; #NET "XPCI_WRAP/AD_IO<39>" LOC = "AE4"; # "AF1" ; #NET "XPCI_WRAP/AD_IO<38>" LOC = "AF3"; # "AG1" ; #NET "XPCI_WRAP/AD_IO<37>" LOC = "AD6"; # "AD4" ; #NET "XPCI_WRAP/AD_IO<36>" LOC = "AE3"; # "AE4" ; #NET "XPCI_WRAP/AD_IO<35>" LOC = "AG2"; # "AD8" ; #NET "XPCI_WRAP/AD_IO<34>" LOC = "AE7" ; #NET "XPCI_WRAP/AD_IO<33>" LOC = "AD8"; # "AG2" ; #NET "XPCI_WRAP/AD_IO<32>" LOC = "AH2" ; ######################################################################################## I/O Delay Settings###################################################################################NET "XPCI_WRAP/CLK_I" IOBDELAY = NONE ; #NET "XPCI_WRAP/RST_I" IOBDELAY = NONE ; #NET "XPCI_WRAP/INT_O" IOBDELAY = NONE ; #NET "XPCI_WRAP/PME_O" IOBDELAY = NONE ; #NET "XPCI_WRAP/GNT_I" IOBDELAY = NONE ; #NET "XPCI_WRAP/REQ_O" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<31>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<30>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<29>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<28>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<27>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<26>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<25>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<24>" IOBDELAY = NONE ; #NET "XPCI_WRAP/CBE_IO<3>" IOBDELAY = NONE ; #NET "XPCI_WRAP/IDSEL_I" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<23>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<22>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<21>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<20>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<19>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<18>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<17>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<16>" IOBDELAY = NONE ; #NET "XPCI_WRAP/CBE_IO<2>" IOBDELAY = NONE ; #NET "XPCI_WRAP/FRAME_IO" IOBDELAY = NONE ; #NET "XPCI_WRAP/IRDY_IO" IOBDELAY = NONE ; #NET "XPCI_WRAP/TRDY_IO" IOBDELAY = NONE ; #NET "XPCI_WRAP/DEVSEL_IO" IOBDELAY = NONE ; #NET "XPCI_WRAP/STOP_IO" IOBDELAY = NONE ; #NET "XPCI_WRAP/PERR_IO" IOBDELAY = NONE ; #NET "XPCI_WRAP/SERR_IO" IOBDELAY = NONE ; #NET "XPCI_WRAP/PAR_IO" IOBDELAY = NONE ; #NET "XPCI_WRAP/CBE_IO<1>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<15>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<14>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<13>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<12>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<11>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<10>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<9>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<8>" IOBDELAY = NONE ; #NET "XPCI_WRAP/CBE_IO<0>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<7>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<6>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<5>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<4>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<3>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<2>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<1>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<0>" IOBDELAY = NONE ; #NET "XPCI_WRAP/ACK64_IO" IOBDELAY = NONE ; #NET "XPCI_WRAP/REQ64_IO" IOBDELAY = NONE ; ## #NET "XPCI_WRAP/CBE_IO<7>" IOBDELAY = NONE ; #NET "XPCI_WRAP/CBE_IO<6>" IOBDELAY = NONE ; #NET "XPCI_WRAP/CBE_IO<5>" IOBDELAY = NONE ; #NET "XPCI_WRAP/CBE_IO<4>" IOBDELAY = NONE ; #NET "XPCI_WRAP/PAR64_IO" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<63>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<62>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<61>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<60>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<59>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<58>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<57>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<56>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<55>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<54>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<53>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<52>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<51>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<50>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<49>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<48>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<47>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<46>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<45>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<44>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<43>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<42>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<41>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<40>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<39>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<38>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<37>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<36>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<35>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<34>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<33>" IOBDELAY = NONE ; #NET "XPCI_WRAP/AD_IO<32>" IOBDELAY = NONE ; ###################################################################################### I/O Register Usage####################################################################################INST "XPCI_WRAP/XPCI_CORE/XPCI_ADI*" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_CBI*" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_PARI" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_PAR64I" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_FRAMEI" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_REQ64I" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_TRDYI" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_IRDYI" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_STOPI" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_DEVSELI" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_ACK64I" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_PERRI" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_SERRI" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_GNTI" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_IDSELI" IOB = TRUE ; ####INST "XPCI_WRAP/XPCI_CORE/XPCI_ADO*" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_CBO*" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_PARO" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_PAR64O" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_FRAMEO" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_REQ64O" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_TRDYO" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_IRDYO" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_STOPO" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_DEVSELO" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_ACK64O" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_PERRO" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_SERRO" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_INTO" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_PMEO" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_REQO" IOB = TRUE ; ####INST "XPCI_WRAP/XPCI_CORE/XPCI_ADT*" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_CBT*" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_PART" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_PAR64T" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_FRAMET" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_REQ64T" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_TRDYT" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_IRDYT" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_STOPT" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_DEVSELT" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_ACK64T" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_PERRT" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_SERRT" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_INTT" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_PMET" IOB = TRUE ; ##INST "XPCI_WRAP/XPCI_CORE/XPCI_REQT" IOB = TRUE ; ################################################################################### ## I/O Time Names ################################################################################# ###NET "XPCI_WRAP/AD_IO<63>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<62>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<61>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<60>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<59>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<58>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<57>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<56>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<55>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<54>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<53>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<52>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<51>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<50>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<49>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<48>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<47>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<46>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<45>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<44>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<43>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<42>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<41>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<40>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<39>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<38>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<37>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<36>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<35>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<34>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<33>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<32>" TNM = PADS:PCI_PADS_D ;###NET "XPCI_WRAP/AD_IO<31>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<30>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<29>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<28>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<27>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<26>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<25>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<24>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<23>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<22>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<21>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<20>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<19>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<18>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<17>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<16>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<15>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<14>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<13>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<12>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<11>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<10>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<9>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<8>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<7>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<6>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<5>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<4>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<3>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<2>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<1>" TNM = PADS:PCI_PADS_D ;#NET "XPCI_WRAP/AD_IO<0>" TNM = PADS:PCI_PADS_D ;###NET "XPCI_WRAP/CBE_IO<7>" TNM = PADS:BUS_PADS_D ;#NET "XPCI_WRAP/CBE_IO<6>" TNM = PADS:BUS_PADS_D ;#NET "XPCI_WRAP/CBE_IO<5>" TNM = PADS:BUS_PADS_D ;#NET "XPCI_WRAP/CBE_IO<4>" TNM = PADS:BUS_PADS_D ;#NET "XPCI_WRAP/CBE_IO<3>" TNM = PADS:BUS_PADS_D ;#NET "XPCI_WRAP/CBE_IO<2>" TNM = PADS:BUS_PADS_D ;#NET "XPCI_WRAP/CBE_IO<1>" TNM = PADS:BUS_PADS_D ;#NET "XPCI_WRAP/CBE_IO<0>" TNM = PADS:BUS_PADS_D ;###NET "XPCI_WRAP/PAR_IO" TNM = PADS:BUS_PADS_D ;#NET "XPCI_WRAP/PAR64_IO" TNM = PADS:BUS_PADS_D ;###NET "XPCI_WRAP/FRAME_IO" TNM = PADS:BUS_PADS_C ;#NET "XPCI_WRAP/REQ64_IO" TNM = PADS:BUS_PADS_C ;#NET "XPCI_WRAP/TRDY_IO" TNM = PADS:BUS_PADS_C ;#NET "XPCI_WRAP/IRDY_IO" TNM = PADS:BUS_PADS_C ;#NET "XPCI_WRAP/STOP_IO" TNM = PADS:BUS_PADS_C ;#NET "XPCI_WRAP/DEVSEL_IO" TNM = PADS:BUS_PADS_C ;#NET "XPCI_WRAP/ACK64_IO" TNM = PADS:BUS_PADS_C ;#NET "XPCI_WRAP/IDSEL_I" TNM = PADS:BUS_PADS_C ;#NET "XPCI_WRAP/PERR_IO" TNM = PADS:BUS_PADS_C ;#NET "XPCI_WRAP/SERR_IO" TNM = PADS:BUS_PADS_C ;#NET "XPCI_WRAP/INT_O" TNM = PADS:BUS_PADS_C ;#NET "XPCI_WRAP/PME_O" TNM = PADS:BUS_PADS_C ;#NET "XPCI_WRAP/REQ_O" TNM = PADS:BUS_PADS_G ;#NET "XPCI_WRAP/GNT_I" TNM = PADS:BUS_PADS_G ;#NET "XPCI_WRAP/RST_I" TNM = PADS:BUS_PADS_X ;##################################################################################### Time Groups ####################################################################################INST "XPCI_WRAP" TNM = FFS:CORE_FFS ;#TIMEGRP "ALL_FFS" = "CORE_FFS" : "USER_FFS" ; #TIMEGRP "ALL_BUS" = "BUS_PADS_D" : "BUS_PADS_C" : "BUS_PADS_G" ; #TIMEGRP "TRI_BUS" = "BUS_PADS_D" : "BUS_PADS_C" ; #TIMEGRP "PTP_BUS" = "BUS_PADS_G" ; ##################################################################################### Time Specs for PCI-X mode. ##################################################################################### The design is covered by a general period constraint. For ## operation at 100 MHz, set this constraint to 10.000 ns. ###NET "XPCI_WRAP/CLK_I" PERIOD = 15.000 ; #### All output paths are registered. Any failures on this timespec will ## indicate output register packing failure. This is obtained from the# specified 3.800 ns, minus zero clock delay due to the DLL.#TIMESPEC TS_CKOUT = FROM : "ALL_FFS" : TO : "ALL_BUS" : 3.800 ;## All input paths are registered. Any failures on this timespec will# indicate that an optimization or design error occured. This is obtained# from the specified 1.700 ns, plus zero clock delay due to the DLL.##TIMESPEC TS_SETUP = FROM : "ALL_BUS" : TO : "ALL_FFS" : 1.700 ;# Changed time to allow testing for Virtex-II Development boardTIMESPEC TS_SETUP = FROM : "ALL_BUS" : TO : "ALL_FFS" : 4.700 ;################################################################################## User Time Names / User Time Groups################################################################################## Note: Change the instance name for the user application to match the# instance name in your custom design.# This timegroup is used to form other timegroups needed# for the interface. Do not remove it.#INST "XPCI_USER" TNM = FFS:USER_FFS ;## You may add further time names and time groups specific to your custom# design as long as the do not interfere with the timegroups and time# specs used for the interface.################################################################################## User Time Specs##################################################################################--------------------------------------------------------------------# Time Constraints#--------------------------------------------------------------------#NET "mem_clk" TNM_NET = "clk_mem";NET "inst_ddr_cntl/ddr_clk" TNM_NET = "clk_ddr";NET "inst_ddr_cntl/read_clk" TNM_NET = "clk_read";NET "sys_clk" TNM_NET = "sys_clk";#TIMESPEC "TS_clk_mem" = PERIOD "clk_mem" 125 MHz HIGH 50 %;TIMESPEC "TS_clk_ddr" = PERIOD "clk_ddr" 125 MHz HIGH 50 %;TIMESPEC "TS_clk_read" = PERIOD "clk_read" 125 MHz HIGH 50 %;TIMESPEC "TS_sys_clk" = PERIOD "sys_clk" 40 MHz HIGH 50 %;##-----------------------------# Delay Constraints#-----------------------------NET "inst_ddr_cntl/ddr_dqs_t" MAXDELAY = 3.5 ns;##OFFSET = OUT 20.000000 ns AFTER "sys_clk_in";OFFSET = OUT 10.000000 ns AFTER "mem_clk_in";OFFSET = IN 4.000000 ns BEFORE "mem_clk_in";##----------------------------------------## Assign fixed locations for DCMs#----------------------------------------#-----------------------------------------------------------------------------------------------------------# DCM output clock phase adjust value (120 MHz -> 8.3nS @ 45 deg of phase = 1.04nS of phase delay)# (PHASE_SHIFT = 1.04nS/8.3nS * 256 = 32)#-----------------------------------------------------------------------------------------------------------#INST "inst_ddr_cntl/u_clk_dlls/inst_mem_DIG_CLK_MGMT" LOC = DCM_X1Y0;#INST "inst_ddr_cntl/u_clk_dlls/inst_ddr_DIG_CLK_MGMT" LOC = DCM_X2Y0;#INST "inst_ddr_cntl/u_clk_dlls/inst_read_DIG_CLK_MGMT" LOC = DCM_X0Y0;##INST "inst_ddr_cntl/u_clk_dlls/bufg_mem_clk0" LOC = "BUFGMUX6P";#INST "inst_ddr_cntl/u_clk_dlls/bufg_ddr_clk0" LOC = "BUFGMUX5S";#INST "inst_ddr_cntl/u_clk_dlls/bufg_read_clk0" LOC = "BUFGMUX7S";#INST "inst_ddr_cntl/u_clk_dlls/inst_mem_DIG_CLK_MGMT" DLL_FREQUENCY_MODE = LOW;INST "inst_ddr_cntl/u_clk_dlls/inst_mem_DIG_CLK_MGMT" DUTY_CYCLE_CORRECTION = TRUE;INST "inst_ddr_cntl/u_clk_dlls/inst_mem_DIG_CLK_MGMT" CLK_FEEDBACK = 1X;INST "inst_ddr_cntl/u_clk_dlls/inst_mem_DIG_CLK_MGMT" CLKOUT_PHASE_SHIFT = FIXED;INST "inst_ddr_cntl/u_clk_dlls/inst_mem_DIG_CLK_MGMT" PHASE_SHIFT = 0;#INST "inst_ddr_cntl/u_clk_dlls/inst_mem_DIG_CLK_MGMT" CLKIN_PERIOD = 25 ns;INST "inst_ddr_cntl/u_clk_dlls/inst_mem_DIG_CLK_MGMT" CLKDV_DIVIDE = 2;INST "inst_ddr_cntl/u_clk_dlls/inst_mem_DIG_CLK_MGMT" CLKFX_DIVIDE = 1;INST "inst_ddr_cntl/u_clk_dlls/inst_mem_DIG_CLK_MGMT" CLKFX_MULTIPLY = 1;#INST "inst_ddr_cntl/u_clk_dlls/inst_ddr_DIG_CLK_MGMT" DLL_FREQUENCY_MODE = LOW;INST "inst_ddr_cntl/u_clk_dlls/inst_ddr_DIG_CLK_MGMT" DUTY_CYCLE_CORRECTION = TRUE;INST "inst_ddr_cntl/u_clk_dlls/inst_ddr_DIG_CLK_MGMT" CLK_FEEDBACK = 1X;INST "inst_ddr_cntl/u_clk_dlls/inst_ddr_DIG_CLK_MGMT" CLKOUT_PHASE_SHIFT = FIXED;INST "inst_ddr_cntl/u_clk_dlls/inst_ddr_DIG_CLK_MGMT" PHASE_SHIFT = 96;#INST "inst_ddr_cntl/u_clk_dlls/inst_ddr_DIG_CLK_MGMT" CLKIN_PERIOD = 25 ns;INST "inst_ddr_cntl/u_clk_dlls/inst_ddr_DIG_CLK_MGMT" CLKDV_DIVIDE = 2;INST "inst_ddr_cntl/u_clk_dlls/inst_ddr_DIG_CLK_MGMT" CLKFX_DIVIDE = 1;INST "inst_ddr_cntl/u_clk_dlls/inst_ddr_DIG_CLK_MGMT" CLKFX_MULTIPLY = 1;#INST "inst_ddr_cntl/u_clk_dlls/inst_read_DIG_CLK_MGMT" DLL_FREQUENCY_MODE = LOW;INST "inst_ddr_cntl/u_clk_dlls/inst_read_DIG_CLK_MGMT" DUTY_CYCLE_CORRECTION = TRUE;INST "inst_ddr_cntl/u_clk_dlls/inst_read_DIG_CLK_MGMT" CLK_FEEDBACK = 1X;INST "inst_ddr_cntl/u_clk_dlls/inst_read_DIG_CLK_MGMT" CLKOUT_PHASE_SHIFT = FIXED;INST "inst_ddr_cntl/u_clk_dlls/inst_read_DIG_CLK_MGMT" PHASE_SHIFT = 100;#INST "inst_ddr_cntl/u_clk_dlls/inst_read_DIG_CLK_MGMT" PHASE_SHIFT = 32;#INST "inst_ddr_cntl/u_clk_dlls/inst_read_DIG_CLK_MGMT" CLKIN_PERIOD = 25 ns;INST "inst_ddr_cntl/u_clk_dlls/inst_read_DIG_CLK_MGMT" CLKDV_DIVIDE = 2;INST "inst_ddr_cntl/u_clk_dlls/inst_read_DIG_CLK_MGMT" CLKFX_DIVIDE = 1;INST "inst_ddr_cntl/u_clk_dlls/inst_read_DIG_CLK_MGMT" CLKFX_MULTIPLY = 1;#-------------------------################################################################################## User Constraints (Pinout, Placement, Etc.)#################################################################################### CLOCKS ### #Changed pin #'s this section - ms 9/3/02##NET "GEN_IO2_CLKIN" LOC = "C15" ;NET "GEN_IO2_CLKOUT" LOC = "C14" ;NET "GEN_IO2_CLKFB" LOC = "F15" ;##NET "GEN_IO1_CLKIN" LOC = "G16" ;NET "GEN_IO1_CLKOUT" LOC = "C17" ;NET "GEN_IO1_CLKFB" LOC = "C16" ;###NET "SMA_EXT_CLKIN" LOC = "H16" ;#NET "MEM_IO_CLKIN" LOC = "AE15" ;NET "MEM_IO_CLKOUT" LOC = "AH14" ;NET "MEM_IO_CLKFB" LOC = "AH15" ;####NET "CLK_DDR_SD" LOC = "AH16" ; #(125 MHz) DDR clockNET "CLK_40MHZ" LOC = "AH17" ;# (40 MHz) Main Clock##NET "CLK_DDR_FB_IN" LOC = "AE16" ;NET "CLK_DDR_FB_OUT" LOC = "AC26" ;####### GENERAL IO ### #Changed pin #'s this section - ms 9/3/02#### Gen_IO 50-84 not supported in 2V1500NET "GEN_IO1<49>" LOC = "B27" ;NET "GEN_IO1<48>" LOC = "F24" ;NET "GEN_IO1<47>" LOC = "A27" ;NET "GEN_IO1<46>" LOC = "E24" ;NET "GEN_IO1<45>" LOC = "C26" ;NET "GEN_IO1<44>" LOC = "E23" ;NET "GEN_IO1<43>" LOC = "C25" ;NET "GEN_IO1<42>" LOC = "D25" ;NET "GEN_IO1<41>" LOC = "B25" ;NET "GEN_IO1<40>" LOC = "D24" ;NET "GEN_IO1<39>" LOC = "C24" ;NET "GEN_IO1<38>" LOC = "F22" ;NET "GEN_IO1<37>" LOC = "A24" ;NET "GEN_IO1<36>" LOC = "A25" ;NET "GEN_IO1<35>" LOC = "F23" ;NET "GEN_IO1<34>" LOC = "B24" ;NET "GEN_IO1<33>" LOC = "B23" ;NET "GEN_IO1<32>" LOC = "C23" ;NET "GEN_IO1<31>" LOC = "G22" ;NET "GEN_IO1<30>" LOC = "D22" ;NET "GEN_IO1<29>" LOC = "E22" ;NET "GEN_IO1<28>" LOC = "B22" ;NET "GEN_IO1<27>" LOC = "H21" ;NET "GEN_IO1<26>" LOC = "A22" ;NET "GEN_IO1<25>" LOC = "F21" ;NET "GEN_IO1<24>" LOC = "E21" ;NET "GEN_IO1<23>" LOC = "A21" ;NET "GEN_IO1<22>" LOC = "B21" ;NET "GEN_IO1<21>" LOC = "D21" ;NET "GEN_IO1<20>" LOC = "G21" ;NET "GEN_IO1<19>" LOC = "B20" ;NET "GEN_IO1<18>" LOC = "A20" ;NET "GEN_IO1<17>" LOC = "D20" ;NET "GEN_IO1<16>" LOC = "C20" ;NET "GEN_IO1<15>" LOC = "C19" ;NET "GEN_IO1<14>" LOC = "E20" ;NET "GEN_IO1<13>" LOC = "F19" ;NET "GEN_IO1<12>" LOC = "F20" ;NET "GEN_IO1<11>" LOC = "G20" ;NET "GEN_IO1<10>" LOC = "H20" ;NET "GEN_IO1<9>" LOC = "H19" ;NET "GEN_IO1<8>" LOC = "F18" ;NET "GEN_IO1<7>" LOC = "F17" ;NET "GEN_IO1<6>" LOC = "G19" ;NET "GEN_IO1<5>" LOC = "A16" ;NET "GEN_IO1<4>" LOC = "D17" ;NET "GEN_IO1<3>" LOC = "D16" ;NET "GEN_IO1<2>" LOC = "H18" ;NET "GEN_IO1<1>" LOC = "F16" ;NET "GEN_IO1<0>" LOC = "B16" ;#### Gen_IO 50-84 not supported in 2V1500 #Changed pin #'s this section - ms 9/3/02NET "GEN_IO2<49>" LOC = "C8" ;NET "GEN_IO2<48>" LOC = "B6" ;NET "GEN_IO2<47>" LOC = "E7" ;NET "GEN_IO2<46>" LOC = "D11" ;NET "GEN_IO2<45>" LOC = "A14" ;NET "GEN_IO2<44>" LOC = "B9" ;NET "GEN_IO2<43>" LOC = "B8" ;NET "GEN_IO2<42>" LOC = "D15" ;NET "GEN_IO2<41>" LOC = "D14" ;NET "GEN_IO2<40>" LOC = "E9" ;NET "GEN_IO2<39>" LOC = "E8" ;NET "GEN_IO2<38>" LOC = "H15" ;NET "GEN_IO2<37>" LOC = "G15" ;NET "GEN_IO2<36>" LOC = "H10" ;NET "GEN_IO2<35>" LOC = "G11" ;NET "GEN_IO2<34>" LOC = "C12" ;NET "GEN_IO2<33>" LOC = "C11" ;NET "GEN_IO2<32>" LOC = "A7" ;NET "GEN_IO2<31>" LOC = "B7" ;NET "GEN_IO2<30>" LOC = "F12" ;NET "GEN_IO2<29>" LOC = "F13" ;NET "GEN_IO2<28>" LOC = "G9" ;NET "GEN_IO2<27>" LOC = "G10" ;NET "GEN_IO2<26>" LOC = "B11" ;NET "GEN_IO2<25>" LOC = "B10" ;NET "GEN_IO2<24>" LOC = "A6" ;NET "GEN_IO2<23>" LOC = "A5" ;NET "GEN_IO2<22>" LOC = "G12" ;NET "GEN_IO2<21>" LOC = "G13" ;NET "GEN_IO2<20>" LOC = "C7" ;NET "GEN_IO2<19>" LOC = "C6" ;NET "GEN_IO2<18>" LOC = "A10" ;NET "GEN_IO2<17>" LOC = "A9" ;NET "GEN_IO2<16>" LOC = "G8" ;NET "GEN_IO2<15>" LOC = "F9" ;NET "GEN_IO2<14>" LOC = "E11" ;NET "GEN_IO2<13>" LOC = "E10" ;NET "GEN_IO2<12>" LOC = "D6" ;NET "GEN_IO2<11>" LOC = "D7" ;NET "GEN_IO2<10>" LOC = "H11" ;NET "GEN_IO2<9>" LOC = "H12" ;NET "GEN_IO2<8>" LOC = "F7" ;NET "GEN_IO2<7>" LOC = "F8" ;NET "GEN_IO2<6>" LOC = "D10" ;NET "GEN_IO2<5>" LOC = "D9" ;NET "GEN_IO2<4>" LOC = "A4" ;NET "GEN_IO2<3>" LOC = "B4" ;NET "GEN_IO2<2>" LOC = "F10" ;NET "GEN_IO2<1>" LOC = "F11" ;NET "GEN_IO2<0>" LOC = "B15" ;##NET "SDRAM_CLK" LOC = "J5" ;NET "SDRAM_CLKEN" LOC = "F2" ;#NET "SDRAM_WE_N" LOC = "J7" ;#NET "SDRAM_CS_N" LOC = "G3" ;#NET "SDRAM_RAS_N" LOC = "F3" ;#NET "SDRAM_CAS_N" LOC = "G2" ;NET "SDRAM_BYTE<7>" LOC = "G1" ;NET "SDRAM_BYTE<6>" LOC = "F1" ;NET "SDRAM_BYTE<5>" LOC = "J6" ;NET "SDRAM_BYTE<4>" LOC = "K6" ;NET "SDRAM_BYTE<3>" LOC = "G5" ;NET "SDRAM_BYTE<2>" LOC = "H5" ;NET "SDRAM_BYTE<1>" LOC = "J2" ;NET "SDRAM_BYTE<0>" LOC = "J3" ;###NET "FLASH_CE_N<3>" LOC = "L8" ;#NET "FLASH_CE_N<2>" LOC = "K8" ;#NET "FLASH_CE_N<1>" LOC = "H4" ;#NET "FLASH_CE_N<0>" LOC = "C2" ;#NET "FLASH_CE" LOC = "F5" ;#NET "FLASH_WE_N" LOC = "G4" ;#NET "FLASH_OE_N" LOC = "H2" ;#NET "FLASH_RST_N" LOC = "J8" ;###NET "RS232_FPGA_TX" LOC = "H3" ;#NET "RS232_FPGA_RX" LOC = "K7" ;######## SPARE PCI IO##NET "V33_IO<14>" LOC = "B1" ;NET "V33_IO<13>" LOC = "C1" ;NET "V33_IO<12>" LOC = "D2" ;NET "V33_IO<11>" LOC = "D3" ;NET "V33_IO<10>" LOC = "D1" ;NET "V33_IO<9>" LOC = "E1" ;NET "V33_IO<8>" LOC = "E3" ;NET "V33_IO<7>" LOC = "F4" ;NET "V33_IO<6>" LOC = "E4" ;NET "V33_IO<5>" LOC = "G6" ;NET "V33_IO<4>" LOC = "G7" ;NET "V33_IO<3>" LOC = "H7" ;NET "V33_IO<2>" LOC = "H6" ;NET "V33_IO<1>" LOC = "H8" ;NET "V33_IO<0>" LOC = "H9" ;NET "SWITCH<7>" LOC = "AC9" ;NET "SWITCH<6>" LOC = "AD9" ;NET "SWITCH<5>" LOC = "AD5" ;NET "SWITCH<4>" LOC = "AE5" ;NET "SWITCH<3>" LOC = "AF4" ;NET "SWITCH<2>" LOC = "AG3" ;NET "SWITCH<1>" LOC = "AH1" ;NET "SWITCH<0>" LOC = "AJ1" ;NET "LED<7>" LOC = "J1" ;NET "LED<6>" LOC = "J4" ;NET "LED<5>" LOC = "K1" ;NET "LED<4>" LOC = "K4" ;NET "LED<3>" LOC = "L5" ;NET "LED<2>" LOC = "L6" ;NET "LED<1>" LOC = "M6" ;NET "LED<0>" LOC = "L7" ;NET "DATA_AV<63>" LOC = "AC12" ;NET "DATA_AV<62>" LOC = "AK27" ;NET "DATA_AV<61>" LOC = "AG15" ;NET "DATA_AV<60>" LOC = "AD12" ;NET "DATA_AV<59>" LOC = "AG11" ;NET "DATA_AV<58>" LOC = "AK17" ;NET "DATA_AV<57>" LOC = "AJ17" ;NET "DATA_AV<56>" LOC = "AH11" ;NET "DATA_AV<55>" LOC = "AK10" ;NET "DATA_AV<54>" LOC = "AK18" ;NET "DATA_AV<53>" LOC = "AG16" ;NET "DATA_AV<52>" LOC = "AK11" ;NET "DATA_AV<51>" LOC = "AG12" ;NET "DATA_AV<50>" LOC = "AH19" ;NET "DATA_AV<49>" LOC = "AH20" ;NET "DATA_AV<48>" LOC = "AH12" ;NET "DATA_AV<47>" LOC = "AC13" ;NET "DATA_AV<46>" LOC = "AG17" ;NET "DATA_AV<45>" LOC = "AD15" ;NET "DATA_AV<44>" LOC = "AD13" ;NET "DATA_AV<43>" LOC = "AC14" ;NET "DATA_AV<42>" LOC = "AC15" ;NET "DATA_AV<41>" LOC = "AJ16" ;NET "DATA_AV<40>" LOC = "AG14" ;NET "DATA_AV<39>" LOC = "AK14" ;NET "DATA_AV<38>" LOC = "AD16" ;NET "DATA_AV<37>" LOC = "AC16" ;NET "DATA_AV<36>" LOC = "AJ14" ;NET "DATA_AV<35>" LOC = "AK15" ;NET "DATA_AV<34>" LOC = "AD18" ;NET "DATA_AV<33>" LOC = "AC17" ;NET "DATA_AV<32>" LOC = "AJ15" ;NET "DATA_AV<31>" LOC = "AK4" ;NET "DATA_AV<30>" LOC = "AJ4" ; #changed ms 9/3/02NET "DATA_AV<29>" LOC = "AK5" ;NET "DATA_AV<28>" LOC = "AK6" ;NET "DATA_AV<27>" LOC = "AG6" ;NET "DATA_AV<26>" LOC = "AF7" ;NET "DATA_AV<25>" LOC = "AJ6" ;NET "DATA_AV<24>" LOC = "AH7" ;NET "DATA_AV<23>" LOC = "AG7" ;NET "DATA_AV<22>" LOC = "AK7" ;NET "DATA_AV<21>" LOC = "AJ7" ;NET "DATA_AV<20>" LOC = "AG8" ;NET "DATA_AV<19>" LOC = "AF8" ;NET "DATA_AV<18>" LOC = "AJ8" ;NET "DATA_AV<17>" LOC = "AH9" ;NET "DATA_AV<16>" LOC = "AH8" ;NET "DATA_AV<15>" LOC = "AJ9" ;NET "DATA_AV<14>" LOC = "AK9" ; #changed ms 9/3/02NET "DATA_AV<13>" LOC = "AE10" ;NET "DATA_AV<12>" LOC = "AG9" ;NET "DATA_AV<11>" LOC = "AF10" ;NET "DATA_AV<10>" LOC = "AE9" ;NET "DATA_AV<9>" LOC = "AJ10" ;NET "DATA_AV<8>" LOC = "AJ11" ;NET "DATA_AV<7>" LOC = "AG10" ;NET "DATA_AV<6>" LOC = "AF11" ;NET "DATA_AV<5>" LOC = "AD11" ;NET "DATA_AV<4>" LOC = "AE11" ;NET "DATA_AV<3>" LOC = "AC11" ;NET "DATA_AV<2>" LOC = "AD10" ;NET "DATA_AV<1>" LOC = "AE12" ;NET "DATA_AV<0>" LOC = "AC10" ;#NET "ADDR_AV<31>" LOC = "AC18" ;NET "ADDR_AV<30>" LOC = "AC19" ;NET "ADDR_AV<29>" LOC = "AG19" ;NET "ADDR_AV<28>" LOC = "AD19" ;NET "ADDR_AV<27>" LOC = "AE19" ;NET "ADDR_AV<26>" LOC = "AE20" ;NET "ADDR_AV<25>" LOC = "AD20" ;NET "ADDR_AV<24>" LOC = "AF20" ;NET "ADDR_AV<23>" LOC = "AJ21" ;NET "ADDR_AV<22>" LOC = "AG20" ;NET "ADDR_AV<21>" LOC = "AF21" ;NET "ADDR_AV<20>" LOC = "AJ20" ;NET "ADDR_AV<19>" LOC = "AE21" ;NET "ADDR_AV<18>" LOC = "AD21" ;NET "ADDR_AV<17>" LOC = "AK22" ;NET "ADDR_AV<16>" LOC = "AG21" ;NET "ADDR_AV<15>" LOC = "AH22" ;NET "ADDR_AV<14>" LOC = "AK21" ;NET "ADDR_AV<13>" LOC = "AJ23" ;NET "ADDR_AV<12>" LOC = "AD22" ;NET "ADDR_AV<11>" LOC = "AG22" ;NET "ADDR_AV<10>" LOC = "AJ22" ;NET "ADDR_AV<9>" LOC = "AH24" ;NET "ADDR_AV<8>" LOC = "AH23" ;NET "ADDR_AV<7>" LOC = "AJ25" ;NET "ADDR_AV<6>" LOC = "AG23" ;NET "ADDR_AV<5>" LOC = "AK25" ;NET "ADDR_AV<4>" LOC = "AF23" ;NET "ADDR_AV<3>" LOC = "AF22" ;NET "ADDR_AV<2>" LOC = "AK24" ;NET "ADDR_AV<1>" LOC = "AF24" ;NET "ADDR_AV<0>" LOC = "AH25" ;##NET "MEM_IO<29>" LOC = "AF13" ;#NET "MEM_IO<28>" LOC = "AJ12" ;#NET "MEM_IO<27>" LOC = "AJ13" ;#NET "MEM_IO<26>" LOC = "AK12" ;#NET "MEM_IO<25>" LOC = "AK13" ;#NET "MEM_IO<24>" LOC = "AG13" ;#NET "MEM_IO<23>" LOC = "AF14" ;#NET "MEM_IO<22>" LOC = "AE14" ;#NET "MEM_IO<21>" LOC = "AB14" ;#NET "MEM_IO<20>" LOC = "AF15" ;#NET "MEM_IO<19>" LOC = "AB15" ;#NET "MEM_IO<18>" LOC = "AE13" ;#NET "MEM_IO<17>" LOC = "AB16" ;#NET "MEM_IO<16>" LOC = "AB17" ;#NET "MEM_IO<15>" LOC = "AE17" ;#NET "MEM_IO<14>" LOC = "AF17" ;#NET "MEM_IO<13>" LOC = "AJ18" ;#NET "MEM_IO<12>" LOC = "AG18" ;#NET "MEM_IO<11>" LOC = "AJ19" ;#NET "MEM_IO<10>" LOC = "AK19" ;#NET "MEM_IO<9>" LOC = "AK20" ;#NET "MEM_IO<8>" LOC = "AF18" ;#NET "MEM_IO<7>" LOC = "AE18" ;#NET "MEM_IO<6>" LOC = "AF16" ;NET "MEM_IO<5>" LOC = "AK26" ;NET "MEM_IO<4>" LOC = "AC21" ;NET "MEM_IO<3>" LOC = "AC20" ;NET "MEM_IO<2>" LOC = "AG24" ;NET "MEM_IO<1>" LOC = "AG25" ;NET "MEM_IO<0>" LOC = "AJ24" ;####-------------------------# DDR SDRAM Interface#-------------------------NET "ddr_clk_0" LOC = "L25";NET "ddr_clkb_0" LOC = "M25";NET "ddr_clk_1" LOC = "AD27";NET "ddr_clkb_1" LOC = "AC27";NET "ddr_clk_fb_out" LOC = "AC26";#NET ddr_clk_fb_in LOC = ;#NET ddr_cke(0) LOC = L23;NET ddr_cke(1) LOC = V23;#NET "ddr_rasb" LOC = "T23";NET "ddr_casb" LOC = "U27";NET "ddr_web" LOC = "Y24";NET ddr_csb(0) LOC = AA27;NET ddr_csb(1) LOC = T27;#NET ddr_dm(0) LOC = H26;NET ddr_dm(1) LOC = K26;NET ddr_dm(2) LOC = M23;NET ddr_dm(3) LOC = T25;NET ddr_dm(4) LOC = AA24;NET ddr_dm(5) LOC = AB27;NET ddr_dm(6) LOC = AD26;NET ddr_dm(7) LOC = AE27;#NET ddr_ba(0) LOC = AA23;NET ddr_ba(1) LOC = R25;#NET ddr_ad(0) LOC = R24;NET ddr_ad(1) LOC = Y23;NET ddr_ad(2) LOC = R23;NET ddr_ad(3) LOC = W25;NET ddr_ad(4) LOC = P23;NET ddr_ad(5) LOC = W24;NET ddr_ad(6) LOC = K24;NET ddr_ad(7) LOC = V24;NET ddr_ad(8) LOC = L26;NET ddr_ad(9) LOC = W23;NET ddr_ad(10) LOC = Y25;NET ddr_ad(11) LOC = L24;#NET ddr_ad(12) LOC = U23;#=================================# Data Strobe (Bidirectional)#=================================NET ddr_dqs(0) LOC = J26;NET ddr_dqs(1) LOC = K23;NET ddr_dqs(2) LOC = N23;NET ddr_dqs(3) LOC = T24;NET ddr_dqs(4) LOC = AA25;NET ddr_dqs(5) LOC = AB25;NET ddr_dqs(6) LOC = AE26;NET ddr_dqs(7) LOC = AF27;##=================================# Data bus (Bidirectional)#=================================NET ddr_dq(0) LOC = D28;NET ddr_dq(1) LOC = E27;NET ddr_dq(2) LOC = F26;NET ddr_dq(3) LOC = F28;NET ddr_dq(4) LOC = B30;NET ddr_dq(5) LOC = C29;NET ddr_dq(6) LOC = C30;NET ddr_dq(7) LOC = D29;NET ddr_dq(8) LOC = F27;NET ddr_dq(9) LOC = G27;NET ddr_dq(10) LOC = H28;NET ddr_dq(11) LOC = H27;NET ddr_dq(12) LOC = D30;NET ddr_dq(13) LOC = E30;NET ddr_dq(14) LOC = F29;NET ddr_dq(15) LOC = F30;NET ddr_dq(16) LOC = J28;NET ddr_dq(17) LOC = L28;NET ddr_dq(18) LOC = L29;NET ddr_dq(19) LOC = M28;NET ddr_dq(20) LOC = G29;NET ddr_dq(21) LOC = G30;NET ddr_dq(22) LOC = H29;NET ddr_dq(23) LOC = J29;NET ddr_dq(24) LOC = M29;NET ddr_dq(25) LOC = M24;NET ddr_dq(26) LOC = N30;NET ddr_dq(27) LOC = N24;NET ddr_dq(28) LOC = J30;NET ddr_dq(29) LOC = K29;NET ddr_dq(30) LOC = K30;NET ddr_dq(31) LOC = L27;NET ddr_dq(32) LOC = P30;NET ddr_dq(33) LOC = P27;NET ddr_dq(34) LOC = P28;NET ddr_dq(35) LOC = R29;NET ddr_dq(36) LOC = U30;NET ddr_dq(37) LOC = Y27;NET ddr_dq(38) LOC = Y26;NET ddr_dq(39) LOC = AA26;NET ddr_dq(40) LOC = R28;NET ddr_dq(41) LOC = T30;NET ddr_dq(42) LOC = T29;NET ddr_dq(43) LOC = T28;NET ddr_dq(44) LOC = W27;NET ddr_dq(45) LOC = AA29;NET ddr_dq(46) LOC = AB29;NET ddr_dq(47) LOC = AC29;NET ddr_dq(48) LOC = U28;NET ddr_dq(49) LOC = V29;NET ddr_dq(50) LOC = W28;NET ddr_dq(51) LOC = Y28;NET ddr_dq(52) LOC = AD30;NET ddr_dq(53) LOC = AD29;NET ddr_dq(54) LOC = AE30;NET ddr_dq(55) LOC = AE29;NET ddr_dq(56) LOC = AB28;NET ddr_dq(57) LOC = AC28;NET ddr_dq(58) LOC = AD28;NET ddr_dq(59) LOC = AE28;NET ddr_dq(60) LOC = AG30;NET ddr_dq(61) LOC = AG29;NET ddr_dq(62) LOC = AH29;NET ddr_dq(63) LOC = AJ30;#### DIMM SPARE IO## ##Added by ms 8/30/02NET "V25_IO<40>" LOC = "AE24" ; #"AG26" ;NET "V25_IO<39>" LOC = "AC22" ; #"AE24" ;NET "V25_IO<38>" LOC = "AD24" ; #"AF26" ;NET "V25_IO<37>" LOC = "AB24" ; #"AD26" ;NET "V25_IO<36>" LOC = "AA30" ; #"AC32" ;#NET "V25_IO<24>" LOC = "J23" ; #"L25" ;NET "V25_IO<23>" LOC = "J25" ; #"L27" ;NET "V25_IO<22>" LOC = "J24" ; #"L26" ;NET "V25_IO<21>" LOC = "H24" ; #"K26" ;NET "V25_IO<20>" LOC = "G24" ; #"J26" ;NET "V25_IO<19>" LOC = "AC24" ; #"AE26" ;NET "V25_IO<18>" LOC = "AD23" ; #"AF25" ;NET "V25_IO<17>" LOC = "AC23" ; #"AE25" ;NET "V25_IO<16>" LOC = "AB23" ; #"AD25" ;# ##End additions by msNET "V25_IO<4>" LOC = "K25" ;NET "V25_IO<3>" LOC = "H22" ;NET "V25_IO<2>" LOC = "J27" ;NET "V25_IO<1>" LOC = "H25" ;NET "V25_IO<0>" LOC = "G25" ;##################################################################################### End#################################################################################