URL
https://opencores.org/ocsvn/mips_enhanced/mips_enhanced/trunk
Subversion Repositories mips_enhanced
[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [boards/] [avnet-xc3s1500/] [leon3mp.ucf] - Rev 2
Compare with Previous | Blame | View Log
#Spartan-3 Evaluation Board Constraints File
#Clocks
NET "clk_socket" LOC = "AB12" | IOSTANDARD = LVCMOS33; #OSC2 (SOCKET)
NET clk_66mhz PERIOD = 15.000 ;
NET "clk_66mhz" LOC = "A11"; #OSC1 (66MHZ)
NET video_clk PERIOD = 39.000 ;
OFFSET = OUT : 12.000 : AFTER clk_66mhz;
#NET "clk" TNM_NET = "clk";
#NET "clk40" TNM_NET = "clk40";
#TIMESPEC "TS_clk_clk40" = FROM "clk" TO "clk40" TIG;
#TIMESPEC "TS_clk40_clk" = FROM "clk40" TO "clk" TIG;
NET pci_clk PERIOD = 30.000 ;
OFFSET = OUT : 11.000 : AFTER pci_clk ;
OFFSET = IN : 7.000 : BEFORE pci_clk ;
NET "pci_clk" LOC = "AA12";
NET pci_gnt OFFSET = IN : 10.000 : BEFORE pci_clk ;
NET pci_req OFFSET = OUT : 12.000 : AFTER pci_clk ;
NET pci_rst TIG ;
NET phy_txck PERIOD = 40.000 ;
NET phy_rxck PERIOD = 40.000 ;
OFFSET = OUT : 15.000 : AFTER phy_txck ;
OFFSET = IN : 10.000 : BEFORE phy_txck ;
OFFSET = IN : 10.000 : BEFORE phy_rxck ;
#LEDs
NET "leds(0)" LOC = "U12";
NET "leds(1)" LOC = "V12";
NET "leds(2)" LOC = "Y12";
NET "leds(3)" LOC = "Y13";
NET "leds(4)" LOC = "AB13";
NET "leds(5)" LOC = "AA13";
NET "leds(6)" LOC = "V13";
NET "leds(7)" LOC = "AB14";
#Switches (DIP switches (4) and Pushbuttons (2))
NET "switches(0)" LOC = "W4" | IOSTANDARD = LVCMOS33; # SWITCH(0) (SW2:1)
NET "switches(1)" LOC = "W3" | IOSTANDARD = LVCMOS33; # SWITCH(1) (SW2:2)
NET "switches(2)" LOC = "Y3" | IOSTANDARD = LVCMOS33; # SWITCH(2) (SW2:3)
NET "switches(3)" LOC = "Y2" | IOSTANDARD = LVCMOS33; # SWITCH(3) (SW2:4)
NET "switches(4)" LOC = "Y1" | IOSTANDARD = LVCMOS33; # SWITCH_PB1 (SW3)
NET "switches(5)" LOC = "W2" | IOSTANDARD = LVCMOS33; # SWITCH_PB2 (SW4)
# PS2 Ports (Mouse and Keyboard)
NET "msclk" LOC = "W14"; # JS2
NET "msdata" LOC = "W13";
NET "msclk" PULLUP;
NET "msdata" PULLUP;
NET "kbclk" LOC = "U17"; # JS1
NET "kbdata" LOC = "U16";
NET "kbclk" PULLUP;
NET "kbdata" PULLUP;
#SRAM
NET "sram_a(0)" LOC = "E22"; #ADDR0
NET "sram_a(1)" LOC = "E21";
NET "sram_a(2)" LOC = "D21";
NET "sram_a(3)" LOC = "E20";
NET "sram_a(4)" LOC = "D22";
NET "sram_a(5)" LOC = "D20";
NET "sram_a(6)" LOC = "C22";
NET "sram_a(7)" LOC = "D19";
NET "sram_a(8)" LOC = "C20";
NET "sram_a(9)" LOC = "C21";
NET "sram_a(10)" LOC = "F18";
NET "sram_a(11)" LOC = "G18";
NET "sram_a(12)" LOC = "G19";
NET "sram_a(13)" LOC = "E18";
NET "sram_a(14)" LOC = "F19";
NET "sram_a(15)" LOC = "F20";
NET "sram_a(16)" LOC = "E19";
NET "sram_a(17)" LOC = "F21"; #ADDR17
NET "sram_a(18)" LOC = "F17";
NET "sram_a(19)" LOC = "F16";
NET "sram_a(20)" LOC = "E16";
NET "sram_a(21)" LOC = "E13";
NET "sram_a(22)" LOC = "F13";
NET "sram_a(23)" LOC = "A12";
NET "sram_a(24)" LOC = "F12";
#NET "sdwen" LOC = "L20";
NET "sdclk" LOC = "L21";
NET "sdcsn" LOC = "B20";
NET "casn" LOC = "C19";
NET "rasn" LOC = "B19";
NET "sdcke" LOC = "A19";
NET "sram_ben_l(0)" LOC = "K21"; #BE0
NET "sram_ben_l(1)" LOC = "K22";
NET "sram_ben_l(2)" LOC = "G22";
NET "sram_ben_l(3)" LOC = "K20"; #BE3
NET "sram_cs_l(0)" LOC = "G21";
NET "sram_cs_l(1)" LOC = "L20";
NET "sram_oe_l" LOC = "G17";
NET "sram_we_l" LOC = "K19";
NET "flash_cs_l" LOC = "L18";
NET "flash_rst_l" LOC = "L19";
NET "sram_dq(0)" LOC = "U19"; #DATA0
NET "sram_dq(1)" LOC = "T21";
NET "sram_dq(2)" LOC = "U20";
NET "sram_dq(3)" LOC = "U21";
NET "sram_dq(4)" LOC = "V21";
NET "sram_dq(5)" LOC = "V22";
NET "sram_dq(6)" LOC = "W22";
NET "sram_dq(7)" LOC = "V20";
NET "sram_dq(8)" LOC = "Y19";
NET "sram_dq(9)" LOC = "W19";
NET "sram_dq(10)" LOC = "V19";
NET "sram_dq(11)" LOC = "Y20";
NET "sram_dq(12)" LOC = "Y21";
NET "sram_dq(13)" LOC = "Y22";
NET "sram_dq(14)" LOC = "W20";
NET "sram_dq(15)" LOC = "W21";
NET "sram_dq(16)" LOC = "M17";
NET "sram_dq(17)" LOC = "L17";
NET "sram_dq(18)" LOC = "M19";
NET "sram_dq(19)" LOC = "M18";
NET "sram_dq(20)" LOC = "M20";
NET "sram_dq(21)" LOC = "N19";
NET "sram_dq(22)" LOC = "M21";
NET "sram_dq(23)" LOC = "N20";
NET "sram_dq(24)" LOC = "T22";
NET "sram_dq(25)" LOC = "U18";
NET "sram_dq(26)" LOC = "T18";
NET "sram_dq(27)" LOC = "R18";
NET "sram_dq(28)" LOC = "T17";
NET "sram_dq(29)" LOC = "N21";
NET "sram_dq(30)" LOC = "N22";
NET "sram_dq(31)" LOC = "M22"; #DATA31
# UART
NET "tx" LOC = "C3";
NET "rx" LOC = "C4";
# Ethernet PHY
NET "phy_txck" LOC = "C12";
NET "phy_rxck" LOC = "B12";
NET "phy_crs" LOC = "E12";
NET "phy_rxdv" LOC = "B14";
NET "phy_rxd(0)" LOC = "B15";
NET "phy_rxd(1)" LOC = "A15";
NET "phy_rxd(2)" LOC = "D15";
NET "phy_rxd(3)" LOC = "E15";
NET "phy_col" LOC = "D13";
NET "phy_rxer" LOC = "A14";
NET "phy_txen" LOC = "E14";
NET "phy_txd(0)" LOC = "B13";
NET "phy_txd(1)" LOC = "A13";
NET "phy_txd(2)" LOC = "C13";
NET "phy_txd(3)" LOC = "D12";
NET "phy_reset_l" PULLUP;
NET "phy_reset_l" LOC = "E4";
NET "phy_mdc" LOC = "C17";
NET "phy_mdio" LOC = "B17";
NET "phy_txer" LOC = "D14";
# Video DAC
NET "video_clk" LOC = "B11" | IOSTANDARD = LVCMOS33;
NET "horiz_sync" LOC = "E11";
NET "vert_sync" LOC = "D11";
NET "comp_sync" LOC = "A3";
NET "blank" LOC = "A4";
NET "video_out(0)" LOC = "E9"; # Blue(0)
NET "video_out(1)" LOC = "F9"; # Blue(1)
NET "video_out(2)" LOC = "D7"; # Blue(2)
NET "video_out(3)" LOC = "C7"; # Blue(3)
NET "video_out(4)" LOC = "E7"; # Blue(4)
NET "video_out(5)" LOC = "F7"; # Blue(5)
NET "video_out(6)" LOC = "E6"; # Blue(6)
NET "video_out(7)" LOC = "F6"; # Blue(7)
NET "video_out(8)" LOC = "F10"; # Greeen(0)
NET "video_out(9)" LOC = "D10";
NET "video_out(10)" LOC = "A10";
NET "video_out(11)" LOC = "D9";
NET "video_out(12)" LOC = "A9";
NET "video_out(13)" LOC = "B9";
NET "video_out(14)" LOC = "A8";
NET "video_out(15)" LOC = "B8"; # Green(7)
NET "video_out(16)" LOC = "D6"; # Red(0)
NET "video_out(17)" LOC = "C6";
NET "video_out(18)" LOC = "B6";
NET "video_out(19)" LOC = "D5";
NET "video_out(20)" LOC = "A5";
NET "video_out(21)" LOC = "B5";
NET "video_out(22)" LOC = "C5";
NET "video_out(23)" LOC = "B4"; # Red(7)
# Comparator
NET "ADC_CMP_OUT" LOC = "V18";
NET "ADC_ANA_REF" LOC = "U13";
NET "ADC_ANA_OUT" LOC = "Y16";
# EEPROM
NET "sda" LOC = "AA14"; # FPGA_D0
NET "scl" LOC = "W12"; # FPGA_INIT#
# Dual 7 Segment LED
NET "disp_seg1(7)" LOC = "AB15"; #0
NET "disp_seg1(6)" LOC = "AB18"; #1
NET "disp_seg1(5)" LOC = "V17"; #2
NET "disp_seg1(4)" LOC = "U14"; #3
NET "disp_seg1(3)" LOC = "V14"; #4
NET "disp_seg1(2)" LOC = "AA15"; #5
NET "disp_seg1(1)" LOC = "Y18"; #6
NET "disp_seg1(0)" LOC = "AA18"; #7
NET "disp_seg2(7)" LOC = "W17"; #0
NET "disp_seg2(6)" LOC = "Y17"; #1
NET "disp_seg2(5)" LOC = "W18"; #2
NET "disp_seg2(4)" LOC = "V16"; #3
NET "disp_seg2(3)" LOC = "W16"; #4
NET "disp_seg2(2)" LOC = "AA17"; #5
NET "disp_seg2(1)" LOC = "AA20"; #6
NET "disp_seg2(0)" LOC = "AB20"; #7
# PCI 32-bit
#NET "pci_rst" LOC = "E4" ;
#
NET "pci_ad(31)" LOC = "D2" ;
NET "pci_ad(30)" LOC = "D3" ;
NET "pci_ad(29)" LOC = "E3" ;
NET "pci_ad(28)" LOC = "F4" ;
NET "pci_ad(27)" LOC = "E2" ;
NET "pci_ad(26)" LOC = "E1" ;
NET "pci_ad(25)" LOC = "F5" ;
NET "pci_ad(24)" LOC = "G6" ;
NET "pci_ad(23)" LOC = "F3" ;
NET "pci_ad(22)" LOC = "F2" ;
NET "pci_ad(21)" LOC = "G5" ;
NET "pci_ad(20)" LOC = "H5" ;
NET "pci_ad(19)" LOC = "G2" ;
NET "pci_ad(18)" LOC = "G1" ;
NET "pci_ad(17)" LOC = "K4" ;
NET "pci_ad(16)" LOC = "K3" ;
NET "pci_cbe(3)" LOC = "K2" ;
NET "pci_cbe(2)" LOC = "K1" ;
#
NET "pci_req" LOC = "L6" ;
NET "pci_gnt" LOC = "L5" | IOSTANDARD = PCI33_3 ;
NET "pci_par" LOC = "L4" ;
NET "pci_idsel" LOC = "L3" ;
NET "pci_frame" LOC = "L2" ;
NET "pci_irdy" LOC = "L1" ;
NET "pci_trdy" LOC = "M1" ;
NET "pci_devsel" LOC = "M2" ;
NET "pci_stop" LOC = "M3" ;
NET "pci_perr" LOC = "M4" ;
NET "pci_serr" LOC = "M5" ;
NET "pci_inta" LOC = "M6" ;
#
NET "pci_cbe(1)" LOC = "N1" ;
NET "pci_cbe(0)" LOC = "N2" ;
NET "pci_ad(15)" LOC = "N3" ;
NET "pci_ad(14)" LOC = "N4" ;
NET "pci_ad(13)" LOC = "T1" ;
NET "pci_ad(12)" LOC = "T2" ;
NET "pci_ad(11)" LOC = "U2" ;
NET "pci_ad(10)" LOC = "U3" ;
NET "pci_ad(9)" LOC = "T4" ;
NET "pci_ad(8)" LOC = "U4" ;
NET "pci_ad(7)" LOC = "T5" ;
NET "pci_ad(6)" LOC = "T6" ;
NET "pci_ad(5)" LOC = "V1" ;
NET "pci_ad(4)" LOC = "V2" ;
NET "pci_ad(3)" LOC = "V3" ;
NET "pci_ad(2)" LOC = "V4" ;
NET "pci_ad(1)" LOC = "U5" ;
NET "pci_ad(0)" LOC = "V5" ;