Subversion Repositories mips_enhanced

# Project-Wide Assignments
# ========================
#set_global_assignment -name ORIGINAL_QUARTUS_VERSION "4.1 SP2"
#set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:13:08 DECEMBER 01, 2004"

# Explicitly disable TimeQuest since the GRLIB flow invokes the classical
# timing analyzer and USE_TIMEQUEST_TIMING_ANALYZER defaults to "ON"
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER "OFF"

set_global_assignment -name VHDL_FILE ../../lib/grlib/stdlib/version.vhd -library grlib
set_global_assignment -name VHDL_FILE ../../lib/grlib/stdlib/stdlib.vhd -library grlib
set_global_assignment -name VHDL_FILE ../../lib/grlib/sparc/sparc.vhd -library grlib
set_global_assignment -name VHDL_FILE ../../lib/grlib/modgen/multlib.vhd -library grlib
set_global_assignment -name VHDL_FILE ../../lib/grlib/modgen/leaves.vhd -library grlib
set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/amba.vhd -library grlib
set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/devices.vhd -library grlib
set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/defmst.vhd -library grlib
set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/apbctrl.vhd -library grlib
set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/ahbctrl.vhd -library grlib
set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/dma2ahb_pkg.vhd -library grlib
set_global_assignment -name VHDL_FILE ../../lib/grlib/amba/dma2ahb.vhd -library grlib
set_global_assignment -name VHDL_FILE ../../lib/techmap/gencomp/gencomp.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/gencomp/netcomp.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/inferred/memory_inferred.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/inferred/ddr_inferred.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/inferred/mul_inferred.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/inferred/ddr_phy_inferred.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/allclkgen.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/allddr.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/allmem.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/allpads.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/alltap.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkgen.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkmux.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkand.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/ddr_ireg.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/ddr_oreg.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/ddrphy.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram64.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram_2p.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncram_dp.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/syncfifo.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/regfile_3p.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/tap.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/techbuf.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkpad.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/clkpad_ds.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/inpad.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/inpad_ds.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/iodpad.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/iopad.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/iopad_ds.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/lvds_combo.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/odpad.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/outpad.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/outpad_ds.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/toutpad.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/skew_outpad.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/grspwc_net.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/mul_61x61.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/cpu_disas_net.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/grusbhc_net.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/ringosc.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/techmap/maps/ssrctrl_net.vhd -library techmap
set_global_assignment -name VHDL_FILE ../../lib/spw/comp/spwcomp.vhd -library spw
set_global_assignment -name VHDL_FILE ../../lib/spw/wrapper/grspw_gen.vhd -library spw
set_global_assignment -name VHDL_FILE ../../lib/eth/comp/ethcomp.vhd -library eth
set_global_assignment -name VHDL_FILE ../../lib/eth/core/greth_pkg.vhd -library eth
set_global_assignment -name VHDL_FILE ../../lib/eth/core/eth_rstgen.vhd -library eth
set_global_assignment -name VHDL_FILE ../../lib/eth/core/eth_ahb_mst.vhd -library eth
set_global_assignment -name VHDL_FILE ../../lib/eth/core/greth_tx.vhd -library eth
set_global_assignment -name VHDL_FILE ../../lib/eth/core/greth_rx.vhd -library eth
set_global_assignment -name VHDL_FILE ../../lib/eth/core/grethc.vhd -library eth
set_global_assignment -name VHDL_FILE ../../lib/eth/wrapper/greth_gen.vhd -library eth
set_global_assignment -name VHDL_FILE ../../lib/eth/wrapper/greth_gbit_gen.vhd -library eth
set_global_assignment -name VHDL_FILE ../../lib/opencores/occomp/occomp.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/can/cancomp.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/can/can_top.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/can/can_top_core_sync.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/i2c/i2c_master_bit_ctrl.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/i2c/i2c_master_byte_ctrl.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/i2c/i2coc.vhd -library opencores
set_global_assignment -name VERILOG_FILE ../../lib/opencores/spi/simple_spi_top.v -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/ata/ud_cnt.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/ata/ro_cnt.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/ata/atahost_dma_fifo.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/ata/atahost_dma_actrl.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/ata/atahost_dma_tctrl.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/ata/atahost_pio_tctrl.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/ata/atahost_pio_actrl.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/ata/atahost_controller.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/ata/atahost_pio_controller.vhd -library opencores
set_global_assignment -name VHDL_FILE ../../lib/opencores/ata/ocidec2_controller.vhd -library opencores
set_global_assignment -name VERILOG_FILE ../../lib/opencores/ac97/ac97_top.v -library opencores
set_global_assignment -name VHDL_FILE ../../lib/gaisler/arith/arith.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/arith/mul32.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/arith/div32.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/memctrl.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/sdctrl.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/sdmctrl.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/srctrl.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/memctrl/spimctrl.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/leon3.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/reg_zero.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmuconfig.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmuiface.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/libmmu.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/libiu.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/libcache.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/libproc3.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/cachemem.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmu_icache.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmu_dcache.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmu_acache.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmutlbcam.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmulrue.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmulru.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmutlb.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmutw.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmu.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mmu_cache.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/acache.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/dcache.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/icache.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/cache.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/cpu_disasx.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/grfpwx.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/mfpwx.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/grlfpwx.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/tbufmem.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/dsu3x.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/dsu3.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/proc3.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/leon3s.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/leon3cg.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/irqmp.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/grfpwxsh.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/grfpushwx.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/leon3sh.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/my_mux.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/leon3/top.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/can/can.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/can/can_mod.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/can/can_oc.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/can/can_mc.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/can/canmux.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/can/can_rd.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/misc.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/rstgen.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/gptimer.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbram.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbtrace.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbmst.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/grgpio.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbstat.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/logan.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/apbps2.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/charrom_package.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/charrom.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/apbvga.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/ahbdma.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/svgactrl.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/i2cmst.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/spictrl.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/i2cslv.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/wild.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/misc/wild2ahb.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/net/net.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/uart.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/libdcom.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/apbuart.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/dcom.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/dcom_uart.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/uart/ahbuart.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/jtag.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/libjtagcom.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/jtagcom.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/ahbjtag.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/jtag/ahbjtag_bsd.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/greth/ethernet_mac.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/greth/greth.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/greth/greth_gbit.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/greth/grethm.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/spacewire/spacewire.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/spacewire/grspw.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/spacewire/grspw2.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/spacewire/grspwm.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/usb/grusb.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/ata/ata.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/ata/ata_inf.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/ata/atahost_amba_slave.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/ata/atahost_ahbmst.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/ata/ocidec2_amba_slave.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/ata/atactrl_nodma.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/ata/atactrl_dma.vhd -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/gaisler/ata/atactrl.vhd -library gaisler
set_global_assignment -name VERILOG_FILE ../../lib/gaisler/vlog/decode_pipe1.v -library gaisler
set_global_assignment -name VERILOG_FILE ../../lib/gaisler/vlog/EXEC_stage.v -library gaisler
set_global_assignment -name VERILOG_FILE ../../lib/gaisler/vlog/ulit.v -library gaisler
set_global_assignment -name VERILOG_FILE ../../lib/gaisler/vlog/ctl_fsm1.v -library gaisler
set_global_assignment -name VERILOG_FILE ../../lib/gaisler/vlog/RF_stage1.v -library gaisler
set_global_assignment -name VERILOG_FILE ../../lib/gaisler/vlog/RF_components1.v -library gaisler
set_global_assignment -name VERILOG_FILE ../../lib/gaisler/vlog/forward.v -library gaisler
set_global_assignment -name VERILOG_FILE ../../lib/gaisler/vlog/mips789_defs.v -library gaisler
set_global_assignment -name VERILOG_FILE ../../lib/gaisler/vlog/hazard_unit.v -library gaisler
set_global_assignment -name VERILOG_FILE ../../lib/gaisler/vlog/forward.v -library gaisler
set_global_assignment -name VERILOG_FILE ../../lib/gaisler/vlog/core1.v -library gaisler
set_global_assignment -name VHDL_FILE ../../lib/esa/memoryctrl/memoryctrl.vhd -library esa
set_global_assignment -name VHDL_FILE ../../lib/esa/memoryctrl/mctrl.vhd -library esa
set_global_assignment -name VHDL_FILE config.vhd
set_global_assignment -name VHDL_FILE ahbrom.vhd
set_global_assignment -name VHDL_FILE vga_clkgen.vhd
set_global_assignment -name VHDL_FILE leon3mp.vhd

set_global_assignment -name TOP_LEVEL_ENTITY "leon3mp"