OpenCores
URL https://opencores.org/ocsvn/mjpeg-decoder/mjpeg-decoder/trunk

Subversion Repositories mjpeg-decoder

[/] [mjpeg-decoder/] [trunk/] [mjpeg/] [implementation/] [jpeg_dequant_multiplier.edn] - Rev 8

Go to most recent revision | Compare with Previous | Blame | View Log

(edif test (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0))
(status (written (timeStamp 2008 4 4 17 46 41)
   (author "Xilinx, Inc.")
   (program "Xilinx CORE Generator" (version "Xilinx CORE Generator 8.2.03i"))))
   (comment "                                                                                
      This file is owned and controlled by Xilinx and must be used              
      solely for design, simulation, implementation and creation of             
      design files limited to Xilinx devices or technologies. Use               
      with non-Xilinx devices or technologies is expressly prohibited           
      and immediately terminates your license.                                  
                                                                                
      XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION 'AS IS'             
      SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR                   
      XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION           
      AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION               
      OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS                 
      IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,                   
      AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE          
      FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY                  
      WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE                   
      IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR            
      REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF           
      INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS           
      FOR A PARTICULAR PURPOSE.                                                 
                                                                                
      Xilinx products are not intended for use in life support                  
      appliances, devices, or systems. Use in such applications are             
      expressly prohibited.                                                     
                                                                                
      (c) Copyright 1995-2006 Xilinx, Inc.                                      
      All rights reserved.                                                      
                                                                                
   ")
   (comment "Core parameters: ")
       (comment "c_a_type = 0 ")
       (comment "c_mem_type = 0 ")
       (comment "c_has_sclr = 0 ")
       (comment "c_has_q = 0 ")
       (comment "InstanceName = jpeg_dequant_multiplier ")
       (comment "c_reg_a_b_inputs = 0 ")
       (comment "c_has_o = 1 ")
       (comment "c_family = virtex2p ")
       (comment "bram_addr_width = 0 ")
       (comment "c_v2_speed = 0 ")
       (comment "c_baat = 0 ")
       (comment "c_output_hold = 0 ")
       (comment "c_b_constant = 0 ")
       (comment "c_has_loadb = 0 ")
       (comment "c_has_b = 0 ")
       (comment "c_use_luts = 0 ")
       (comment "c_xdevicefamily = virtex2p ")
       (comment "c_has_rdy = 0 ")
       (comment "c_has_nd = 0 ")
       (comment "c_pipeline = 0 ")
       (comment "c_has_a_signed = 0 ")
       (comment "c_b_type = 1 ")
       (comment "c_standalone = 0 ")
       (comment "c_sqm_type = 0 ")
       (comment "c_elaboration_dir = /home/smanz/coregen/coregen/tmp/_cg/ ")
       (comment "c_b_value = 1010 ")
       (comment "c_enable_rlocs = 0 ")
       (comment "c_mult_type = 6 ")
       (comment "c_has_aclr = 0 ")
       (comment "c_mem_init_prefix = mgv8 ")
       (comment "c_has_load_done = 0 ")
       (comment "c_has_swapb = 0 ")
       (comment "c_out_width = 20 ")
       (comment "c_b_width = 8 ")
       (comment "c_a_width = 12 ")
       (comment "c_has_rfd = 0 ")
       (comment "c_sync_enable = 0 ")
       (comment "c_has_ce = 0 ")
       (comment "c_stack_adders = 0 ")
   (external xilinxun (edifLevel 0)
      (technology (numberDefinition))
       (cell VCC (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port P (direction OUTPUT))
               )
           )
       )
       (cell GND (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port G (direction OUTPUT))
               )
           )
       )
   )
   (external jpeg_dequant_multiplier_mult_gen_v8_0_xst_1_lib (edifLevel 0)
       (technology (numberDefinition))
       (cell jpeg_dequant_multiplier_mult_gen_v8_0_xst_1 (cellType GENERIC)
           (view view_1 (viewType NETLIST)
               (interface
                   (port clk (direction INPUT))
                   (port ( array ( rename a "a<11:0>") 12 ) (direction INPUT))
                   (port ( array ( rename b "b<7:0>") 8 ) (direction INPUT))
                   (port ( array ( rename o "o<19:0>") 20 ) (direction OUTPUT))
                   (port ( array ( rename q "q<19:0>") 20 ) (direction OUTPUT))
                   (port a_signed (direction INPUT))
                   (port loadb (direction INPUT))
                   (port load_done (direction OUTPUT))
                   (port swapb (direction INPUT))
                   (port ce (direction INPUT))
                   (port aclr (direction INPUT))
                   (port sclr (direction INPUT))
                   (port rfd (direction OUTPUT))
                   (port nd (direction INPUT))
                   (port rdy (direction OUTPUT))
               )
           )
       )
   )
(library test_lib (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit Time))))
(cell jpeg_dequant_multiplier
 (cellType GENERIC) (view view_1 (viewType NETLIST)
  (interface
   (port ( array ( rename a "a<11:0>") 12 ) (direction INPUT))
   (port ( array ( rename b "b<7:0>") 8 ) (direction INPUT))
   (port ( array ( rename o "o<19:0>") 20 ) (direction OUTPUT))
   )
  (contents
   (instance VCC (viewRef view_1 (cellRef VCC  (libraryRef xilinxun))))
   (instance GND (viewRef view_1 (cellRef GND  (libraryRef xilinxun))))
   (instance BU2
      (viewRef view_1 (cellRef jpeg_dequant_multiplier_mult_gen_v8_0_xst_1 (libraryRef jpeg_dequant_multiplier_mult_gen_v8_0_xst_1_lib)))
   )
   (net (rename N3 "a<11>")
    (joined
      (portRef (member a 0))
      (portRef (member a 0) (instanceRef BU2))
    )
   )
   (net (rename N4 "a<10>")
    (joined
      (portRef (member a 1))
      (portRef (member a 1) (instanceRef BU2))
    )
   )
   (net (rename N5 "a<9>")
    (joined
      (portRef (member a 2))
      (portRef (member a 2) (instanceRef BU2))
    )
   )
   (net (rename N6 "a<8>")
    (joined
      (portRef (member a 3))
      (portRef (member a 3) (instanceRef BU2))
    )
   )
   (net (rename N7 "a<7>")
    (joined
      (portRef (member a 4))
      (portRef (member a 4) (instanceRef BU2))
    )
   )
   (net (rename N8 "a<6>")
    (joined
      (portRef (member a 5))
      (portRef (member a 5) (instanceRef BU2))
    )
   )
   (net (rename N9 "a<5>")
    (joined
      (portRef (member a 6))
      (portRef (member a 6) (instanceRef BU2))
    )
   )
   (net (rename N10 "a<4>")
    (joined
      (portRef (member a 7))
      (portRef (member a 7) (instanceRef BU2))
    )
   )
   (net (rename N11 "a<3>")
    (joined
      (portRef (member a 8))
      (portRef (member a 8) (instanceRef BU2))
    )
   )
   (net (rename N12 "a<2>")
    (joined
      (portRef (member a 9))
      (portRef (member a 9) (instanceRef BU2))
    )
   )
   (net (rename N13 "a<1>")
    (joined
      (portRef (member a 10))
      (portRef (member a 10) (instanceRef BU2))
    )
   )
   (net (rename N14 "a<0>")
    (joined
      (portRef (member a 11))
      (portRef (member a 11) (instanceRef BU2))
    )
   )
   (net (rename N15 "b<7>")
    (joined
      (portRef (member b 0))
      (portRef (member b 0) (instanceRef BU2))
    )
   )
   (net (rename N16 "b<6>")
    (joined
      (portRef (member b 1))
      (portRef (member b 1) (instanceRef BU2))
    )
   )
   (net (rename N17 "b<5>")
    (joined
      (portRef (member b 2))
      (portRef (member b 2) (instanceRef BU2))
    )
   )
   (net (rename N18 "b<4>")
    (joined
      (portRef (member b 3))
      (portRef (member b 3) (instanceRef BU2))
    )
   )
   (net (rename N19 "b<3>")
    (joined
      (portRef (member b 4))
      (portRef (member b 4) (instanceRef BU2))
    )
   )
   (net (rename N20 "b<2>")
    (joined
      (portRef (member b 5))
      (portRef (member b 5) (instanceRef BU2))
    )
   )
   (net (rename N21 "b<1>")
    (joined
      (portRef (member b 6))
      (portRef (member b 6) (instanceRef BU2))
    )
   )
   (net (rename N22 "b<0>")
    (joined
      (portRef (member b 7))
      (portRef (member b 7) (instanceRef BU2))
    )
   )
   (net (rename N23 "o<19>")
    (joined
      (portRef (member o 0))
      (portRef (member o 0) (instanceRef BU2))
    )
   )
   (net (rename N24 "o<18>")
    (joined
      (portRef (member o 1))
      (portRef (member o 1) (instanceRef BU2))
    )
   )
   (net (rename N25 "o<17>")
    (joined
      (portRef (member o 2))
      (portRef (member o 2) (instanceRef BU2))
    )
   )
   (net (rename N26 "o<16>")
    (joined
      (portRef (member o 3))
      (portRef (member o 3) (instanceRef BU2))
    )
   )
   (net (rename N27 "o<15>")
    (joined
      (portRef (member o 4))
      (portRef (member o 4) (instanceRef BU2))
    )
   )
   (net (rename N28 "o<14>")
    (joined
      (portRef (member o 5))
      (portRef (member o 5) (instanceRef BU2))
    )
   )
   (net (rename N29 "o<13>")
    (joined
      (portRef (member o 6))
      (portRef (member o 6) (instanceRef BU2))
    )
   )
   (net (rename N30 "o<12>")
    (joined
      (portRef (member o 7))
      (portRef (member o 7) (instanceRef BU2))
    )
   )
   (net (rename N31 "o<11>")
    (joined
      (portRef (member o 8))
      (portRef (member o 8) (instanceRef BU2))
    )
   )
   (net (rename N32 "o<10>")
    (joined
      (portRef (member o 9))
      (portRef (member o 9) (instanceRef BU2))
    )
   )
   (net (rename N33 "o<9>")
    (joined
      (portRef (member o 10))
      (portRef (member o 10) (instanceRef BU2))
    )
   )
   (net (rename N34 "o<8>")
    (joined
      (portRef (member o 11))
      (portRef (member o 11) (instanceRef BU2))
    )
   )
   (net (rename N35 "o<7>")
    (joined
      (portRef (member o 12))
      (portRef (member o 12) (instanceRef BU2))
    )
   )
   (net (rename N36 "o<6>")
    (joined
      (portRef (member o 13))
      (portRef (member o 13) (instanceRef BU2))
    )
   )
   (net (rename N37 "o<5>")
    (joined
      (portRef (member o 14))
      (portRef (member o 14) (instanceRef BU2))
    )
   )
   (net (rename N38 "o<4>")
    (joined
      (portRef (member o 15))
      (portRef (member o 15) (instanceRef BU2))
    )
   )
   (net (rename N39 "o<3>")
    (joined
      (portRef (member o 16))
      (portRef (member o 16) (instanceRef BU2))
    )
   )
   (net (rename N40 "o<2>")
    (joined
      (portRef (member o 17))
      (portRef (member o 17) (instanceRef BU2))
    )
   )
   (net (rename N41 "o<1>")
    (joined
      (portRef (member o 18))
      (portRef (member o 18) (instanceRef BU2))
    )
   )
   (net (rename N42 "o<0>")
    (joined
      (portRef (member o 19))
      (portRef (member o 19) (instanceRef BU2))
    )
   )
))))
(design jpeg_dequant_multiplier (cellRef jpeg_dequant_multiplier (libraryRef test_lib))
  (property X_CORE_INFO (string "mult_gen_v8_0, Coregen 8.2.03i"))
  (property PART (string "xc2vp30-ff896-7") (owner "Xilinx")))
)

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.