Subversion Repositories mod_sim_exp

\chapter*{Acknowledgments}
\addcontentsline{toc}{chapter}{Acknowledgments}
This project is maintained by the DraMCo research group\footnote{\url{http://www.dramco.be/}} of KAHO Sint-Lieven\footnote{\url{http://www.kahosl.be/}}, part of the KU Leuven association\footnote{\url{http://associatie.kuleuven.be/}}.
The base design for this IP core is written by Geoffrey Ottoy, member of the DraMCo research group. Further adjustments have been made by Jonas De Craene.
 
%\addtocontents{toc}{Document Revision History}
 
\chapter*{Document Revision History} 
\addcontentsline{toc}{chapter}{Document Revision History}
 
\section*{History}
\begin{tabular}{|l|c|l|p{10cm}|}
	\hline
	\rowcolor{Gray}
	\textbf{Revision} & \textbf{Date} & \textbf{By} & \textbf{Description} \\
	\hline
	0	& November 2012	& JDC	& First draft of this specification\\
	\hline
	1.0 & November 2012	& JDC	& Added sections ``Acknowledgement'' and ``Performance and resource usage'' as well as different fonts for \textit{variables} and \verb|signal_names|\\
	\hline
	1.1 & November 2012	& GO	& Added this ``Document Revision History''. Made several small changes in layout and formulation.\\
	\hline
	1.2 & March 2013	& JDC	& Added information about the new possible RAM structures\\
	\hline
	1.3 & March 2013	& GO	& Revision of newly added RAM structures\\
	\hline
	1.4	& April 2013	& JDC	& Revision of newly added AXI4-Lite interface\\
	\hline
		& July 2013		& JDC	& Minor update of AXI4-Lite interface interrupt structure\\
	\hline
	1.5	& April 2013	& JDC	& Revision of dual clock support, multiplier now can operate on a clock independent of bus interface clock\\
	\hline
\end{tabular}%
 
\section*{Author info}
 
\begin{itemize}
\item[GO:] Geoffrey Ottoy\\DraMCo research group\\\url{geoffrey.ottoy@kahosl.be}
\item[JDC:] Jonas De Craene\\KAHO Sint-Lieven\\\url{JonasDC@opencores.org}
\end{itemize}