URL
https://opencores.org/ocsvn/mpdma/mpdma/trunk
Subversion Repositories mpdma
[/] [mpdma/] [trunk/] [mb-bmp2jpg_linker_script] - Rev 28
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/*******************************************************************/
/* */
/* This file is automatically generated by linker script generator.*/
/* */
/* Version: Xilinx EDK 7.1.2EDK_H.12.5.1 */
/* */
/* Copyright (c) 2004 Xilinx, Inc. All rights reserved. */
/* */
/* Description : MicroBlaze Linker Script */
/* */
/*******************************************************************/
_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x1000;
_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x400;
/* Define Memories in the system */
MEMORY
{
DDR_256MB_32MX64_rank1_row13_col10_cl2_5_C_MEM0_BASEADDR : ORIGIN = 0x30000000, LENGTH = 0x0FFFFFFF
ilmb_cntlr_dlmb_cntlr : ORIGIN = 0x00000000, LENGTH = 0x0000FFFF
}
/* Specify the default entry point to the program */
ENTRY(_start)
/* Define the sections, and where they are mapped in memory */
SECTIONS
{
.text : {
__text_start = .;
*(.text)
*(.text.*)
*(.gnu.linkonce.t*)
__text_end = .;
} > ilmb_cntlr_dlmb_cntlr
.rodata : {
__rodata_start = .;
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r*)
__rodata_end = .;
} > ilmb_cntlr_dlmb_cntlr
.sdata2 : {
. = ALIGN(8);
__sdata2_start = .;
*(.sdata2)
. = ALIGN(8);
__sdata2_end = .;
} > ilmb_cntlr_dlmb_cntlr
.data : {
. = ALIGN(4);
__data_start = .;
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
__data_end = .;
} > ilmb_cntlr_dlmb_cntlr
.sbss : {
. = ALIGN(4);
__sbss_start = .;
*(.sbss)
. = ALIGN(8);
__sbss_end = .;
} > ilmb_cntlr_dlmb_cntlr
.bss : {
. = ALIGN(4);
__bss_start = .;
*(.bss)
*(COMMON)
. = ALIGN(4);
__bss_end = .;
} > ilmb_cntlr_dlmb_cntlr
PROVIDE (_SDA_BASE_ = (__sbss_end - __sbss_start / 2 ));
PROVIDE (_SDA2_BASE_ = (__sdata2_end - __sdata2_start / 2 ));
/* Generate Stack and Heap definitions */
bss_stack : {
. = ALIGN(8);
_heap = .;
_heap_start = _heap;
. += _HEAP_SIZE;
. += _STACK_SIZE;
. = ALIGN(8);
_stack = .;
__stack = _stack;
} > ilmb_cntlr_dlmb_cntlr
}