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[/] [mpmc8/] [trunk/] [rtl/] [mpmc9_resv_bit.sv] - Rev 4

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`timescale 1ns / 1ps
// ============================================================================
//        __
//   \\__/ o\    (C) 2015-2022  Robert Finch, Waterloo
//    \  __ /    All rights reserved.
//     \/_//     robfinch<remove>@finitron.ca
//       ||
//
// BSD 3-Clause License
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// 1. Redistributions of source code must retain the above copyright notice, this
//    list of conditions and the following disclaimer.
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//    this list of conditions and the following disclaimer in the documentation
//    and/or other materials provided with the distribution.
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//    this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// ============================================================================
//
import mpmc9_pkg::*;

// Reservation status bit
module mpmc9_resv_bit(clk, state, cs, we, ack, cr, adr, resv_ch, resv_adr, rb);
input clk;
input [3:0] state;
input cs;
input we;
input ack;
input cr;
input [31:0] adr;
input [3:0] resv_ch [0:NAR-1];
input [31:0] resv_adr [0:NAR-1];
output reg rb;

integer n5;
always_ff @(posedge clk)
if (state==IDLE) begin
  if (cs & we & ~ack) begin
    if (cr) begin
      rb <= FALSE;
        for (n5 = 0; n5 < NAR; n5 = n5 + 1)
              if ((resv_ch[n5]==4'd1) && (resv_adr[n5][31:4]==adr[31:4]))
              rb <= TRUE;
    end
  end
end

endmodule

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