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https://opencores.org/ocsvn/mytwoqcache/mytwoqcache/trunk
Subversion Repositories mytwoqcache
[/] [mytwoqcache/] [trunk/] [2QCache.vhd] - Rev 9
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INFO:HDLCompiler:1061 - Parsing VHDL file "C:/Xilinx/FORTHSP3ADSPC/Cache.vhd" into library work INFO:HDLCompiler:1061 - Parsing VHDL file "C:/Xilinx/FORTHSP3ADSPC/inttest.vhd" into library work ERROR:HDLCompiler:806 - "C:/Xilinx/FORTHSP3ADSPC/inttest.vhd" Line 40: Syntax error near "Address". ERROR:HDLCompiler:806 - "C:/Xilinx/FORTHSP3ADSPC/inttest.vhd" Line 69: Syntax error near "Address". ERROR:ProjectMgmt - 2 error(s) found while parsing design hierarchy. INFO:HDLCompiler:1061 - Parsing VHDL file "C:/Xilinx/FORTHSP3ADSPC/Cache.vhd" into library work INFO:ProjectMgmt - Parsing design hierarchy completed successfully.
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