OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [docs/] [datasheet/] [soc_dmem.adoc] - Rev 70

Compare with Previous | Blame | View Log

<<<
:sectnums:
==== Data Memory (DMEM)

[cols="<3,<3,<4"]
[frame="topbot",grid="none"]
|=======================
| Hardware source file(s): | neorv32_dmem.entity.vhd      | entity-only definition
|                          | mem/neorv32_dmem.default.vhd | default _platform-agnostic_ memory architecture
| Software driver file(s): | none                         | _implicitly used_
| Top entity port:         | none                         | 
| Configuration generics:  | _MEM_INT_DMEM_EN_            | implement processor-internal DMEM when _true_
|                          | _MEM_INT_DMEM_SIZE_          | DMEM size in bytes
| CPU interrupts:          | none                         | 
|=======================

Implementation of the processor-internal data memory is enabled via the processor's _MEM_INT_DMEM_EN_
generic. The size in bytes is defined via the _MEM_INT_DMEM_SIZE_ generic. If the DMEM is implemented,
the memory is mapped into the data memory space and located right at the beginning of the data memory
space (default `dspace_base_c` = 0x80000000). The DMEM is always implemented as true RAM.

[NOTE]
The actual DMEM is split into two design files: a plain entity definition (`neorv32_dmem.entity.vhd`) and the actual
architecture definition (`mem/neorv32_dmem.default.vhd`). This **default architecture** provides a _generic_ and
_platform independent_ memory design that (should) infers embedded memory block. You can replace/modify the architecture
source file in order to use platform-specific features (like advanced memory resources) or to improve technology mapping
and/or timing.

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.