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==== True Random-Number Generator (TRNG)

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|=======================
| Hardware source file(s): | neorv32_trng.vhd | 
| Software driver file(s): | neorv32_trng.c |
|                          | neorv32_trng.h |
| Top entity port:         | none | 
| Configuration generics:  | _IO_TRNG_EN_ | implement TRNG when _true_
| CPU interrupts:          | none | 
|=======================


**Theory of Operation**

The NEORV32 true random number generator provides _physical_ true random numbers.
Instead of using a pseudo RNG like a LFSR, the TRNG uses a simple, straight-forward ring
oscillator concept as physical entropy source. Hence, voltage, thermal and also semiconductor manufacturing
fluctuations are used to provide a true physical entropy source.

The TRNG is based on the _neoTRNG_, which is a "spin-off project" of the
NEORV32 processor. The TRNG uses the default neoTRNG configuration, which showed very good results in the
`dieharder` battery of random number tests. More detailed information about the neoTRNG, it's architecture and a
detailed evaluation of the random number quality can be found it it's repository: https://github.com/stnolting/neoTRNG

.Platform Independent Architecture
[NOTE]
The TRNG features a platform independent architecture without FPGA-specific primitives, macros or
attributes so it can be synthesized for _any_ FPGA.

.Inferring Latches
[NOTE]
The synthesis tool might emit a warning like _"inferring latches for ... neorv32_trng ..."_. This is no problem
as this is what we actually want (the TRNG is based on latches).


**Using the TRNG**

The TRNG features a single register for status and data access. When the _TRNG_CTRL_EN_ control register (`CTRL`)
bit is set, the TRNG is enabled and starts operation. As soon as the _TRNG_CTRL_VALID_ bit is set, the currently
sampled 8-bit random data byte can be obtained from the lowest 8 bits of the `CTRL` register
(_TRNG_CTRL_DATA_MSB_ : _TRNG_CTRL_DATA_LSB_). These bits always keep the latest valid data obtained from the TRNG
entropy source. The _TRNG_CTRL_VALID_ bit is automatically cleared when reading the control register.

.TRNG Reset
[NOTE]
The TRNG core does not provide a dedicated reset. In order to ensure correct operations, the TRNG should be
disabled (=reset) by clearing the _TRNG_CTRL_EN_ and waiting some milliseconds before re-enabling it.


.TRNG register map (`struct NEORV32_TRNG`)
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|=======================
| Address | Name [C] | Bit(s), Name [C] | R/W | Function
.3+<| `0xffffffb8` .3+<| `NEORV32_TRNG.CTRL` <|`7:0` _TRNG_CTRL_DATA_MSB_ : _TRNG_CTRL_DATA_MSB_ ^| r/- <| 8-bit random data
                                             <|`30` _TRNG_CTRL_EN_                               ^| r/w <| TRNG enable
                                             <|`31` _TRNG_CTRL_VALID_                            ^| r/- <| random data is valid when set
|=======================