Subversion Repositories neorv32

## Simulation Source Folder

### [`ghdl`](https://github.com/stnolting/neorv32/tree/master/sim/ghdl)

This folder contains a script for simulating the processor using GHDL.

### [`rtl_modules`](https://github.com/stnolting/neorv32/tree/master/sim/rtl_modules)

This folder provides additional/alternative simulation components (mainly optimized memory components yet). See the comments in the according files for more information.

### [`vivado`](https://github.com/stnolting/neorv32/tree/master/sim/vivado)

This folder provides an example waveform configuration (for Xilinx ISIM simulator) for the default testbench.

### [`neorv32_tb.vhd`](https://github.com/stnolting/neorv32/tree/master/sim/neorv32_tb.vhd)

Default testbench for the NEORV32 Processor.