Subversion Repositories neorv32

// #################################################################################################
// # << NEORV32: neorv32_pwm.c - Pulse Width Modulation Controller (PWM) HW Driver >>              #
// # ********************************************************************************************* #
// # BSD 3-Clause License                                                                          #
// #                                                                                               #
// # Copyright (c) 2020, Stephan Nolting. All rights reserved.                                     #
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// # The NEORV32 Processor - https://github.com/stnolting/neorv32              (c) Stephan Nolting #
// #################################################################################################
 
 
/**********************************************************************//**
 * @file neorv32_pwm.c
 * @author Stephan Nolting
 * @brief Pulse-Width Modulation Controller (PWM) HW driver source file.
 *
 * @note These functions should only be used if the PWM unit was synthesized (IO_PWM_USE = true).
 **************************************************************************/
 
#include "neorv32.h"
#include "neorv32_pwm.h"
 
 
/**********************************************************************//**
 * Check if PWM unit was synthesized.
 *
 * @return 0 if PWM was not synthesized, 1 if PWM is available.
 **************************************************************************/
int neorv32_pwm_available(void) {
 
  if (neorv32_cpu_csr_read(CSR_MFEATURES) & (1 << CPU_MFEATURES_IO_PWM)) {
    return 1;
  }
  else {
    return 0;
  }
}
 
 
/**********************************************************************//**
 * Enable and configure pulse width modulation controller. The PWM control register bits are listed in #NEORV32_PWM_CT_enum.
 *
 * @param[in] prsc Clock prescaler select (0..7). See #NEORV32_CLOCK_PRSC_enum.
 **************************************************************************/
void neorv32_pwm_setup(uint8_t prsc) {
 
  PWM_CT = 0; // reset
 
  uint32_t ct_enable = 1;
  ct_enable = ct_enable << PWM_CT_EN;
 
  uint32_t ct_prsc = (uint32_t)(prsc & 0x07);
  ct_prsc = ct_prsc << PWM_CT_PRSC0;
 
  PWM_CT = ct_enable | ct_prsc;
}
 
 
/**********************************************************************//**
 * Disable pulse width modulation controller.
 **************************************************************************/
void neorv32_pwm_disable(void) {
 
  PWM_CT &= ~((uint32_t)(1 << PWM_CT_EN));
}
 
 
/**********************************************************************//**
 * Set duty cycle for channel. The PWM duty cycle bits are listed in #NEORV32_PWM_DUTY_enum.
 *
 * @param[in] channel Channel select (0..3).
 * @param[in] duty Duty cycle (0..255).
 **************************************************************************/
void neorv32_pwm_set(uint8_t channel, uint8_t duty) {
 
  channel = channel & 0x03;
 
  uint32_t duty_mask = 0xff;
  uint32_t duty_new  = (uint32_t)duty;
 
  duty_mask = duty_mask << (channel * 8);
  duty_new  = duty_new  << (channel * 8);
 
  PWM_DUTY &= ~duty_mask; // clear previous duty cycle
  PWM_DUTY |= duty_new; // set new duty cycle
}