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# Main board wing pin [] to FPGA pin Pxx map
# -------C-------    -------B-------    -------A-------
# [GND] [C00] P114   [GND] [B00] P99    P100 [A15]
# [2V5] [C01] P115   [2V5] [B01] P97    P98 [A14]
# [3V3] [C02] P116   [3V3] [B02] P92    P93 [A13]
# [5V0] [C03] P117   [5V0] [B03] P87    P88 [A12]
#       [C04] P118         [B04] P84    P85 [A11] [5V0]
#       [C05] P119         [B05] P82    P83 [A10] [3V3]
#       [C06] P120         [B06] P80    P81 [A09] [2V5]
#       [C07] P121         [B07] P78    P79 [A08] [GND]
# [GND] [C08] P123   [GND] [B08] P74    P75 [A07]
# [2V5] [C09] P124   [2V5] [B09] P95    P67 [A06]
# [3V3] [C10] P126   [3V3] [B10] P62    P66 [A05]
# [5V0] [C11] P127   [5V0] [B11] P59    P61 [A04]
#       [C12] P131         [B12] P57    P58 [A03] [5V0]
#       [C13] P132         [B13] P55    P56 [A02] [3V3]
#       [C14] P133         [B14] P50    P51 [A01] [2V5]
#       [C15] P134         [B15] P47    P48 [A00] [GND]

## Prohibit the automatic placement of pins that are connected to VCC or GND for configuration.
CONFIG PROHIBIT=P144;
CONFIG PROHIBIT=P69;
CONFIG PROHIBIT=P60;

NET CLK_32MHZ   LOC="P94"  | IOSTANDARD = LVTTL | PERIOD=31.26ns;
NET RX          LOC="P101" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW;          # RX
NET TX          LOC="P105" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW | PULLUP; # TX

NET SDRAM_ADDR(0)  LOC="P140" | IOSTANDARD=LVTTL;                                # SDRAM_ADDR0
NET SDRAM_ADDR(1)  LOC="P139" | IOSTANDARD=LVTTL;                                # SDRAM_ADDR1
NET SDRAM_ADDR(2)  LOC="P138" | IOSTANDARD=LVTTL;                                # SDRAM_ADDR2
NET SDRAM_ADDR(3)  LOC="P137" | IOSTANDARD=LVTTL;                                # SDRAM_ADDR3
NET SDRAM_ADDR(4)  LOC="P46"  | IOSTANDARD=LVTTL;                                # SDRAM_ADDR4
NET SDRAM_ADDR(5)  LOC="P45"  | IOSTANDARD=LVTTL;                                # SDRAM_ADDR5
NET SDRAM_ADDR(6)  LOC="P44"  | IOSTANDARD=LVTTL;                                # SDRAM_ADDR6
NET SDRAM_ADDR(7)  LOC="P43"  | IOSTANDARD=LVTTL;                                # SDRAM_ADDR7
NET SDRAM_ADDR(8)  LOC="P41"  | IOSTANDARD=LVTTL;                                # SDRAM_ADDR8
NET SDRAM_ADDR(9)  LOC="P40"  | IOSTANDARD=LVTTL;                                # SDRAM_ADDR9
NET SDRAM_ADDR(10) LOC="P141" | IOSTANDARD=LVTTL;                                # SDRAM_ADDR10
NET SDRAM_ADDR(11) LOC="P35"  | IOSTANDARD=LVTTL;                                # SDRAM_ADDR11
NET SDRAM_ADDR(12) LOC="P34"  | IOSTANDARD=LVTTL;                                # SDRAM_ADDR12
NET SDRAM_DATA(0)  LOC="P9"   | IOSTANDARD=LVTTL;                                # SDRAM_DATA0
NET SDRAM_DATA(1)  LOC="P10"  | IOSTANDARD=LVTTL;                                # SDRAM_DATA1
NET SDRAM_DATA(2)  LOC="P11"  | IOSTANDARD=LVTTL;                                # SDRAM_DATA2
NET SDRAM_DATA(3)  LOC="P12"  | IOSTANDARD=LVTTL;                                # SDRAM_DATA3
NET SDRAM_DATA(4)  LOC="P14"  | IOSTANDARD=LVTTL;                                # SDRAM_DATA4
NET SDRAM_DATA(5)  LOC="P15"  | IOSTANDARD=LVTTL;                                # SDRAM_DATA5
NET SDRAM_DATA(6)  LOC="P16"  | IOSTANDARD=LVTTL;                                # SDRAM_DATA6
NET SDRAM_DATA(7)  LOC="P8"   | IOSTANDARD=LVTTL;                                # SDRAM_DATA7
NET SDRAM_DATA(8)  LOC="P21"  | IOSTANDARD=LVTTL;                                # SDRAM_DATA8
NET SDRAM_DATA(9)  LOC="P22"  | IOSTANDARD=LVTTL;                                # SDRAM_DATA9
NET SDRAM_DATA(10) LOC="P23"  | IOSTANDARD=LVTTL;                                # SDRAM_DATA10
NET SDRAM_DATA(11) LOC="P24"  | IOSTANDARD=LVTTL;                                # SDRAM_DATA11
NET SDRAM_DATA(12) LOC="P26"  | IOSTANDARD=LVTTL;                                # SDRAM_DATA12
NET SDRAM_DATA(13) LOC="P27"  | IOSTANDARD=LVTTL;                                # SDRAM_DATA13
NET SDRAM_DATA(14) LOC="P29"  | IOSTANDARD=LVTTL;                                # SDRAM_DATA14
NET SDRAM_DATA(15) LOC="P30"  | IOSTANDARD=LVTTL;                                # SDRAM_DATA15
NET SDRAM_DQML     LOC="P7"   | IOSTANDARD=LVTTL;                                # SDRAM_DQML
NET SDRAM_DQMH     LOC="P17"  | IOSTANDARD=LVTTL;                                # SDRAM_DQMH
NET SDRAM_BA(0)    LOC="P143" | IOSTANDARD=LVTTL;                                # SDRAM_BA0
NET SDRAM_BA(1)    LOC="P142" | IOSTANDARD=LVTTL;                                # SDRAM_BA1
NET SDRAM_nWE      LOC="P6"   | IOSTANDARD=LVTTL;                                # SDRAM_nWE
NET SDRAM_nCAS     LOC="P5"   | IOSTANDARD=LVTTL;                                # SDRAM_nCAS
NET SDRAM_nRAS     LOC="P2"   | IOSTANDARD=LVTTL;                                # SDRAM_nRAS
NET SDRAM_nCS      LOC="P1"   | IOSTANDARD=LVTTL;                                # SDRAM_CS
NET SDRAM_CLK      LOC="P32"  | IOSTANDARD=LVTTL;                                # SDRAM_CLK
NET SDRAM_CKE      LOC="P33"  | IOSTANDARD=LVTTL;                                # SDRAM_CKE
#NET JTAG_TMS LOC="P107" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # JTAG_TMS
#NET JTAG_TCK LOC="P109" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # JTAG_TCK
#NET JTAG_TDI LOC="P110" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # JTAG_TDI
#NET JTAG_TDO LOC="P106" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # JTAG_TDO
#NET FLASH_CS LOC="P38"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # FLASH_CS
#NET FLASH_CK LOC="P70"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # FLASH_CK
#NET FLASH_SI LOC="P64"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST;          # FLASH_SI
#NET FLASH_SO LOC="P65"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=FAST | PULLUP; # FLASH_SO

NET "VGA_R<5>" LOC = "P121"     | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #C7  - 0.5K || 10K
NET "VGA_R<4>" LOC = "P120"     | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #C6  - 1K
NET "VGA_R<3>" LOC = "P119"     | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #C5  - 2K
NET "VGA_R<2>" LOC = "P118"     | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #C4  - 4K
NET "VGA_R<1>" LOC = "P133"     | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #C14 - 8K
NET "VGA_R<0>" LOC = "P131"      | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #C12 - 16K

NET "VGA_G<5>" LOC = "P78"      | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #B7  - 0.5K || 10K
NET "VGA_G<4>" LOC = "P80"      | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #B6  - 1K
NET "VGA_G<3>" LOC = "P82"      | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #B5  - 2K
NET "VGA_G<2>" LOC = "P84"      | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #B4  - 4K
NET "VGA_G<1>" LOC = "P55"      | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #B13 - 8K
NET "VGA_G<0>" LOC = "P57"       | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #B12 - 16K

NET "VGA_B<5>" LOC = "P87"      | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #B3  - 0.5K || 10K
NET "VGA_B<4>" LOC = "P92"      | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #B2  - 1K
NET "VGA_B<3>" LOC = "P97"      | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #B1  - 2K
NET "VGA_B<2>" LOC = "P99"      | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #B0  - 4K
NET "VGA_B<1>" LOC = "P47"      | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #B15 - 8K
NET "VGA_B<0>" LOC = "P50"       | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #B14 - 16K

NET "VGA_HSYNC" LOC = "P117"    | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #C3  - 75
NET "VGA_VSYNC" LOC = "P116"    | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;        #C2  - 75

NET "LED<7>" LOC = "P61" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ;    #A4  - 330
NET "LED<6>" LOC = "P66" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ;    #A5  - 330
NET "LED<5>" LOC = "P67" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ;    #A6  - 330
NET "LED<4>" LOC = "P75" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ;    #A7  - 330
NET "LED<3>" LOC = "P58" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ;    #A3  - 330
NET "LED<2>" LOC = "P48" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ;    #A0  - 330
NET "LED<1>" LOC = "P51" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ;    #A1  - 330
NET "LED<0>" LOC = "P56" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 | PULLDOWN ;     #A2  - 330
#NET "LED1"   LOC = "P112"| IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE=8 | PULLUP;                   # USER LED1

#NET "BTN_EAST"         LOC = "P59" | IOSTANDARD = LVTTL | PULLDOWN ;   #B11 - to +
#NET "BTN_NORTH"        LOC = "P95"     | IOSTANDARD = LVTTL | PULLDOWN ;       #B9  - to +
NET "BTN_SOUTH"         LOC = "P62" | IOSTANDARD = LVTTL | PULLDOWN ;   #B10 - to +
NET "BTN_WEST"  LOC = "P74" | IOSTANDARD = LVTTL | PULLDOWN ;   #B8  - to +
#NET "BTN_CENTER"       LOC = "P85" | IOSTANDARD = LVTTL | PULLDOWN ;   #A11 - to +

NET "PS2DATA"   LOC="P114" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW | PULLUP; # C0
NET "PS2CLKA"   LOC="P115" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW | PULLUP; # C1
NET "PS2DATB"   LOC="P88"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW | PULLUP; # A12
NET "PS2CLKB"   LOC="P93"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW | PULLUP; # A13
NET "AUDIO_L"   LOC="P98"  | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW;          # A14
NET "AUDIO_R"   LOC="P100" | IOSTANDARD=LVTTL | DRIVE=8 | SLEW=SLOW;          # A15

NET "SD_nCS"    LOC = "P85" |IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 8 ;             #A11
NET "SD_DO"             LOC = "P83" |IOSTANDARD = LVTTL | PULLUP;                                                               #A10
NET "SD_CK"             LOC = "P81" |IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 8 ;             #A9
NET "SD_DI"             LOC = "P79" |IOSTANDARD = LVTTL | SLEW = FAST | DRIVE = 8 ;             #A8