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[/] [noekeoncore/] [trunk/] [tb/] [tb_pi_2.vhd] - Rev 2
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-- Copyright (c) 2013 Antonio de la Piedra -- This program is free software: you can redistribute it and/or modify -- it under the terms of the GNU General Public License as published by -- the Free Software Foundation, either version 3 of the License, or -- (at your option) any later version. -- This program is distributed in the hope that it will be useful, -- but WITHOUT ANY WARRANTY; without even the implied warranty of -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- GNU General Public License for more details. -- You should have received a copy of the GNU General Public License -- along with this program. If not, see <http://www.gnu.org/licenses/>. LIBRARY ieee; USE ieee.std_logic_1164.ALL; ENTITY tb_pi_2 IS END tb_pi_2; ARCHITECTURE behavior OF tb_pi_2 IS -- Component Declaration for the Unit Under Test (UUT) COMPONENT pi_2 PORT( a_1_in : IN std_logic_vector(31 downto 0); a_2_in : IN std_logic_vector(31 downto 0); a_3_in : IN std_logic_vector(31 downto 0); a_1_out : OUT std_logic_vector(31 downto 0); a_2_out : OUT std_logic_vector(31 downto 0); a_3_out : OUT std_logic_vector(31 downto 0) ); END COMPONENT; --Inputs signal a_1_in : std_logic_vector(31 downto 0) := (others => '0'); signal a_2_in : std_logic_vector(31 downto 0) := (others => '0'); signal a_3_in : std_logic_vector(31 downto 0) := (others => '0'); --Outputs signal a_1_out : std_logic_vector(31 downto 0); signal a_2_out : std_logic_vector(31 downto 0); signal a_3_out : std_logic_vector(31 downto 0); -- No clocks detected in port list. Replace <clock> below with -- appropriate port name BEGIN -- Instantiate the Unit Under Test (UUT) uut: pi_2 PORT MAP ( a_1_in => a_1_in, a_2_in => a_2_in, a_3_in => a_3_in, a_1_out => a_1_out, a_2_out => a_2_out, a_3_out => a_3_out ); -- Stimulus process stim_proc: process begin a_1_in <= X"43575679"; a_2_in <= X"465647e0"; a_3_in <= X"c002aeef"; wait; end process; END;