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; Toshiba MeP AVC2 Coprocessor description. -*- Scheme -*-; Copyright 2011 Free Software Foundation, Inc.;; Contributed by Red Hat Inc;;; This file is part of the GNU Binutils.;; This program is free software; you can redistribute it and/or modify; it under the terms of the GNU General Public License as published by; the Free Software Foundation; either version 3 of the License, or; (at your option) any later version.;; This program is distributed in the hope that it will be useful,; but WITHOUT ANY WARRANTY; without even the implied warranty of; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the; GNU General Public License for more details.;; You should have received a copy of the GNU General Public License; along with this program; if not, write to the Free Software; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,; MA 02110-1301, USA.; This file was customized based upon the output of a2cgen 0.42;------------------------------------------------------------------------------; MeP-Integrator will redefine the isa pmacros below to allow the bit widths; specified below for each ME_MODULE using this coprocessor.; This coprocessor requires 16 and 32 bit insns.;------------------------------------------------------------------------------; begin-isas(define-pmacro avc2-core-isa () (ISA ext_core1))(define-pmacro avc2-16-isa () (ISA ext_cop1_16))(define-pmacro avc2-32-isa () (ISA ext_cop1_32))(define-pmacro all-avc2-isas () (ISA ext_core1,ext_cop1_16,ext_cop1_32)); end-isas(define-pmacro (dncpi xname xcomment xattrs xsyntax xformat xsemantics xtiming)(dni xname xcomment (.splice (.unsplice xattrs) avc2-core-isa) xsyntax xformat xsemantics xtiming))(define-pmacro (dn16i xname xcomment xattrs xsyntax xformat xsemantics xtiming)(dni xname xcomment (.splice (.unsplice xattrs) avc2-16-isa) xsyntax xformat xsemantics xtiming))(define-pmacro (dn32i xname xcomment xattrs xsyntax xformat xsemantics xtiming)(dni xname xcomment (.splice (.unsplice xattrs) avc2-32-isa) xsyntax xformat xsemantics xtiming)); register definitions; ---------------------; NOTE: This exists solely for the purpose of providing the proper register names for this coprocessor.; GDB will use the hardware table generated from this declaration. The operands use h-cr; from mep-core.cpu so that SID's semantic trace will be consistent between; the core and the coprocessor but use parse/print handlers which reference the hardware table; generated from this declarations(define-hardware(name h-cr-avc2)(comment "32-bit coprocessor registers for avc2 coprocessor")(attrs VIRTUAL all-avc2-isas)(type register SI (32))(set (index newval) (c-call VOID "h_cr64_set" index (ext DI newval)))(get (index) (trunc SI (c-call DI "h_cr64_get" index)))(indices keyword "$c" (.map -reg-pair (.iota 8)))); NOTE: This exists solely for the purpose of providing the proper register names for this coprocessor.; GDB will use the hardware table generated from this declaration. The operands use h-ccr; from mep-core.cpu so that SID's semantic trace will be consistent between; the core and the coprocessor but use parse/print handlers which reference the hardware table; generated from this declarations(define-hardware(name h-ccr-avc2)(comment "Coprocessor control registers for avc2 coprocessor")(attrs VIRTUAL all-avc2-isas)(type register SI (64))(set (index newval) (c-call VOID "h_ccr_set" index newval))(get (index) (c-call SI "h_ccr_get" index))(indices keyword ""(.splice($accl1 5) ($acch1 4) ($accl0 3) ($acch0 2) ($CBCR 1) ($csar 0)($cbcr 1)(.unsplice (.map -ccr-reg-pair (.iota 6))))))(dnop avc2copCCR5 "Audio Copro Accumulator" (all-avc2-isas) h-ccr 5)(dnop avc2copCCR4 "Audio Copro Accumulator" (all-avc2-isas) h-ccr 4)(dnop avc2copCCR3 "Audio Copro Accumulator" (all-avc2-isas) h-ccr 3)(dnop avc2copCCR2 "Audio Copro Accumulator" (all-avc2-isas) h-ccr 2)(dnop avc2copCCR1 "Audio Copro Branch Condition Register" (all-avc2-isas) h-ccr 1)(dnop avc2copCCR0 "Audio Copro Shift-Amount Register" (all-avc2-isas) h-ccr 0); instruction field and operand definitions(dnf f-avc2-v3sub4u0 "sub opecode field" (avc2-32-isa) 0 4)(dnf f-avc2-v1sub4u0 "sub opecode field" (avc2-16-isa) 0 4)(dnf f-avc2-v3Rn "register field" (avc2-32-isa) 4 4)(dnop avc2v3Rn "the operand definition" (avc2-32-isa) h-gpr f-avc2-v3Rn)(dnf f-avc2-v3CCRn "register field" (avc2-32-isa) 4 4)(define-full-operand avc2v3CCRn "the operand definition" (avc2-32-isa (CDATA REGNUM)) h-ccr DFLT f-avc2-v3CCRn ((parse "avc2_ccr") (print "avc2_ccr")) () ())(df f-avc2-v3Imm16s4x24e32-hi "split immediate field hi" (avc2-32-isa) 4 8 INT #f #f)(df f-avc2-v3Imm16s4x24e32-lo "split immediate field lo" (avc2-32-isa) 24 8 UINT #f #f)(define-multi-ifield(name f-avc2-v3Imm16s4x24e32)(comment "split immediate field")(attrs avc2-32-isa)(mode INT)(subfields f-avc2-v3Imm16s4x24e32-hi f-avc2-v3Imm16s4x24e32-lo)(insert (sequence ()(set (ifield f-avc2-v3Imm16s4x24e32-hi) (sra INT (ifield f-avc2-v3Imm16s4x24e32) 8))(set (ifield f-avc2-v3Imm16s4x24e32-lo) (and (ifield f-avc2-v3Imm16s4x24e32) #xff))))(extract (set (ifield f-avc2-v3Imm16s4x24e32)(or (sll (ifield f-avc2-v3Imm16s4x24e32-hi) 8) (ifield f-avc2-v3Imm16s4x24e32-lo)))))(dnop avc2v3Imm16s4x24e32 "the operand definition" (avc2-32-isa) h-sint f-avc2-v3Imm16s4x24e32)(dnf f-avc2-v3CRn "register field" (avc2-32-isa) 4 4)(define-full-operand avc2v3CRn "the operand definition" (avc2-32-isa) h-cr DFLT f-avc2-v3CRn ((parse "avc2_cr") (print "avc2_cr")) () ())(dnf f-avc2-v1CRq "register field" (avc2-16-isa) 4 4)(define-full-operand avc2v1CRq "the operand definition" (avc2-16-isa) h-cr DFLT f-avc2-v1CRq ((parse "avc2_cr") (print "avc2_cr")) () ())(dnf f-avc2-v1sub4u4 "sub opecode field" (avc2-16-isa) 4 4)(dnf f-avc2-c3Rn "register field" (avc2-core-isa) 4 4)(dnop avc2c3Rn "the operand definition" (avc2-core-isa) h-gpr f-avc2-c3Rn)(dnf f-avc2-c3CCRn "register field" (avc2-core-isa) 4 4)(define-full-operand avc2c3CCRn "the operand definition" (avc2-core-isa (CDATA REGNUM)) h-ccr DFLT f-avc2-c3CCRn ((parse "avc2_ccr") (print "avc2_ccr")) () ())(df f-avc2-c3Imm16s4x24e32-hi "split immediate field hi" (avc2-core-isa) 4 8 INT #f #f)(df f-avc2-c3Imm16s4x24e32-lo "split immediate field lo" (avc2-core-isa) 24 8 UINT #f #f)(define-multi-ifield(name f-avc2-c3Imm16s4x24e32)(comment "split immediate field")(attrs avc2-core-isa)(mode INT)(subfields f-avc2-c3Imm16s4x24e32-hi f-avc2-c3Imm16s4x24e32-lo)(insert (sequence ()(set (ifield f-avc2-c3Imm16s4x24e32-hi) (sra INT (ifield f-avc2-c3Imm16s4x24e32) 8))(set (ifield f-avc2-c3Imm16s4x24e32-lo) (and (ifield f-avc2-c3Imm16s4x24e32) #xff))))(extract (set (ifield f-avc2-c3Imm16s4x24e32)(or (sll (ifield f-avc2-c3Imm16s4x24e32-hi) 8) (ifield f-avc2-c3Imm16s4x24e32-lo)))))(dnop avc2c3Imm16s4x24e32 "the operand definition" (avc2-core-isa) h-sint f-avc2-c3Imm16s4x24e32)(dnf f-avc2-c3CRn "register field" (avc2-core-isa) 4 4)(define-full-operand avc2c3CRn "the operand definition" (avc2-core-isa) h-cr DFLT f-avc2-c3CRn ((parse "avc2_cr") (print "avc2_cr")) () ())(dnf f-avc2-c3sub4u4 "sub opecode field" (avc2-core-isa) 4 4)(dnf f-avc2-v3Rm "register field" (avc2-32-isa) 8 4)(dnop avc2v3Rm "the operand definition" (avc2-32-isa) h-gpr f-avc2-v3Rm)(df f-avc2-v1Imm6u8 "immediate field" (avc2-16-isa) 8 6 UINT #f #f)(dnop avc2v1Imm6u8 "the operand definition" (avc2-16-isa) h-uint f-avc2-v1Imm6u8)(df f-avc2-v1Imm5u8 "immediate field" (avc2-16-isa) 8 5 UINT #f #f)(dnop avc2v1Imm5u8 "the operand definition" (avc2-16-isa) h-uint f-avc2-v1Imm5u8)(df f-avc2-v1Imm6s8 "immediate field" (avc2-16-isa) 8 6 INT #f #f)(dnop avc2v1Imm6s8 "the operand definition" (avc2-16-isa) h-sint f-avc2-v1Imm6s8)(df f-avc2-v1Imm8s8 "immediate field" (avc2-16-isa) 8 8 INT #f #f)(dnop avc2v1Imm8s8 "the operand definition" (avc2-16-isa) h-sint f-avc2-v1Imm8s8)(dnf f-avc2-v1CRp "register field" (avc2-16-isa) 8 4)(define-full-operand avc2v1CRp "the operand definition" (avc2-16-isa) h-cr DFLT f-avc2-v1CRp ((parse "avc2_cr") (print "avc2_cr")) () ())(dnf f-avc2-v1sub4u8 "sub opecode field" (avc2-16-isa) 8 4)(dnf f-avc2-c3Rm "register field" (avc2-core-isa) 8 4)(dnop avc2c3Rm "the operand definition" (avc2-core-isa) h-gpr f-avc2-c3Rm)(dnf f-avc2-c3sub4u8 "sub opecode field" (avc2-core-isa) 8 4)(dnf f-avc2-v3sub4u12 "sub opecode field" (avc2-32-isa) 12 4)(dnf f-avc2-v1CRo "register field" (avc2-16-isa) 12 4)(define-full-operand avc2v1CRo "the operand definition" (avc2-16-isa) h-cr DFLT f-avc2-v1CRo ((parse "avc2_cr") (print "avc2_cr")) () ())(dnf f-avc2-v1sub4u12 "sub opecode field" (avc2-16-isa) 12 4)(dnf f-avc2-v1sub3u13 "sub opecode field" (avc2-16-isa) 13 3)(dnf f-avc2-v1sub2u14 "sub opecode field" (avc2-16-isa) 14 2)(dnf f-avc2-v3sub4u16 "sub opecode field" (avc2-32-isa) 16 4)(dnf f-avc2-c3sub4u16 "sub opecode field" (avc2-core-isa) 16 4)(dnf f-avc2-v3CRq "register field" (avc2-32-isa) 20 4)(define-full-operand avc2v3CRq "the operand definition" (avc2-32-isa) h-cr DFLT f-avc2-v3CRq ((parse "avc2_cr") (print "avc2_cr")) () ())(dnf f-avc2-v3sub4u20 "sub opecode field" (avc2-32-isa) 20 4)(dnf f-avc2-c3CRq "register field" (avc2-core-isa) 20 4)(define-full-operand avc2c3CRq "the operand definition" (avc2-core-isa) h-cr DFLT f-avc2-c3CRq ((parse "avc2_cr") (print "avc2_cr")) () ())(dnf f-avc2-c3sub4u20 "sub opecode field" (avc2-core-isa) 20 4)(dnf f-avc2-v3sub4u24 "sub opecode field" (avc2-32-isa) 24 4)(df f-avc2-c3Imm6u24 "immediate field" (avc2-core-isa) 24 6 UINT #f #f)(dnop avc2c3Imm6u24 "the operand definition" (avc2-core-isa) h-uint f-avc2-c3Imm6u24)(df f-avc2-c3Imm5u24 "immediate field" (avc2-core-isa) 24 5 UINT #f #f)(dnop avc2c3Imm5u24 "the operand definition" (avc2-core-isa) h-uint f-avc2-c3Imm5u24)(df f-avc2-c3Imm6s24 "immediate field" (avc2-core-isa) 24 6 INT #f #f)(dnop avc2c3Imm6s24 "the operand definition" (avc2-core-isa) h-sint f-avc2-c3Imm6s24)(dnf f-avc2-c3CRp "register field" (avc2-core-isa) 24 4)(define-full-operand avc2c3CRp "the operand definition" (avc2-core-isa) h-cr DFLT f-avc2-c3CRp ((parse "avc2_cr") (print "avc2_cr")) () ())(dnf f-avc2-c3sub4u24 "sub opecode field" (avc2-core-isa) 24 4)(dnf f-avc2-v3sub4u28 "sub opecode field" (avc2-32-isa) 28 4)(dnf f-avc2-c3CRo "register field" (avc2-core-isa) 28 4)(define-full-operand avc2c3CRo "the operand definition" (avc2-core-isa) h-cr DFLT f-avc2-c3CRo ((parse "avc2_cr") (print "avc2_cr")) () ())(dnf f-avc2-c3sub4u28 "sub opecode field" (avc2-core-isa) 28 4)(dnf f-avc2-c3sub3u29 "sub opecode field" (avc2-core-isa) 29 3)(dnf f-avc2-c3sub2u30 "sub opecode field" (avc2-core-isa) 30 2); instruction definitions(dncpi cnop_avc2_c3 "cnop" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cnop"))"cnop"(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(c-call "check_option_cp" pc)())(dncpi cmov1_avc2_c3 "cmov1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmov1"))"cmov $avc2c3CRn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3CRn avc2c3Rm (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xf))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRn avc2c3Rm))())(dncpi cmov2_avc2_c3 "cmov2" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmov2"))"cmov $avc2c3Rm,$avc2c3CRn"(+ MAJ_15 (f-sub4 7) avc2c3Rm avc2c3CRn (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xf))(sequence() (c-call "check_option_cp" pc)(set avc2c3Rm avc2c3CRn))())(dncpi cmovi_avc2_c3 "cmovi" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmovi"))"cmovi $avc2c3CRq,$avc2c3Imm16s4x24e32"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm16s4x24e32 (f-avc2-c3sub4u16 #xe))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (ext SI avc2c3Imm16s4x24e32)))())(dncpi cmovc1_avc2_c3 "cmovc1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmovc1"))"cmovc $avc2c3CCRn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3CCRn avc2c3Rm (f-avc2-c3sub4u28 #x2) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xf))(sequence() (c-call "check_option_cp" pc)(set avc2c3CCRn avc2c3Rm))())(dncpi cmovc2_avc2_c3 "cmovc2" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmovc2"))"cmovc $avc2c3Rm,$avc2c3CCRn"(+ MAJ_15 (f-sub4 7) avc2c3Rm avc2c3CCRn (f-avc2-c3sub4u28 #x3) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xf))(sequence() (c-call "check_option_cp" pc)(set avc2c3Rm avc2c3CCRn))())(dncpi cmov_avc2_c3 "cmov" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmov"))"cmov $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x3) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq avc2c3CRp))())(dncpi cadd3_avc2_c3 "cadd3" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cadd3"))"cadd3 $avc2c3CRo,$avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRo avc2c3CRq avc2c3CRp (f-avc2-c3sub4u16 #x3) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRo (add avc2c3CRq avc2c3CRp)))())(dncpi caddi_avc2_c3 "caddi" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "caddi"))"caddi $avc2c3CRq,$avc2c3Imm6s24"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm6s24 (f-avc2-c3sub2u30 #x0) (f-avc2-c3sub4u16 #x1) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (add avc2c3CRq (ext SI avc2c3Imm6s24))))())(dncpi csub_avc2_c3 "csub" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csub"))"csub $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x2) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (sub avc2c3CRq avc2c3CRp)))())(dncpi cneg_avc2_c3 "cneg" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cneg"))"cneg $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (neg avc2c3CRp)))())(dncpi cextb_avc2_c3 "cextb" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cextb"))"cextb $avc2c3CRq"(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (ext SI (and QI (srl avc2c3CRq 0) #xff))))())(dncpi cexth_avc2_c3 "cexth" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cexth"))"cexth $avc2c3CRq"(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u24 #x2) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (ext SI (and HI (srl avc2c3CRq 0) #xffff))))())(dncpi cextub_avc2_c3 "cextub" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cextub"))"cextub $avc2c3CRq"(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u24 #x8) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (zext SI (and QI (srl avc2c3CRq 0) #xff))))())(dncpi cextuh_avc2_c3 "cextuh" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cextuh"))"cextuh $avc2c3CRq"(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u24 #xa) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (zext SI (and HI (srl avc2c3CRq 0) #xffff))))())(dncpi cscltz_avc2_c3 "cscltz" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cscltz"))"cscltz $avc2c3CRq"(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #xa) (f-avc2-c3sub4u24 #xa) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(if (lt (ext SI avc2c3CRq) (ext SI 0)) (set avc2copCCR1 (or (sll (srl avc2copCCR1 1) 1) (srl (sll (zext SI 1) 31) 31)))(set avc2copCCR1 (or (sll (srl avc2copCCR1 1) 1) (srl (sll (zext SI 0) 31) 31)))))())(dncpi cldz_avc2_c3 "cldz" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cldz"))"cldz $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(if (and avc2c3CRp #x80000000) (set avc2c3CRq 0)(if (and avc2c3CRp #x40000000) (set avc2c3CRq 1)(if (and avc2c3CRp #x20000000) (set avc2c3CRq 2)(if (and avc2c3CRp #x10000000) (set avc2c3CRq 3)(if (and avc2c3CRp #x8000000) (set avc2c3CRq 4)(if (and avc2c3CRp #x4000000) (set avc2c3CRq 5)(if (and avc2c3CRp #x2000000) (set avc2c3CRq 6)(if (and avc2c3CRp #x1000000) (set avc2c3CRq 7)(if (and avc2c3CRp #x800000) (set avc2c3CRq 8)(if (and avc2c3CRp #x400000) (set avc2c3CRq 9)(if (and avc2c3CRp #x200000) (set avc2c3CRq 10)(if (and avc2c3CRp #x100000) (set avc2c3CRq 11)(if (and avc2c3CRp #x80000) (set avc2c3CRq 12)(if (and avc2c3CRp #x40000) (set avc2c3CRq 13)(if (and avc2c3CRp #x20000) (set avc2c3CRq 14)(if (and avc2c3CRp #x10000) (set avc2c3CRq 15)(if (and avc2c3CRp #x8000) (set avc2c3CRq 16)(if (and avc2c3CRp #x4000) (set avc2c3CRq 17)(if (and avc2c3CRp #x2000) (set avc2c3CRq 18)(if (and avc2c3CRp #x1000) (set avc2c3CRq 19)(if (and avc2c3CRp #x800) (set avc2c3CRq 20)(if (and avc2c3CRp #x400) (set avc2c3CRq 21)(if (and avc2c3CRp #x200) (set avc2c3CRq 22)(if (and avc2c3CRp #x100) (set avc2c3CRq 23)(if (and avc2c3CRp #x80) (set avc2c3CRq 24)(if (and avc2c3CRp #x40) (set avc2c3CRq 25)(if (and avc2c3CRp #x20) (set avc2c3CRq 26)(if (and avc2c3CRp #x10) (set avc2c3CRq 27)(if (and avc2c3CRp #x8) (set avc2c3CRq 28)(if (and avc2c3CRp #x4) (set avc2c3CRq 29)(if (and avc2c3CRp #x2) (set avc2c3CRq 30)(if (and avc2c3CRp #x1) (set avc2c3CRq 31)(set avc2c3CRq 32))))))))))))))))))))))))))))))))))())(dncpi cabs_avc2_c3 "cabs" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cabs"))"cabs $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x3) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (abs (ext SI (subword SI (sub avc2c3CRq avc2c3CRp) 1)))))())(dncpi cad1s_avc2_c3 "cad1s" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cad1s"))"cad1s $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((SI tmp0)) (c-call "check_option_cp" pc)(set tmp0 (subword SI (add avc2c3CRq avc2c3CRp) 1))(set avc2c3CRq (sra tmp0 1)))())(dncpi csb1s_avc2_c3 "csb1s" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csb1s"))"csb1s $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x2) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((SI tmp0)) (c-call "check_option_cp" pc)(set tmp0 (subword SI (sub avc2c3CRq avc2c3CRp) 1))(set avc2c3CRq (sra tmp0 1)))())(dncpi cmin_avc2_c3 "cmin" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmin"))"cmin $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x8) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(if (lt (ext SI avc2c3CRq) (ext SI avc2c3CRp)) (set avc2c3CRq avc2c3CRq)(set avc2c3CRq avc2c3CRp)))())(dncpi cmax_avc2_c3 "cmax" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmax"))"cmax $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(if (gt (ext SI avc2c3CRq) (ext SI avc2c3CRp)) (set avc2c3CRq avc2c3CRq)(set avc2c3CRq avc2c3CRp)))())(dncpi cminu_avc2_c3 "cminu" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cminu"))"cminu $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xa) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(if (ltu (zext SI avc2c3CRq) (zext SI avc2c3CRp)) (set avc2c3CRq avc2c3CRq)(set avc2c3CRq avc2c3CRp)))())(dncpi cmaxu_avc2_c3 "cmaxu" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmaxu"))"cmaxu $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xb) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(if (gtu (zext SI avc2c3CRq) (zext SI avc2c3CRp)) (set avc2c3CRq avc2c3CRq)(set avc2c3CRq avc2c3CRp)))())(dncpi cclipi_avc2_c3 "cclipi" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cclipi"))"cclipi $avc2c3CRq,$avc2c3Imm5u24"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm5u24 (f-avc2-c3sub3u29 #x4) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((SI tmp1)(SI tmp0)) (c-call "check_option_cp" pc)(if (eq (zext SI avc2c3Imm5u24) (ext SI 0)) (set avc2c3CRq 0)(sequence() (set tmp0 (sll 1 (sub avc2c3Imm5u24 1)))(set tmp1 (sub tmp0 1))(if (gt (ext SI avc2c3CRq) (ext SI tmp1)) (set avc2c3CRq tmp1)(if (lt (ext SI avc2c3CRq) (ext SI (neg tmp0))) (set avc2c3CRq (neg tmp0))(set avc2c3CRq avc2c3CRq))))))())(dncpi cclipiu_avc2_c3 "cclipiu" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cclipiu"))"cclipiu $avc2c3CRq,$avc2c3Imm5u24"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm5u24 (f-avc2-c3sub3u29 #x5) (f-avc2-c3sub4u16 #x5) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((SI tmp0)(SI tmp1)) (c-call "check_option_cp" pc)(if (eq (zext SI avc2c3Imm5u24) (ext SI 0)) (set avc2c3CRq 0)(sequence() (set tmp0 (sub (sll 1 avc2c3Imm5u24) 1))(if (gtu (ext SI avc2c3CRq) (zext SI tmp0)) (set avc2c3CRq tmp0)(if (lt (ext SI avc2c3CRq) (ext SI 0)) (set avc2c3CRq 0)(set avc2c3CRq avc2c3CRq))))))())(dncpi cor_avc2_c3 "cor" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cor"))"cor $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x4) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (or avc2c3CRq avc2c3CRp)))())(dncpi cand_avc2_c3 "cand" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cand"))"cand $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x5) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (and avc2c3CRq avc2c3CRp)))())(dncpi cxor_avc2_c3 "cxor" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cxor"))"cxor $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x6) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (xor avc2c3CRq avc2c3CRp)))())(dncpi cnor_avc2_c3 "cnor" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cnor"))"cnor $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x7) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (inv (or avc2c3CRq avc2c3CRp))))())(dncpi csra_avc2_c3 "csra" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csra"))"csra $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xc) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (sra avc2c3CRq (and QI (srl avc2c3CRp 0) #x1f))))())(dncpi csrl_avc2_c3 "csrl" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrl"))"csrl $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xd) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (srl avc2c3CRq (and QI (srl avc2c3CRp 0) #x1f))))())(dncpi csll_avc2_c3 "csll" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csll"))"csll $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xe) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (sll avc2c3CRq (and QI (srl avc2c3CRp 0) #x1f))))())(dncpi csrai_avc2_c3 "csrai" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrai"))"csrai $avc2c3CRq,$avc2c3Imm5u24"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm5u24 (f-avc2-c3sub3u29 #x2) (f-avc2-c3sub4u16 #x1) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (sra avc2c3CRq avc2c3Imm5u24)))())(dncpi csrli_avc2_c3 "csrli" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrli"))"csrli $avc2c3CRq,$avc2c3Imm5u24"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm5u24 (f-avc2-c3sub3u29 #x3) (f-avc2-c3sub4u16 #x1) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (srl avc2c3CRq avc2c3Imm5u24)))())(dncpi cslli_avc2_c3 "cslli" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cslli"))"cslli $avc2c3CRq,$avc2c3Imm5u24"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm5u24 (f-avc2-c3sub3u29 #x6) (f-avc2-c3sub4u16 #x1) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (sll avc2c3CRq avc2c3Imm5u24)))())(dncpi cfsft_avc2_c3 "cfsft" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cfsft"))"cfsft $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xf) (f-avc2-c3sub4u16 #x0) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (subword SI (sll (or (sll (zext DI avc2c3CRq) 32) (zext DI avc2c3CRp)) (and QI (srl avc2copCCR0 0) #x3f)) 0)))())(dncpi cfsfta0_avc2_c3 "cfsfta0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cfsfta0"))"cfsfta0 $avc2c3CRq"(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x7) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x1) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (subword SI (sll (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)) 0)))())(dncpi cfsfta1_avc2_c3 "cfsfta1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cfsfta1"))"cfsfta1 $avc2c3CRq"(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #xf) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x1) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2c3CRq (subword SI (sll (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)) 0)))())(dncpi cmula0_avc2_c3 "cmula0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmula0"))"cmula0 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat0)) (c-call "check_option_cp" pc)(set concat0 (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp)))(set avc2copCCR2 (subword SI concat0 0))(set avc2copCCR3 (subword SI concat0 1)))())(dncpi cmulua0_avc2_c3 "cmulua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmulua0"))"cmulua0 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat1)) (c-call "check_option_cp" pc)(set concat1 (mul (zext DI avc2c3CRq) (zext DI avc2c3CRp)))(set avc2copCCR2 (subword SI concat1 0))(set avc2copCCR3 (subword SI concat1 1)))())(dncpi cnmula0_avc2_c3 "cnmula0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cnmula0"))"cnmula0 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x2) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat2)) (c-call "check_option_cp" pc)(set concat2 (neg (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp))))(set avc2copCCR2 (subword SI concat2 0))(set avc2copCCR3 (subword SI concat2 1)))())(dncpi cmada0_avc2_c3 "cmada0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmada0"))"cmada0 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x4) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat3)) (c-call "check_option_cp" pc)(set concat3 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp))))(set avc2copCCR2 (subword SI concat3 0))(set avc2copCCR3 (subword SI concat3 1)))())(dncpi cmadua0_avc2_c3 "cmadua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmadua0"))"cmadua0 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x5) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat4)) (c-call "check_option_cp" pc)(set concat4 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2c3CRq) (zext DI avc2c3CRp))))(set avc2copCCR2 (subword SI concat4 0))(set avc2copCCR3 (subword SI concat4 1)))())(dncpi cmsba0_avc2_c3 "cmsba0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmsba0"))"cmsba0 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x6) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat5)) (c-call "check_option_cp" pc)(set concat5 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp))))(set avc2copCCR2 (subword SI concat5 0))(set avc2copCCR3 (subword SI concat5 1)))())(dncpi cmsbua0_avc2_c3 "cmsbua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmsbua0"))"cmsbua0 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x7) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat6)) (c-call "check_option_cp" pc)(set concat6 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2c3CRq) (zext DI avc2c3CRp))))(set avc2copCCR2 (subword SI concat6 0))(set avc2copCCR3 (subword SI concat6 1)))())(dncpi cmula1_avc2_c3 "cmula1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmula1"))"cmula1 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x8) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat7)) (c-call "check_option_cp" pc)(set concat7 (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp)))(set avc2copCCR4 (subword SI concat7 0))(set avc2copCCR5 (subword SI concat7 1)))())(dncpi cmulua1_avc2_c3 "cmulua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmulua1"))"cmulua1 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat8)) (c-call "check_option_cp" pc)(set concat8 (mul (zext DI avc2c3CRq) (zext DI avc2c3CRp)))(set avc2copCCR4 (subword SI concat8 0))(set avc2copCCR5 (subword SI concat8 1)))())(dncpi cnmula1_avc2_c3 "cnmula1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cnmula1"))"cnmula1 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xa) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat9)) (c-call "check_option_cp" pc)(set concat9 (neg (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp))))(set avc2copCCR4 (subword SI concat9 0))(set avc2copCCR5 (subword SI concat9 1)))())(dncpi cmada1_avc2_c3 "cmada1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmada1"))"cmada1 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xc) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat10)) (c-call "check_option_cp" pc)(set concat10 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp))))(set avc2copCCR4 (subword SI concat10 0))(set avc2copCCR5 (subword SI concat10 1)))())(dncpi cmadua1_avc2_c3 "cmadua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmadua1"))"cmadua1 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xd) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat11)) (c-call "check_option_cp" pc)(set concat11 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2c3CRq) (zext DI avc2c3CRp))))(set avc2copCCR4 (subword SI concat11 0))(set avc2copCCR5 (subword SI concat11 1)))())(dncpi cmsba1_avc2_c3 "cmsba1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmsba1"))"cmsba1 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xe) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat12)) (c-call "check_option_cp" pc)(set concat12 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2c3CRq) (ext DI avc2c3CRp))))(set avc2copCCR4 (subword SI concat12 0))(set avc2copCCR5 (subword SI concat12 1)))())(dncpi cmsbua1_avc2_c3 "cmsbua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmsbua1"))"cmsbua1 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xf) (f-avc2-c3sub4u16 #x4) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat13)) (c-call "check_option_cp" pc)(set concat13 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2c3CRq) (zext DI avc2c3CRp))))(set avc2copCCR4 (subword SI concat13 0))(set avc2copCCR5 (subword SI concat13 1)))())(dncpi xmula0_avc2_c3 "xmula0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmula0"))"xmula0 $avc2c3Rn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))(sequence((DI concat14)) (c-call "check_option_cp" pc)(set concat14 (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm)))(set avc2copCCR2 (subword SI concat14 0))(set avc2copCCR3 (subword SI concat14 1)))())(dncpi xmulua0_avc2_c3 "xmulua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmulua0"))"xmulua0 $avc2c3Rn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))(sequence((DI concat15)) (c-call "check_option_cp" pc)(set concat15 (mul (zext DI avc2c3Rn) (zext DI avc2c3Rm)))(set avc2copCCR2 (subword SI concat15 0))(set avc2copCCR3 (subword SI concat15 1)))())(dncpi xnmula0_avc2_c3 "xnmula0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xnmula0"))"xnmula0 $avc2c3Rn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x2) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))(sequence((DI concat16)) (c-call "check_option_cp" pc)(set concat16 (neg (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm))))(set avc2copCCR2 (subword SI concat16 0))(set avc2copCCR3 (subword SI concat16 1)))())(dncpi xmada0_avc2_c3 "xmada0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmada0"))"xmada0 $avc2c3Rn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x4) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))(sequence((DI concat17)) (c-call "check_option_cp" pc)(set concat17 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm))))(set avc2copCCR2 (subword SI concat17 0))(set avc2copCCR3 (subword SI concat17 1)))())(dncpi xmadua0_avc2_c3 "xmadua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmadua0"))"xmadua0 $avc2c3Rn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x5) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))(sequence((DI concat18)) (c-call "check_option_cp" pc)(set concat18 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2c3Rn) (zext DI avc2c3Rm))))(set avc2copCCR2 (subword SI concat18 0))(set avc2copCCR3 (subword SI concat18 1)))())(dncpi xmsba0_avc2_c3 "xmsba0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmsba0"))"xmsba0 $avc2c3Rn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x6) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))(sequence((DI concat19)) (c-call "check_option_cp" pc)(set concat19 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm))))(set avc2copCCR2 (subword SI concat19 0))(set avc2copCCR3 (subword SI concat19 1)))())(dncpi xmsbua0_avc2_c3 "xmsbua0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmsbua0"))"xmsbua0 $avc2c3Rn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x7) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))(sequence((DI concat20)) (c-call "check_option_cp" pc)(set concat20 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2c3Rn) (zext DI avc2c3Rm))))(set avc2copCCR2 (subword SI concat20 0))(set avc2copCCR3 (subword SI concat20 1)))())(dncpi xmula1_avc2_c3 "xmula1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmula1"))"xmula1 $avc2c3Rn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x8) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))(sequence((DI concat21)) (c-call "check_option_cp" pc)(set concat21 (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm)))(set avc2copCCR4 (subword SI concat21 0))(set avc2copCCR5 (subword SI concat21 1)))())(dncpi xmulua1_avc2_c3 "xmulua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmulua1"))"xmulua1 $avc2c3Rn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))(sequence((DI concat22)) (c-call "check_option_cp" pc)(set concat22 (mul (zext DI avc2c3Rn) (zext DI avc2c3Rm)))(set avc2copCCR4 (subword SI concat22 0))(set avc2copCCR5 (subword SI concat22 1)))())(dncpi xnmula1_avc2_c3 "xnmula1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xnmula1"))"xnmula1 $avc2c3Rn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #xa) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))(sequence((DI concat23)) (c-call "check_option_cp" pc)(set concat23 (neg (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm))))(set avc2copCCR4 (subword SI concat23 0))(set avc2copCCR5 (subword SI concat23 1)))())(dncpi xmada1_avc2_c3 "xmada1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmada1"))"xmada1 $avc2c3Rn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #xc) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))(sequence((DI concat24)) (c-call "check_option_cp" pc)(set concat24 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm))))(set avc2copCCR4 (subword SI concat24 0))(set avc2copCCR5 (subword SI concat24 1)))())(dncpi xmadua1_avc2_c3 "xmadua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmadua1"))"xmadua1 $avc2c3Rn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #xd) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))(sequence((DI concat25)) (c-call "check_option_cp" pc)(set concat25 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2c3Rn) (zext DI avc2c3Rm))))(set avc2copCCR4 (subword SI concat25 0))(set avc2copCCR5 (subword SI concat25 1)))())(dncpi xmsba1_avc2_c3 "xmsba1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmsba1"))"xmsba1 $avc2c3Rn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #xe) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))(sequence((DI concat26)) (c-call "check_option_cp" pc)(set concat26 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2c3Rn) (ext DI avc2c3Rm))))(set avc2copCCR4 (subword SI concat26 0))(set avc2copCCR5 (subword SI concat26 1)))())(dncpi xmsbua1_avc2_c3 "xmsbua1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "xmsbua1"))"xmsbua1 $avc2c3Rn,$avc2c3Rm"(+ MAJ_15 (f-sub4 7) avc2c3Rn avc2c3Rm (f-avc2-c3sub4u28 #xf) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xc))(sequence((DI concat27)) (c-call "check_option_cp" pc)(set concat27 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2c3Rn) (zext DI avc2c3Rm))))(set avc2copCCR4 (subword SI concat27 0))(set avc2copCCR5 (subword SI concat27 1)))())(dncpi cclipa0_avc2_c3 "cclipa0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cclipa0"))"cclipa0 $avc2c3CRq"(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x6) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI tmp_rslt)(DI min)(DI max)) (c-call "check_option_cp" pc)(set max #x000000007FFFFFFF)(set min #xFFFFFFFF80000000)(if (gt (ext DI (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))) (ext DI max)) (set tmp_rslt max)(if (lt (ext DI (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))) (ext DI min)) (set tmp_rslt min)(set tmp_rslt (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)))))(set avc2c3CRq (subword SI tmp_rslt 1)))())(dncpi cclipa1_avc2_c3 "cclipa1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cclipa1"))"cclipa1 $avc2c3CRq"(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x6) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI tmp_rslt)(DI min)(DI max)) (c-call "check_option_cp" pc)(set max #x000000007FFFFFFF)(set min #xFFFFFFFF80000000)(if (gt (ext DI (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5))) (ext DI max)) (set tmp_rslt max)(if (lt (ext DI (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5))) (ext DI min)) (set tmp_rslt min)(set tmp_rslt (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)))))(set avc2c3CRq (subword SI tmp_rslt 1)))())(dncpi cmvsla0i_avc2_c3 "cmvsla0i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmvsla0i"))"cmvsla0i $avc2c3CRq,$avc2c3Imm6u24"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm6u24 (f-avc2-c3sub2u30 #x2) (f-avc2-c3sub4u16 #xb) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat28)) (c-call "check_option_cp" pc)(set concat28 (sll (ext DI avc2c3CRq) avc2c3Imm6u24))(set avc2copCCR2 (subword SI concat28 0))(set avc2copCCR3 (subword SI concat28 1)))())(dncpi cmvsra0i_avc2_c3 "cmvsra0i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmvsra0i"))"cmvsra0i $avc2c3CRq,$avc2c3Imm6u24"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm6u24 (f-avc2-c3sub2u30 #x0) (f-avc2-c3sub4u16 #xb) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat29)) (c-call "check_option_cp" pc)(set concat29 (sra (ext DI avc2c3CRq) avc2c3Imm6u24))(set avc2copCCR2 (subword SI concat29 0))(set avc2copCCR3 (subword SI concat29 1)))())(dncpi cmvsla1i_avc2_c3 "cmvsla1i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmvsla1i"))"cmvsla1i $avc2c3CRq,$avc2c3Imm6u24"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm6u24 (f-avc2-c3sub2u30 #x3) (f-avc2-c3sub4u16 #xb) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat30)) (c-call "check_option_cp" pc)(set concat30 (sll (ext DI avc2c3CRq) avc2c3Imm6u24))(set avc2copCCR4 (subword SI concat30 0))(set avc2copCCR5 (subword SI concat30 1)))())(dncpi cmvsra1i_avc2_c3 "cmvsra1i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cmvsra1i"))"cmvsra1i $avc2c3CRq,$avc2c3Imm6u24"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3Imm6u24 (f-avc2-c3sub2u30 #x1) (f-avc2-c3sub4u16 #xb) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat31)) (c-call "check_option_cp" pc)(set concat31 (sra (ext DI avc2c3CRq) avc2c3Imm6u24))(set avc2copCCR4 (subword SI concat31 0))(set avc2copCCR5 (subword SI concat31 1)))())(dncpi csraa0i_avc2_c3 "csraa0i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csraa0i"))"csraa0i $avc2c3Imm6u24"(+ MAJ_15 (f-sub4 7) avc2c3Imm6u24 (f-avc2-c3sub2u30 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat32)) (c-call "check_option_cp" pc)(set concat32 (sra (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) avc2c3Imm6u24))(set avc2copCCR2 (subword SI concat32 0))(set avc2copCCR3 (subword SI concat32 1)))())(dncpi csraa1i_avc2_c3 "csraa1i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csraa1i"))"csraa1i $avc2c3Imm6u24"(+ MAJ_15 (f-sub4 7) avc2c3Imm6u24 (f-avc2-c3sub2u30 #x1) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat33)) (c-call "check_option_cp" pc)(set concat33 (sra (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) avc2c3Imm6u24))(set avc2copCCR4 (subword SI concat33 0))(set avc2copCCR5 (subword SI concat33 1)))())(dncpi csrla0i_avc2_c3 "csrla0i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrla0i"))"csrla0i $avc2c3Imm6u24"(+ MAJ_15 (f-sub4 7) avc2c3Imm6u24 (f-avc2-c3sub2u30 #x0) (f-avc2-c3sub4u20 #x1) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat34)) (c-call "check_option_cp" pc)(set concat34 (srl (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) avc2c3Imm6u24))(set avc2copCCR2 (subword SI concat34 0))(set avc2copCCR3 (subword SI concat34 1)))())(dncpi csrla1i_avc2_c3 "csrla1i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrla1i"))"csrla1i $avc2c3Imm6u24"(+ MAJ_15 (f-sub4 7) avc2c3Imm6u24 (f-avc2-c3sub2u30 #x1) (f-avc2-c3sub4u20 #x1) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat35)) (c-call "check_option_cp" pc)(set concat35 (srl (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) avc2c3Imm6u24))(set avc2copCCR4 (subword SI concat35 0))(set avc2copCCR5 (subword SI concat35 1)))())(dncpi cslla0i_avc2_c3 "cslla0i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cslla0i"))"cslla0i $avc2c3Imm6u24"(+ MAJ_15 (f-sub4 7) avc2c3Imm6u24 (f-avc2-c3sub2u30 #x0) (f-avc2-c3sub4u20 #x3) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat36)) (c-call "check_option_cp" pc)(set concat36 (sll (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) avc2c3Imm6u24))(set avc2copCCR2 (subword SI concat36 0))(set avc2copCCR3 (subword SI concat36 1)))())(dncpi cslla1i_avc2_c3 "cslla1i" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cslla1i"))"cslla1i $avc2c3Imm6u24"(+ MAJ_15 (f-sub4 7) avc2c3Imm6u24 (f-avc2-c3sub2u30 #x1) (f-avc2-c3sub4u20 #x3) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat37)) (c-call "check_option_cp" pc)(set concat37 (sll (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) avc2c3Imm6u24))(set avc2copCCR4 (subword SI concat37 0))(set avc2copCCR5 (subword SI concat37 1)))())(dncpi csraa0_avc2_c3 "csraa0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csraa0"))"csraa0"(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #xc) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat38)) (c-call "check_option_cp" pc)(set concat38 (sra (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)))(set avc2copCCR2 (subword SI concat38 0))(set avc2copCCR3 (subword SI concat38 1)))())(dncpi csraa1_avc2_c3 "csraa1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csraa1"))"csraa1"(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #xc) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat39)) (c-call "check_option_cp" pc)(set concat39 (sra (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)))(set avc2copCCR4 (subword SI concat39 0))(set avc2copCCR5 (subword SI concat39 1)))())(dncpi csrla0_avc2_c3 "csrla0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrla0"))"csrla0"(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #xd) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat40)) (c-call "check_option_cp" pc)(set concat40 (srl (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)))(set avc2copCCR2 (subword SI concat40 0))(set avc2copCCR3 (subword SI concat40 1)))())(dncpi csrla1_avc2_c3 "csrla1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csrla1"))"csrla1"(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #xd) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat41)) (c-call "check_option_cp" pc)(set concat41 (srl (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)))(set avc2copCCR4 (subword SI concat41 0))(set avc2copCCR5 (subword SI concat41 1)))())(dncpi cslla0_avc2_c3 "cslla0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cslla0"))"cslla0"(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #xf) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat42)) (c-call "check_option_cp" pc)(set concat42 (sll (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)))(set avc2copCCR2 (subword SI concat42 0))(set avc2copCCR3 (subword SI concat42 1)))())(dncpi cslla1_avc2_c3 "cslla1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cslla1"))"cslla1"(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #xf) (f-avc2-c3sub4u16 #x9) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat43)) (c-call "check_option_cp" pc)(set concat43 (sll (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)))(set avc2copCCR4 (subword SI concat43 0))(set avc2copCCR5 (subword SI concat43 1)))())(dncpi cadda0_avc2_c3 "cadda0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cadda0"))"cadda0 $avc2c3CRq"(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat44)) (c-call "check_option_cp" pc)(set concat44 (add (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (ext DI avc2c3CRq)))(set avc2copCCR2 (subword SI concat44 0))(set avc2copCCR3 (subword SI concat44 1)))())(dncpi cadda1_avc2_c3 "cadda1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cadda1"))"cadda1 $avc2c3CRq"(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat45)) (c-call "check_option_cp" pc)(set concat45 (add (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (ext DI avc2c3CRq)))(set avc2copCCR4 (subword SI concat45 0))(set avc2copCCR5 (subword SI concat45 1)))())(dncpi csuba0_avc2_c3 "csuba0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csuba0"))"csuba0 $avc2c3CRq"(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x2) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat46)) (c-call "check_option_cp" pc)(set concat46 (sub (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (ext DI avc2c3CRq)))(set avc2copCCR2 (subword SI concat46 0))(set avc2copCCR3 (subword SI concat46 1)))())(dncpi csuba1_avc2_c3 "csuba1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csuba1"))"csuba1 $avc2c3CRq"(+ MAJ_15 (f-sub4 7) avc2c3CRq (f-avc2-c3sub4u28 #x3) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat47)) (c-call "check_option_cp" pc)(set concat47 (sub (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (ext DI avc2c3CRq)))(set avc2copCCR4 (subword SI concat47 0))(set avc2copCCR5 (subword SI concat47 1)))())(dncpi cadd2a0_avc2_c3 "cadd2a0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cadd2a0"))"cadd2a0 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x8) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat48)) (c-call "check_option_cp" pc)(set concat48 (add (ext DI avc2c3CRq) (ext DI avc2c3CRp)))(set avc2copCCR2 (subword SI concat48 0))(set avc2copCCR3 (subword SI concat48 1)))())(dncpi cadd2a1_avc2_c3 "cadd2a1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "cadd2a1"))"cadd2a1 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #x9) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat49)) (c-call "check_option_cp" pc)(set concat49 (add (ext DI avc2c3CRq) (ext DI avc2c3CRp)))(set avc2copCCR4 (subword SI concat49 0))(set avc2copCCR5 (subword SI concat49 1)))())(dncpi csub2a0_avc2_c3 "csub2a0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csub2a0"))"csub2a0 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xa) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat50)) (c-call "check_option_cp" pc)(set concat50 (sub (ext DI avc2c3CRq) (ext DI avc2c3CRp)))(set avc2copCCR2 (subword SI concat50 0))(set avc2copCCR3 (subword SI concat50 1)))())(dncpi csub2a1_avc2_c3 "csub2a1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csub2a1"))"csub2a1 $avc2c3CRq,$avc2c3CRp"(+ MAJ_15 (f-sub4 7) avc2c3CRq avc2c3CRp (f-avc2-c3sub4u28 #xb) (f-avc2-c3sub4u16 #x8) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat51)) (c-call "check_option_cp" pc)(set concat51 (sub (ext DI avc2c3CRq) (ext DI avc2c3CRp)))(set avc2copCCR4 (subword SI concat51 0))(set avc2copCCR5 (subword SI concat51 1)))())(dncpi caddaa0_avc2_c3 "caddaa0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "caddaa0"))"caddaa0"(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x0) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xa) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat52)) (c-call "check_option_cp" pc)(set concat52 (add (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))(set avc2copCCR2 (subword SI concat52 0))(set avc2copCCR3 (subword SI concat52 1)))())(dncpi caddaa1_avc2_c3 "caddaa1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "caddaa1"))"caddaa1"(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x1) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xa) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat53)) (c-call "check_option_cp" pc)(set concat53 (add (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))(set avc2copCCR4 (subword SI concat53 0))(set avc2copCCR5 (subword SI concat53 1)))())(dncpi csubaa0_avc2_c3 "csubaa0" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csubaa0"))"csubaa0"(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x2) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xa) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat54)) (c-call "check_option_cp" pc)(set concat54 (sub (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))(set avc2copCCR2 (subword SI concat54 0))(set avc2copCCR3 (subword SI concat54 1)))())(dncpi csubaa1_avc2_c3 "csubaa1" (OPTIONAL_CP_INSN (SLOT C3) (INTRINSIC "csubaa1"))"csubaa1"(+ MAJ_15 (f-sub4 7) (f-avc2-c3sub4u28 #x3) (f-avc2-c3sub4u24 #x0) (f-avc2-c3sub4u20 #x0) (f-avc2-c3sub4u16 #xa) (f-avc2-c3sub4u8 #x0) (f-avc2-c3sub4u4 #x0))(sequence((DI concat55)) (c-call "check_option_cp" pc)(set concat55 (sub (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))(set avc2copCCR4 (subword SI concat55 0))(set avc2copCCR5 (subword SI concat55 1)))())(dn16i cnop_avc2_v1 "cnop" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cnop"))"cnop"(+ (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #x0) (f-avc2-v1sub4u0 #x0))(c-call "check_option_cp" pc)())(dnmi cpnop16_avc2_v1 "cpnop16"(avc2-16-isa NO-DIS)"cpnop16"(emit cnop_avc2_v1))(dn16i cmov_avc2_v1 "cmov" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmov"))"cmov $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x3) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq avc2v1CRp))())(dn16i cmovi_avc2_v1 "cmovi" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmovi"))"cmovi $avc2v1CRq,$avc2v1Imm8s8"(+ avc2v1CRq avc2v1Imm8s8 (f-avc2-v1sub4u0 #x2))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (ext SI avc2v1Imm8s8)))())(dn16i cadd3_avc2_v1 "cadd3" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cadd3"))"cadd3 $avc2v1CRo,$avc2v1CRq,$avc2v1CRp"(+ avc2v1CRo avc2v1CRq avc2v1CRp (f-avc2-v1sub4u0 #x3))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRo (add avc2v1CRq avc2v1CRp)))())(dn16i caddi_avc2_v1 "caddi" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "caddi"))"caddi $avc2v1CRq,$avc2v1Imm6s8"(+ avc2v1CRq avc2v1Imm6s8 (f-avc2-v1sub2u14 #x0) (f-avc2-v1sub4u0 #x1))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (add avc2v1CRq (ext SI avc2v1Imm6s8))))())(dn16i csub_avc2_v1 "csub" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csub"))"csub $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x2) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (sub avc2v1CRq avc2v1CRp)))())(dn16i cneg_avc2_v1 "cneg" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cneg"))"cneg $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (neg avc2v1CRp)))())(dn16i cextb_avc2_v1 "cextb" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cextb"))"cextb $avc2v1CRq"(+ avc2v1CRq (f-avc2-v1sub4u12 #x9) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (ext SI (and QI (srl avc2v1CRq 0) #xff))))())(dn16i cexth_avc2_v1 "cexth" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cexth"))"cexth $avc2v1CRq"(+ avc2v1CRq (f-avc2-v1sub4u12 #x9) (f-avc2-v1sub4u8 #x2) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (ext SI (and HI (srl avc2v1CRq 0) #xffff))))())(dn16i cextub_avc2_v1 "cextub" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cextub"))"cextub $avc2v1CRq"(+ avc2v1CRq (f-avc2-v1sub4u12 #x9) (f-avc2-v1sub4u8 #x8) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (zext SI (and QI (srl avc2v1CRq 0) #xff))))())(dn16i cextuh_avc2_v1 "cextuh" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cextuh"))"cextuh $avc2v1CRq"(+ avc2v1CRq (f-avc2-v1sub4u12 #x9) (f-avc2-v1sub4u8 #xa) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (zext SI (and HI (srl avc2v1CRq 0) #xffff))))())(dn16i cscltz_avc2_v1 "cscltz" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cscltz"))"cscltz $avc2v1CRq"(+ avc2v1CRq (f-avc2-v1sub4u12 #xa) (f-avc2-v1sub4u8 #xa) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(if (lt (ext SI avc2v1CRq) (ext SI 0)) (set avc2copCCR1 (or (sll (srl avc2copCCR1 1) 1) (srl (sll (zext SI 1) 31) 31)))(set avc2copCCR1 (or (sll (srl avc2copCCR1 1) 1) (srl (sll (zext SI 0) 31) 31)))))())(dn16i cldz_avc2_v1 "cldz" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cldz"))"cldz $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u0 #x5))(sequence() (c-call "check_option_cp" pc)(if (and avc2v1CRp #x80000000) (set avc2v1CRq 0)(if (and avc2v1CRp #x40000000) (set avc2v1CRq 1)(if (and avc2v1CRp #x20000000) (set avc2v1CRq 2)(if (and avc2v1CRp #x10000000) (set avc2v1CRq 3)(if (and avc2v1CRp #x8000000) (set avc2v1CRq 4)(if (and avc2v1CRp #x4000000) (set avc2v1CRq 5)(if (and avc2v1CRp #x2000000) (set avc2v1CRq 6)(if (and avc2v1CRp #x1000000) (set avc2v1CRq 7)(if (and avc2v1CRp #x800000) (set avc2v1CRq 8)(if (and avc2v1CRp #x400000) (set avc2v1CRq 9)(if (and avc2v1CRp #x200000) (set avc2v1CRq 10)(if (and avc2v1CRp #x100000) (set avc2v1CRq 11)(if (and avc2v1CRp #x80000) (set avc2v1CRq 12)(if (and avc2v1CRp #x40000) (set avc2v1CRq 13)(if (and avc2v1CRp #x20000) (set avc2v1CRq 14)(if (and avc2v1CRp #x10000) (set avc2v1CRq 15)(if (and avc2v1CRp #x8000) (set avc2v1CRq 16)(if (and avc2v1CRp #x4000) (set avc2v1CRq 17)(if (and avc2v1CRp #x2000) (set avc2v1CRq 18)(if (and avc2v1CRp #x1000) (set avc2v1CRq 19)(if (and avc2v1CRp #x800) (set avc2v1CRq 20)(if (and avc2v1CRp #x400) (set avc2v1CRq 21)(if (and avc2v1CRp #x200) (set avc2v1CRq 22)(if (and avc2v1CRp #x100) (set avc2v1CRq 23)(if (and avc2v1CRp #x80) (set avc2v1CRq 24)(if (and avc2v1CRp #x40) (set avc2v1CRq 25)(if (and avc2v1CRp #x20) (set avc2v1CRq 26)(if (and avc2v1CRp #x10) (set avc2v1CRq 27)(if (and avc2v1CRp #x8) (set avc2v1CRq 28)(if (and avc2v1CRp #x4) (set avc2v1CRq 29)(if (and avc2v1CRp #x2) (set avc2v1CRq 30)(if (and avc2v1CRp #x1) (set avc2v1CRq 31)(set avc2v1CRq 32))))))))))))))))))))))))))))))))))())(dn16i cabs_avc2_v1 "cabs" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cabs"))"cabs $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x3) (f-avc2-v1sub4u0 #x5))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (abs (ext SI (subword SI (sub avc2v1CRq avc2v1CRp) 1)))))())(dn16i cad1s_avc2_v1 "cad1s" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cad1s"))"cad1s $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u0 #x5))(sequence((SI tmp0)) (c-call "check_option_cp" pc)(set tmp0 (subword SI (add avc2v1CRq avc2v1CRp) 1))(set avc2v1CRq (sra tmp0 1)))())(dn16i csb1s_avc2_v1 "csb1s" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csb1s"))"csb1s $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x2) (f-avc2-v1sub4u0 #x5))(sequence((SI tmp0)) (c-call "check_option_cp" pc)(set tmp0 (subword SI (sub avc2v1CRq avc2v1CRp) 1))(set avc2v1CRq (sra tmp0 1)))())(dn16i cmin_avc2_v1 "cmin" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmin"))"cmin $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x8) (f-avc2-v1sub4u0 #x5))(sequence() (c-call "check_option_cp" pc)(if (lt (ext SI avc2v1CRq) (ext SI avc2v1CRp)) (set avc2v1CRq avc2v1CRq)(set avc2v1CRq avc2v1CRp)))())(dn16i cmax_avc2_v1 "cmax" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmax"))"cmax $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x9) (f-avc2-v1sub4u0 #x5))(sequence() (c-call "check_option_cp" pc)(if (gt (ext SI avc2v1CRq) (ext SI avc2v1CRp)) (set avc2v1CRq avc2v1CRq)(set avc2v1CRq avc2v1CRp)))())(dn16i cminu_avc2_v1 "cminu" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cminu"))"cminu $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xa) (f-avc2-v1sub4u0 #x5))(sequence() (c-call "check_option_cp" pc)(if (ltu (zext SI avc2v1CRq) (zext SI avc2v1CRp)) (set avc2v1CRq avc2v1CRq)(set avc2v1CRq avc2v1CRp)))())(dn16i cmaxu_avc2_v1 "cmaxu" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmaxu"))"cmaxu $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xb) (f-avc2-v1sub4u0 #x5))(sequence() (c-call "check_option_cp" pc)(if (gtu (zext SI avc2v1CRq) (zext SI avc2v1CRp)) (set avc2v1CRq avc2v1CRq)(set avc2v1CRq avc2v1CRp)))())(dn16i cclipi_avc2_v1 "cclipi" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cclipi"))"cclipi $avc2v1CRq,$avc2v1Imm5u8"(+ avc2v1CRq avc2v1Imm5u8 (f-avc2-v1sub3u13 #x4) (f-avc2-v1sub4u0 #x5))(sequence((SI tmp1)(SI tmp0)) (c-call "check_option_cp" pc)(if (eq (zext SI avc2v1Imm5u8) (ext SI 0)) (set avc2v1CRq 0)(sequence() (set tmp0 (sll 1 (sub avc2v1Imm5u8 1)))(set tmp1 (sub tmp0 1))(if (gt (ext SI avc2v1CRq) (ext SI tmp1)) (set avc2v1CRq tmp1)(if (lt (ext SI avc2v1CRq) (ext SI (neg tmp0))) (set avc2v1CRq (neg tmp0))(set avc2v1CRq avc2v1CRq))))))())(dn16i cclipiu_avc2_v1 "cclipiu" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cclipiu"))"cclipiu $avc2v1CRq,$avc2v1Imm5u8"(+ avc2v1CRq avc2v1Imm5u8 (f-avc2-v1sub3u13 #x5) (f-avc2-v1sub4u0 #x5))(sequence((SI tmp1)(SI tmp0)) (c-call "check_option_cp" pc)(if (eq (zext SI avc2v1Imm5u8) (ext SI 0)) (set avc2v1CRq 0)(sequence() (set tmp0 (sub (sll 1 avc2v1Imm5u8) 1))(if (gtu (ext SI avc2v1CRq) (zext SI tmp0)) (set avc2v1CRq tmp0)(if (lt (ext SI avc2v1CRq) (ext SI 0)) (set avc2v1CRq 0)(set avc2v1CRq avc2v1CRq))))))())(dn16i cor_avc2_v1 "cor" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cor"))"cor $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x4) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (or avc2v1CRq avc2v1CRp)))())(dn16i cand_avc2_v1 "cand" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cand"))"cand $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x5) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (and avc2v1CRq avc2v1CRp)))())(dn16i cxor_avc2_v1 "cxor" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cxor"))"cxor $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x6) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (xor avc2v1CRq avc2v1CRp)))())(dn16i cnor_avc2_v1 "cnor" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cnor"))"cnor $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x7) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (inv (or avc2v1CRq avc2v1CRp))))())(dn16i csra_avc2_v1 "csra" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csra"))"csra $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xc) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (sra avc2v1CRq (and QI (srl avc2v1CRp 0) #x1f))))())(dn16i csrl_avc2_v1 "csrl" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrl"))"csrl $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xd) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (srl avc2v1CRq (and QI (srl avc2v1CRp 0) #x1f))))())(dn16i csll_avc2_v1 "csll" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csll"))"csll $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xe) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (sll avc2v1CRq (and QI (srl avc2v1CRp 0) #x1f))))())(dn16i csrai_avc2_v1 "csrai" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrai"))"csrai $avc2v1CRq,$avc2v1Imm5u8"(+ avc2v1CRq avc2v1Imm5u8 (f-avc2-v1sub3u13 #x2) (f-avc2-v1sub4u0 #x1))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (sra avc2v1CRq avc2v1Imm5u8)))())(dn16i csrli_avc2_v1 "csrli" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrli"))"csrli $avc2v1CRq,$avc2v1Imm5u8"(+ avc2v1CRq avc2v1Imm5u8 (f-avc2-v1sub3u13 #x3) (f-avc2-v1sub4u0 #x1))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (srl avc2v1CRq avc2v1Imm5u8)))())(dn16i cslli_avc2_v1 "cslli" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cslli"))"cslli $avc2v1CRq,$avc2v1Imm5u8"(+ avc2v1CRq avc2v1Imm5u8 (f-avc2-v1sub3u13 #x6) (f-avc2-v1sub4u0 #x1))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (sll avc2v1CRq avc2v1Imm5u8)))())(dn16i cfsft_avc2_v1 "cfsft" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cfsft"))"cfsft $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xf) (f-avc2-v1sub4u0 #x0))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (subword SI (sll (or (sll (zext DI (zext SI avc2v1CRq)) 32) (zext DI avc2v1CRp)) (and QI (srl avc2copCCR0 0) #x3f)) 0)))())(dn16i cfsfta0_avc2_v1 "cfsfta0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cfsfta0"))"cfsfta0 $avc2v1CRq"(+ avc2v1CRq (f-avc2-v1sub4u12 #x7) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x1))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (subword SI (sll (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)) 0)))())(dn16i cfsfta1_avc2_v1 "cfsfta1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cfsfta1"))"cfsfta1 $avc2v1CRq"(+ avc2v1CRq (f-avc2-v1sub4u12 #xf) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x1))(sequence() (c-call "check_option_cp" pc)(set avc2v1CRq (subword SI (sll (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)) 0)))())(dn16i cmula0_avc2_v1 "cmula0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmula0"))"cmula0 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u0 #x4))(sequence((DI concat56)) (c-call "check_option_cp" pc)(set concat56 (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp)))(set avc2copCCR2 (subword SI concat56 0))(set avc2copCCR3 (subword SI concat56 1)))())(dn16i cmulua0_avc2_v1 "cmulua0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmulua0"))"cmulua0 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u0 #x4))(sequence((DI concat57)) (c-call "check_option_cp" pc)(set concat57 (mul (zext DI avc2v1CRq) (zext DI avc2v1CRp)))(set avc2copCCR2 (subword SI concat57 0))(set avc2copCCR3 (subword SI concat57 1)))())(dn16i cnmula0_avc2_v1 "cnmula0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cnmula0"))"cnmula0 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x2) (f-avc2-v1sub4u0 #x4))(sequence((DI concat58)) (c-call "check_option_cp" pc)(set concat58 (neg (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp))))(set avc2copCCR2 (subword SI concat58 0))(set avc2copCCR3 (subword SI concat58 1)))())(dn16i cmada0_avc2_v1 "cmada0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmada0"))"cmada0 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x4) (f-avc2-v1sub4u0 #x4))(sequence((DI concat59)) (c-call "check_option_cp" pc)(set concat59 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp))))(set avc2copCCR2 (subword SI concat59 0))(set avc2copCCR3 (subword SI concat59 1)))())(dn16i cmadua0_avc2_v1 "cmadua0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmadua0"))"cmadua0 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x5) (f-avc2-v1sub4u0 #x4))(sequence((DI concat60)) (c-call "check_option_cp" pc)(set concat60 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2v1CRq) (zext DI avc2v1CRp))))(set avc2copCCR2 (subword SI concat60 0))(set avc2copCCR3 (subword SI concat60 1)))())(dn16i cmsba0_avc2_v1 "cmsba0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmsba0"))"cmsba0 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x6) (f-avc2-v1sub4u0 #x4))(sequence((DI concat61)) (c-call "check_option_cp" pc)(set concat61 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp))))(set avc2copCCR2 (subword SI concat61 0))(set avc2copCCR3 (subword SI concat61 1)))())(dn16i cmsbua0_avc2_v1 "cmsbua0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmsbua0"))"cmsbua0 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x7) (f-avc2-v1sub4u0 #x4))(sequence((DI concat62)) (c-call "check_option_cp" pc)(set concat62 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2v1CRq) (zext DI avc2v1CRp))))(set avc2copCCR2 (subword SI concat62 0))(set avc2copCCR3 (subword SI concat62 1)))())(dn16i cmula1_avc2_v1 "cmula1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmula1"))"cmula1 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x8) (f-avc2-v1sub4u0 #x4))(sequence((DI concat63)) (c-call "check_option_cp" pc)(set concat63 (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp)))(set avc2copCCR4 (subword SI concat63 0))(set avc2copCCR5 (subword SI concat63 1)))())(dn16i cmulua1_avc2_v1 "cmulua1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmulua1"))"cmulua1 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x9) (f-avc2-v1sub4u0 #x4))(sequence((DI concat64)) (c-call "check_option_cp" pc)(set concat64 (mul (zext DI avc2v1CRq) (zext DI avc2v1CRp)))(set avc2copCCR4 (subword SI concat64 0))(set avc2copCCR5 (subword SI concat64 1)))())(dn16i cnmula1_avc2_v1 "cnmula1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cnmula1"))"cnmula1 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xa) (f-avc2-v1sub4u0 #x4))(sequence((DI concat65)) (c-call "check_option_cp" pc)(set concat65 (neg (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp))))(set avc2copCCR4 (subword SI concat65 0))(set avc2copCCR5 (subword SI concat65 1)))())(dn16i cmada1_avc2_v1 "cmada1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmada1"))"cmada1 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xc) (f-avc2-v1sub4u0 #x4))(sequence((DI concat66)) (c-call "check_option_cp" pc)(set concat66 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp))))(set avc2copCCR4 (subword SI concat66 0))(set avc2copCCR5 (subword SI concat66 1)))())(dn16i cmadua1_avc2_v1 "cmadua1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmadua1"))"cmadua1 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xd) (f-avc2-v1sub4u0 #x4))(sequence((DI concat67)) (c-call "check_option_cp" pc)(set concat67 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2v1CRq) (zext DI avc2v1CRp))))(set avc2copCCR4 (subword SI concat67 0))(set avc2copCCR5 (subword SI concat67 1)))())(dn16i cmsba1_avc2_v1 "cmsba1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmsba1"))"cmsba1 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xe) (f-avc2-v1sub4u0 #x4))(sequence((DI concat68)) (c-call "check_option_cp" pc)(set concat68 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2v1CRq) (ext DI avc2v1CRp))))(set avc2copCCR4 (subword SI concat68 0))(set avc2copCCR5 (subword SI concat68 1)))())(dn16i cmsbua1_avc2_v1 "cmsbua1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmsbua1"))"cmsbua1 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xf) (f-avc2-v1sub4u0 #x4))(sequence((DI concat69)) (c-call "check_option_cp" pc)(set concat69 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2v1CRq) (zext DI avc2v1CRp))))(set avc2copCCR4 (subword SI concat69 0))(set avc2copCCR5 (subword SI concat69 1)))())(dn16i cclipa0_avc2_v1 "cclipa0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cclipa0"))"cclipa0 $avc2v1CRq"(+ avc2v1CRq (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x6))(sequence((DI tmp_rslt)(DI min)(DI max)) (c-call "check_option_cp" pc)(set max #x000000007FFFFFFF)(set min #xFFFFFFFF80000000)(if (gt (ext DI (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))) (ext DI max)) (set tmp_rslt max)(if (lt (ext DI (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))) (ext DI min)) (set tmp_rslt min)(set tmp_rslt (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)))))(set avc2v1CRq (subword SI tmp_rslt 1)))())(dn16i cclipa1_avc2_v1 "cclipa1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cclipa1"))"cclipa1 $avc2v1CRq"(+ avc2v1CRq (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x6))(sequence((DI tmp_rslt)(DI min)(DI max)) (c-call "check_option_cp" pc)(set max #x000000007FFFFFFF)(set min #xFFFFFFFF80000000)(if (gt (ext DI (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5))) (ext DI max)) (set tmp_rslt max)(if (lt (ext DI (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5))) (ext DI min)) (set tmp_rslt min)(set tmp_rslt (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)))))(set avc2v1CRq (subword SI tmp_rslt 1)))())(dn16i cmvsla0i_avc2_v1 "cmvsla0i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmvsla0i"))"cmvsla0i $avc2v1CRq,$avc2v1Imm6u8"(+ avc2v1CRq avc2v1Imm6u8 (f-avc2-v1sub2u14 #x2) (f-avc2-v1sub4u0 #xb))(sequence((DI concat70)) (c-call "check_option_cp" pc)(set concat70 (sll (ext DI avc2v1CRq) avc2v1Imm6u8))(set avc2copCCR2 (subword SI concat70 0))(set avc2copCCR3 (subword SI concat70 1)))())(dn16i cmvsra0i_avc2_v1 "cmvsra0i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmvsra0i"))"cmvsra0i $avc2v1CRq,$avc2v1Imm6u8"(+ avc2v1CRq avc2v1Imm6u8 (f-avc2-v1sub2u14 #x0) (f-avc2-v1sub4u0 #xb))(sequence((DI concat71)) (c-call "check_option_cp" pc)(set concat71 (sra (ext DI avc2v1CRq) avc2v1Imm6u8))(set avc2copCCR2 (subword SI concat71 0))(set avc2copCCR3 (subword SI concat71 1)))())(dn16i cmvsla1i_avc2_v1 "cmvsla1i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmvsla1i"))"cmvsla1i $avc2v1CRq,$avc2v1Imm6u8"(+ avc2v1CRq avc2v1Imm6u8 (f-avc2-v1sub2u14 #x3) (f-avc2-v1sub4u0 #xb))(sequence((DI concat72)) (c-call "check_option_cp" pc)(set concat72 (sll (ext DI avc2v1CRq) avc2v1Imm6u8))(set avc2copCCR4 (subword SI concat72 0))(set avc2copCCR5 (subword SI concat72 1)))())(dn16i cmvsra1i_avc2_v1 "cmvsra1i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cmvsra1i"))"cmvsra1i $avc2v1CRq,$avc2v1Imm6u8"(+ avc2v1CRq avc2v1Imm6u8 (f-avc2-v1sub2u14 #x1) (f-avc2-v1sub4u0 #xb))(sequence((DI concat73)) (c-call "check_option_cp" pc)(set concat73 (sra (ext DI avc2v1CRq) avc2v1Imm6u8))(set avc2copCCR4 (subword SI concat73 0))(set avc2copCCR5 (subword SI concat73 1)))())(dn16i csraa0i_avc2_v1 "csraa0i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csraa0i"))"csraa0i $avc2v1Imm6u8"(+ avc2v1Imm6u8 (f-avc2-v1sub2u14 #x0) (f-avc2-v1sub4u4 #x0) (f-avc2-v1sub4u0 #x9))(sequence((DI concat74)) (c-call "check_option_cp" pc)(set concat74 (sra (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) avc2v1Imm6u8))(set avc2copCCR2 (subword SI concat74 0))(set avc2copCCR3 (subword SI concat74 1)))())(dn16i csraa1i_avc2_v1 "csraa1i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csraa1i"))"csraa1i $avc2v1Imm6u8"(+ avc2v1Imm6u8 (f-avc2-v1sub2u14 #x1) (f-avc2-v1sub4u4 #x0) (f-avc2-v1sub4u0 #x9))(sequence((DI concat75)) (c-call "check_option_cp" pc)(set concat75 (sra (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) avc2v1Imm6u8))(set avc2copCCR4 (subword SI concat75 0))(set avc2copCCR5 (subword SI concat75 1)))())(dn16i csrla0i_avc2_v1 "csrla0i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrla0i"))"csrla0i $avc2v1Imm6u8"(+ avc2v1Imm6u8 (f-avc2-v1sub2u14 #x0) (f-avc2-v1sub4u4 #x1) (f-avc2-v1sub4u0 #x9))(sequence((DI concat76)) (c-call "check_option_cp" pc)(set concat76 (srl (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) avc2v1Imm6u8))(set avc2copCCR2 (subword SI concat76 0))(set avc2copCCR3 (subword SI concat76 1)))())(dn16i csrla1i_avc2_v1 "csrla1i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrla1i"))"csrla1i $avc2v1Imm6u8"(+ avc2v1Imm6u8 (f-avc2-v1sub2u14 #x1) (f-avc2-v1sub4u4 #x1) (f-avc2-v1sub4u0 #x9))(sequence((DI concat77)) (c-call "check_option_cp" pc)(set concat77 (srl (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) avc2v1Imm6u8))(set avc2copCCR4 (subword SI concat77 0))(set avc2copCCR5 (subword SI concat77 1)))())(dn16i cslla0i_avc2_v1 "cslla0i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cslla0i"))"cslla0i $avc2v1Imm6u8"(+ avc2v1Imm6u8 (f-avc2-v1sub2u14 #x0) (f-avc2-v1sub4u4 #x3) (f-avc2-v1sub4u0 #x9))(sequence((DI concat78)) (c-call "check_option_cp" pc)(set concat78 (sll (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) avc2v1Imm6u8))(set avc2copCCR2 (subword SI concat78 0))(set avc2copCCR3 (subword SI concat78 1)))())(dn16i cslla1i_avc2_v1 "cslla1i" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cslla1i"))"cslla1i $avc2v1Imm6u8"(+ avc2v1Imm6u8 (f-avc2-v1sub2u14 #x1) (f-avc2-v1sub4u4 #x3) (f-avc2-v1sub4u0 #x9))(sequence((DI concat79)) (c-call "check_option_cp" pc)(set concat79 (sll (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) avc2v1Imm6u8))(set avc2copCCR4 (subword SI concat79 0))(set avc2copCCR5 (subword SI concat79 1)))())(dn16i csraa0_avc2_v1 "csraa0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csraa0"))"csraa0"(+ (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #xc) (f-avc2-v1sub4u0 #x9))(sequence((DI concat80)) (c-call "check_option_cp" pc)(set concat80 (sra (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)))(set avc2copCCR2 (subword SI concat80 0))(set avc2copCCR3 (subword SI concat80 1)))())(dn16i csraa1_avc2_v1 "csraa1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csraa1"))"csraa1"(+ (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #xc) (f-avc2-v1sub4u0 #x9))(sequence((DI concat81)) (c-call "check_option_cp" pc)(set concat81 (sra (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)))(set avc2copCCR4 (subword SI concat81 0))(set avc2copCCR5 (subword SI concat81 1)))())(dn16i csrla0_avc2_v1 "csrla0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrla0"))"csrla0"(+ (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #xd) (f-avc2-v1sub4u0 #x9))(sequence((DI concat82)) (c-call "check_option_cp" pc)(set concat82 (srl (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)))(set avc2copCCR2 (subword SI concat82 0))(set avc2copCCR3 (subword SI concat82 1)))())(dn16i csrla1_avc2_v1 "csrla1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csrla1"))"csrla1"(+ (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #xd) (f-avc2-v1sub4u0 #x9))(sequence((DI concat83)) (c-call "check_option_cp" pc)(set concat83 (srl (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)))(set avc2copCCR4 (subword SI concat83 0))(set avc2copCCR5 (subword SI concat83 1)))())(dn16i cslla0_avc2_v1 "cslla0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cslla0"))"cslla0"(+ (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #xf) (f-avc2-v1sub4u0 #x9))(sequence((DI concat84)) (c-call "check_option_cp" pc)(set concat84 (sll (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (and QI (srl avc2copCCR0 0) #x3f)))(set avc2copCCR2 (subword SI concat84 0))(set avc2copCCR3 (subword SI concat84 1)))())(dn16i cslla1_avc2_v1 "cslla1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cslla1"))"cslla1"(+ (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #xf) (f-avc2-v1sub4u0 #x9))(sequence((DI concat85)) (c-call "check_option_cp" pc)(set concat85 (sll (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (and QI (srl avc2copCCR0 0) #x3f)))(set avc2copCCR4 (subword SI concat85 0))(set avc2copCCR5 (subword SI concat85 1)))())(dn16i cadda0_avc2_v1 "cadda0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cadda0"))"cadda0 $avc2v1CRq"(+ avc2v1CRq (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x8))(sequence((DI concat86)) (c-call "check_option_cp" pc)(set concat86 (add (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (ext DI avc2v1CRq)))(set avc2copCCR2 (subword SI concat86 0))(set avc2copCCR3 (subword SI concat86 1)))())(dn16i cadda1_avc2_v1 "cadda1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cadda1"))"cadda1 $avc2v1CRq"(+ avc2v1CRq (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x8))(sequence((DI concat87)) (c-call "check_option_cp" pc)(set concat87 (add (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (ext DI avc2v1CRq)))(set avc2copCCR4 (subword SI concat87 0))(set avc2copCCR5 (subword SI concat87 1)))())(dn16i csuba0_avc2_v1 "csuba0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csuba0"))"csuba0 $avc2v1CRq"(+ avc2v1CRq (f-avc2-v1sub4u12 #x2) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x8))(sequence((DI concat88)) (c-call "check_option_cp" pc)(set concat88 (sub (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3)) (ext DI avc2v1CRq)))(set avc2copCCR2 (subword SI concat88 0))(set avc2copCCR3 (subword SI concat88 1)))())(dn16i csuba1_avc2_v1 "csuba1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csuba1"))"csuba1 $avc2v1CRq"(+ avc2v1CRq (f-avc2-v1sub4u12 #x3) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u0 #x8))(sequence((DI concat89)) (c-call "check_option_cp" pc)(set concat89 (sub (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (ext DI avc2v1CRq)))(set avc2copCCR4 (subword SI concat89 0))(set avc2copCCR5 (subword SI concat89 1)))())(dn16i cadd2a0_avc2_v1 "cadd2a0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cadd2a0"))"cadd2a0 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x8) (f-avc2-v1sub4u0 #x8))(sequence((DI concat90)) (c-call "check_option_cp" pc)(set concat90 (add (ext DI avc2v1CRq) (ext DI avc2v1CRp)))(set avc2copCCR2 (subword SI concat90 0))(set avc2copCCR3 (subword SI concat90 1)))())(dn16i cadd2a1_avc2_v1 "cadd2a1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "cadd2a1"))"cadd2a1 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #x9) (f-avc2-v1sub4u0 #x8))(sequence((DI concat91)) (c-call "check_option_cp" pc)(set concat91 (add (ext DI avc2v1CRq) (ext DI avc2v1CRp)))(set avc2copCCR4 (subword SI concat91 0))(set avc2copCCR5 (subword SI concat91 1)))())(dn16i csub2a0_avc2_v1 "csub2a0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csub2a0"))"csub2a0 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xa) (f-avc2-v1sub4u0 #x8))(sequence((DI concat92)) (c-call "check_option_cp" pc)(set concat92 (sub (ext DI avc2v1CRq) (ext DI avc2v1CRp)))(set avc2copCCR2 (subword SI concat92 0))(set avc2copCCR3 (subword SI concat92 1)))())(dn16i csub2a1_avc2_v1 "csub2a1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csub2a1"))"csub2a1 $avc2v1CRq,$avc2v1CRp"(+ avc2v1CRq avc2v1CRp (f-avc2-v1sub4u12 #xb) (f-avc2-v1sub4u0 #x8))(sequence((DI concat93)) (c-call "check_option_cp" pc)(set concat93 (sub (ext DI avc2v1CRq) (ext DI avc2v1CRp)))(set avc2copCCR4 (subword SI concat93 0))(set avc2copCCR5 (subword SI concat93 1)))())(dn16i caddaa0_avc2_v1 "caddaa0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "caddaa0"))"caddaa0"(+ (f-avc2-v1sub4u12 #x0) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #x0) (f-avc2-v1sub4u0 #xa))(sequence((DI concat94)) (c-call "check_option_cp" pc)(set concat94 (add (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))(set avc2copCCR2 (subword SI concat94 0))(set avc2copCCR3 (subword SI concat94 1)))())(dn16i caddaa1_avc2_v1 "caddaa1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "caddaa1"))"caddaa1"(+ (f-avc2-v1sub4u12 #x1) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #x0) (f-avc2-v1sub4u0 #xa))(sequence((DI concat95)) (c-call "check_option_cp" pc)(set concat95 (add (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))(set avc2copCCR4 (subword SI concat95 0))(set avc2copCCR5 (subword SI concat95 1)))())(dn16i csubaa0_avc2_v1 "csubaa0" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csubaa0"))"csubaa0"(+ (f-avc2-v1sub4u12 #x2) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #x0) (f-avc2-v1sub4u0 #xa))(sequence((DI concat96)) (c-call "check_option_cp" pc)(set concat96 (sub (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))(set avc2copCCR2 (subword SI concat96 0))(set avc2copCCR3 (subword SI concat96 1)))())(dn16i csubaa1_avc2_v1 "csubaa1" (VLIW64_NO_MATCHING_NOP (SLOT V1) (INTRINSIC "csubaa1"))"csubaa1"(+ (f-avc2-v1sub4u12 #x3) (f-avc2-v1sub4u8 #x0) (f-avc2-v1sub4u4 #x0) (f-avc2-v1sub4u0 #xa))(sequence((DI concat97)) (c-call "check_option_cp" pc)(set concat97 (sub (or (sll (zext DI avc2copCCR4) 32) (zext DI avc2copCCR5)) (or (sll (zext DI avc2copCCR2) 32) (zext DI avc2copCCR3))))(set avc2copCCR4 (subword SI concat97 0))(set avc2copCCR5 (subword SI concat97 1)))())(dn32i cmov1_avc2_v3 "cmov1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmov1"))"cmov $avc2v3CRn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3CRn avc2v3Rm (f-avc2-v3sub4u28 #x0) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xf))(sequence() (c-call "check_option_cp" pc)(set avc2v3CRn avc2v3Rm))())(dn32i cmov2_avc2_v3 "cmov2" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmov2"))"cmov $avc2v3Rm,$avc2v3CRn"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rm avc2v3CRn (f-avc2-v3sub4u28 #x1) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xf))(sequence() (c-call "check_option_cp" pc)(set avc2v3Rm avc2v3CRn))())(dn32i cmovi_avc2_v3 "cmovi" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmovi"))"cmovi $avc2v3CRq,$avc2v3Imm16s4x24e32"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3CRq avc2v3Imm16s4x24e32 (f-avc2-v3sub4u16 #xe))(sequence() (c-call "check_option_cp" pc)(set avc2v3CRq (ext SI avc2v3Imm16s4x24e32)))())(dn32i cmovc1_avc2_v3 "cmovc1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmovc1"))"cmovc $avc2v3CCRn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3CCRn avc2v3Rm (f-avc2-v3sub4u28 #x2) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xf))(sequence() (c-call "check_option_cp" pc)(set avc2v3CCRn avc2v3Rm))())(dn32i cmovc2_avc2_v3 "cmovc2" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "cmovc2"))"cmovc $avc2v3Rm,$avc2v3CCRn"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rm avc2v3CCRn (f-avc2-v3sub4u28 #x3) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xf))(sequence() (c-call "check_option_cp" pc)(set avc2v3Rm avc2v3CCRn))())(dn32i xmula0_avc2_v3 "xmula0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmula0"))"xmula0 $avc2v3Rn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x0) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))(sequence((DI concat98)) (c-call "check_option_cp" pc)(set concat98 (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm)))(set avc2copCCR2 (subword SI concat98 0))(set avc2copCCR3 (subword SI concat98 1)))())(dn32i xmulua0_avc2_v3 "xmulua0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmulua0"))"xmulua0 $avc2v3Rn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x1) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))(sequence((DI concat99)) (c-call "check_option_cp" pc)(set concat99 (mul (zext DI avc2v3Rn) (zext DI avc2v3Rm)))(set avc2copCCR2 (subword SI concat99 0))(set avc2copCCR3 (subword SI concat99 1)))())(dn32i xnmula0_avc2_v3 "xnmula0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xnmula0"))"xnmula0 $avc2v3Rn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x2) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))(sequence((DI concat100)) (c-call "check_option_cp" pc)(set concat100 (neg (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm))))(set avc2copCCR2 (subword SI concat100 0))(set avc2copCCR3 (subword SI concat100 1)))())(dn32i xmada0_avc2_v3 "xmada0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmada0"))"xmada0 $avc2v3Rn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x4) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))(sequence((DI concat101)) (c-call "check_option_cp" pc)(set concat101 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm))))(set avc2copCCR2 (subword SI concat101 0))(set avc2copCCR3 (subword SI concat101 1)))())(dn32i xmadua0_avc2_v3 "xmadua0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmadua0"))"xmadua0 $avc2v3Rn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x5) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))(sequence((DI concat102)) (c-call "check_option_cp" pc)(set concat102 (add (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2v3Rn) (zext DI avc2v3Rm))))(set avc2copCCR2 (subword SI concat102 0))(set avc2copCCR3 (subword SI concat102 1)))())(dn32i xmsba0_avc2_v3 "xmsba0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmsba0"))"xmsba0 $avc2v3Rn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x6) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))(sequence((DI concat103)) (c-call "check_option_cp" pc)(set concat103 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm))))(set avc2copCCR2 (subword SI concat103 0))(set avc2copCCR3 (subword SI concat103 1)))())(dn32i xmsbua0_avc2_v3 "xmsbua0" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmsbua0"))"xmsbua0 $avc2v3Rn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x7) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))(sequence((DI concat104)) (c-call "check_option_cp" pc)(set concat104 (sub (or (sll (zext DI (zext SI avc2copCCR2)) 32) (zext DI avc2copCCR3)) (mul (zext DI avc2v3Rn) (zext DI avc2v3Rm))))(set avc2copCCR2 (subword SI concat104 0))(set avc2copCCR3 (subword SI concat104 1)))())(dn32i xmula1_avc2_v3 "xmula1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmula1"))"xmula1 $avc2v3Rn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x8) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))(sequence((DI concat105)) (c-call "check_option_cp" pc)(set concat105 (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm)))(set avc2copCCR4 (subword SI concat105 0))(set avc2copCCR5 (subword SI concat105 1)))())(dn32i xmulua1_avc2_v3 "xmulua1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmulua1"))"xmulua1 $avc2v3Rn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #x9) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))(sequence((DI concat106)) (c-call "check_option_cp" pc)(set concat106 (mul (zext DI avc2v3Rn) (zext DI avc2v3Rm)))(set avc2copCCR4 (subword SI concat106 0))(set avc2copCCR5 (subword SI concat106 1)))())(dn32i xnmula1_avc2_v3 "xnmula1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xnmula1"))"xnmula1 $avc2v3Rn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #xa) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))(sequence((DI concat107)) (c-call "check_option_cp" pc)(set concat107 (neg (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm))))(set avc2copCCR4 (subword SI concat107 0))(set avc2copCCR5 (subword SI concat107 1)))())(dn32i xmada1_avc2_v3 "xmada1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmada1"))"xmada1 $avc2v3Rn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #xc) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))(sequence((DI concat108)) (c-call "check_option_cp" pc)(set concat108 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm))))(set avc2copCCR4 (subword SI concat108 0))(set avc2copCCR5 (subword SI concat108 1)))())(dn32i xmadua1_avc2_v3 "xmadua1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmadua1"))"xmadua1 $avc2v3Rn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #xd) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))(sequence((DI concat109)) (c-call "check_option_cp" pc)(set concat109 (add (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2v3Rn) (zext DI avc2v3Rm))))(set avc2copCCR4 (subword SI concat109 0))(set avc2copCCR5 (subword SI concat109 1)))())(dn32i xmsba1_avc2_v3 "xmsba1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmsba1"))"xmsba1 $avc2v3Rn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #xe) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))(sequence((DI concat110)) (c-call "check_option_cp" pc)(set concat110 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (ext DI avc2v3Rn) (ext DI avc2v3Rm))))(set avc2copCCR4 (subword SI concat110 0))(set avc2copCCR5 (subword SI concat110 1)))())(dn32i xmsbua1_avc2_v3 "xmsbua1" (VLIW64_NO_MATCHING_NOP (SLOT V3) (INTRINSIC "xmsbua1"))"xmsbua1 $avc2v3Rn,$avc2v3Rm"(+ (f-avc2-v3sub4u0 #xf) (f-avc2-v3sub4u12 #x7) avc2v3Rn avc2v3Rm (f-avc2-v3sub4u28 #xf) (f-avc2-v3sub4u24 #x0) (f-avc2-v3sub4u20 #x0) (f-avc2-v3sub4u16 #xc))(sequence((DI concat111)) (c-call "check_option_cp" pc)(set concat111 (sub (or (sll (zext DI (zext SI avc2copCCR4)) 32) (zext DI avc2copCCR5)) (mul (zext DI avc2v3Rn) (zext DI avc2v3Rm))))(set avc2copCCR4 (subword SI concat111 0))(set avc2copCCR5 (subword SI concat111 1)))())
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