OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [ld/] [testsuite/] [ld-arm/] [vxworks1.dd] - Rev 287

Go to most recent revision | Compare with Previous | Blame | View Log


.*:     file format .*

Disassembly of section \.plt:

00080800 <_PROCEDURE_LINKAGE_TABLE_>:
   80800:       e52dc008        str     ip, \[sp, #-8\]!
   80804:       e59fc000        ldr     ip, \[pc, #0\]  ; 8080c <.*>
   80808:       e59cf008        ldr     pc, \[ip, #8\]
   8080c:       00081400        .word   0x00081400
                        8080c: R_ARM_ABS32      _GLOBAL_OFFSET_TABLE_
   80810:       e59fc000        ldr     ip, \[pc, #0\]  ; 80818 <.*>
   80814:       e59cf000        ldr     pc, \[ip\]
   80818:       0008140c        .word   0x0008140c
                        80818: R_ARM_ABS32      _GLOBAL_OFFSET_TABLE_\+0xc
   8081c:       e59fc000        ldr     ip, \[pc, #0\]  ; 80824 <.*>
   80820:       eafffff6        b       80800 <.*>
   80824:       00000000        .word   0x00000000
   80828:       e59fc000        ldr     ip, \[pc, #0\]  ; 80830 <.*>
   8082c:       e59cf000        ldr     pc, \[ip\]
   80830:       00081410        .word   0x00081410
                        80830: R_ARM_ABS32      _GLOBAL_OFFSET_TABLE_\+0x10
   80834:       e59fc000        ldr     ip, \[pc, #0\]  ; 8083c <.*>
   80838:       eafffff0        b       80800 <.*>
   8083c:       0000000c        .word   0x0000000c
Disassembly of section \.text:

00080c00 <_start>:
   80c00:       ebffff08        bl      80828 <.*>
                        80c00: R_ARM_PC24       \.plt\+0x20
   80c04:       eb000000        bl      80c0c <sexternal>
                        80c04: R_ARM_PC24       sexternal\+0xfffffff8
   80c08:       eaffff00        b       80810 <.*>
                        80c08: R_ARM_PC24       \.plt\+0x8

00080c0c <sexternal>:
   80c0c:       e1a0f00e        mov     pc, lr

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.