OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [gnu/] [binutils/] [ld/] [testsuite/] [ld-powerpc/] [aix-gc-1-32.dd] - Rev 95

Compare with Previous | Blame | View Log


.*


Disassembly of section \.text:

10000000 <\.init_function>:
10000000:       80 22 00 00     l       r1,0\(r2\)

10000004 <\.fini_function>:
10000004:       80 22 00 04     l       r1,4\(r2\)

10000008 <\.exported_global>:
10000008:       48 00 00 09     bl      10000010 <\.indirect2>

1000000c <\.indirect1>:
1000000c:       81 08 00 04     l       r8,4\(r8\)

10000010 <\.indirect2>:
10000010:       81 08 00 08     l       r8,8\(r8\)

10000014 <\.indirect3>:
10000014:       81 08 00 0c     l       r8,12\(r8\)

Disassembly of section \.data:

20000000 <block>:
# Pointer to indirect3.
20000000:       20 00 00 98     .*
20000004:       11 22 33 44     .*

20000008 <__rtinit>:
#...

20000068 <exported_global>:
20000068:       10 00 00 08     .*
2000006c:       20 00 00 a4     .*
20000070:       00 00 00 00     .*

20000074 <init_function>:
20000074:       10 00 00 00     .*
20000078:       20 00 00 a4     .*
2000007c:       00 00 00 00     .*

20000080 <indirect1>:
20000080:       10 00 00 0c     .*
20000084:       20 00 00 a4     .*
20000088:       00 00 00 00     .*

2000008c <fini_function>:
2000008c:       10 00 00 04     .*
20000090:       20 00 00 a4     .*
20000094:       00 00 00 00     .*

20000098 <indirect3>:
20000098:       10 00 00 14     .*
2000009c:       20 00 00 a4     .*
200000a0:       00 00 00 00     .*

200000a4 <TOC>:
# TOC entry for indirect1.
200000a4:       20 00 00 80     .*

200000a8 <block>:
# TOC entry for block.
200000a8:       20 00 00 00     .*
200000ac:       00 00 00 00     .*

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.