OpenCores
URL https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk

Subversion Repositories open8_urisc

[/] [open8_urisc/] [trunk/] [taskmgr/] [taskmgr_config.s] - Rev 332

Go to most recent revision | Compare with Previous | Blame | View Log

; Copyright (c)2022 Jeremy Seth Henry
; All rights reserved.
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;     * Redistributions of source code must retain the above copyright
;       notice, this list of conditions and the following disclaimer.
;     * Redistributions in binary form must reproduce the above copyright
;       notice, this list of conditions and the following disclaimer in the
;       documentation and/or other materials provided with the distribution,
;       where applicable (as part of a user interface, debugging port, etc.)
;
; THIS SOFTWARE IS PROVIDED BY JEREMY SETH HENRY ``AS IS'' AND ANY
; EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL JEREMY SETH HENRY BE LIABLE FOR ANY
; DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
; THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
;------------------------------------------------------------------------------
; taskmgr_config.s
;
;  Main Manager task specific constants (this must precede taskmgr_const.s)
;
; Revision History
; Author          Date     Change
;---------------- -------- ----------------------------------------------------
; Seth Henry      7/15/22  Initial Release
;------------------------------------------------------------------------------
 
;------------------------------------------------------------------------------
; Task Management Constants
;------------------------------------------------------------------------------
.DEFINE MAX_TASK_TIMESLICE   $FA       ; Preemption Time slice is 250uS
.DEFINE TASK_COUNT           2         ; Number of defined tasks
;------------------------------------------------------------------------------
 
;------------------------------------------------------------------------------
; Task RAM Placement Constants
;------------------------------------------------------------------------------
; Low memory regions (15:0)
; 0     - System Memory
; 1     - Task  0 Private Memory
; 2     - Task  1 Private Memory
; 3-15 - (Unused)
 
; High memory regions (31:16)
; 16-20 - (Unused)
; 30    - Task  0 Stack Memory
; 31    - Task  1 Stack Memory
 
; Assign each memory region within the 32 write protect blocks using 31 to 0
;  Note that regions from 15 to 0 are "low" memory (don't need to be adjusted
;  for the mask calculation) while regions from 31 to 16 are "high" memory, and
;  should have 16 subtracted to avoid overflowing a 16-bit value.
;
; Note that this implies a maximum task count of 15, as at least one region is
;  required for the task manager itself, unless an additional BRAM is allocated
;  for the task manager.
 
; Variable Memory regions (15:0)
.DEFINE SYSTEM_VAR_RGN    0
.DEFINE TASK0_VAR_RGN     1
.DEFINE TASK1_VAR_RGN     2
 
; Stack Memory regions (31:16)
.DEFINE TASK0_STACK_RGN   30
.DEFINE TASK1_STACK_RGN   31
 
; Note that the WPR masks are handled here in order to add flexibility, such as
;  adding a data buffer region in "high" memory or otherwise configuring a
;  task's WPR for its memory needs
;
; Note that, because of the nature of the WPR, additional memory regions, such
;  as a while region to handle block transfers, can be added by by logically
;  OR'ing the region masks together. Note that the resultant line does need to
;  be on one line or the assembler won't process it correctly.
; ie .DEFINE TASK_VAR_MASK  (2^TASK2_VAR_RGN) | (2^BUF_RGN0) | (2^BUF_RGN1)
 
; Note that the assembler can't generate a 32-bit value for the mask, so for values
;  greater than 15, an offset of 16 is subtracted and the mask value. Thus, there
;  is a "low mask" for regions 0-15 and a "high mask" for regions 16-31. 
.DEFINE HIGH_MEM_OFFSET      16
 
.DEFINE TASK0_WPR_LOW        2^TASK0_VAR_RGN
.DEFINE TASK1_WPR_LOW        2^TASK1_VAR_RGN
 
.DEFINE TASK0_WPR_HIGH       2^( TASK0_STACK_RGN - HIGH_MEM_OFFSET )
.DEFINE TASK1_WPR_HIGH       2^( TASK1_STACK_RGN - HIGH_MEM_OFFSET )
 
; Allocate the variable structures in memory. Note that WP_Rgn_Size is also
;  used in taskmgr_const.s to compute the address of each task's stack start
;  and end
.DEFINE WP_Rgn_Size          RAM_Size / RAM_Partitions ; From sys_hw_map.s
 
.DEFINE SYSTEM_VARMEM        RAM_Address + ( SYSTEM_VAR_RGN * WP_Rgn_Size )
.DEFINE TASK0_VARMEM         RAM_Address + ( TASK0_VAR_RGN  * WP_Rgn_Size )
.DEFINE TASK1_VARMEM         RAM_Address + ( TASK1_VAR_RGN  * WP_Rgn_Size )
 
;------------------------------------------------------------------------------
 
;------------------------------------------------------------------------------
; Task ROM Placement Constants
; Note that the task blocks define the initial location for each task's code
;  and data. If a region overflows, these constants will need to be adjusted.
;------------------------------------------------------------------------------
.DEFINE BOOT_BLOCK           $8000 ; Start of ROM
.DEFINE DATA_BLOCK           $8800 ; ROM Data
.DEFINE TASK0_BLOCK          $9000 ; Task 0
.DEFINE TASK1_BLOCK          $A000 ; Task 1
;------------------------------------------------------------------------------
 
;------------------------------------------------------------------------------
; Task I/O Write Qualification Constants
;------------------------------------------------------------------------------
.DEFINE TASK0_WQL            $00
.DEFINE TASK1_WQL            $00
;------------------------------------------------------------------------------
 
;------------------------------------------------------------------------------
; External I/O Interrupt Flag Macros - processed from within
;  CHECK_EXTERNAL_IO_INTS
;
; Note that the relevant tasks should define macros allowing access to their
;  ISR flag variables and/or other code that should run in supervisor context
;  when the relevant interrupt is triggered.
;
; Note also that only R1 and R0 are safe to use when setting flags. Avoid R7-R2
;  as R3 and R2 are keeping track of flags and R4 through R7 aren't backed up
;------------------------------------------------------------------------------
 
;  0 = (unused)
;  1 = (unused)
;  2 = (unused)
;  3 = (unused)
;  4 = (unused)
;  5 = (unused)
;  6 = (unused)
;  7 = (unused)
;  8 = (unused)
;  9 = (unused)
; 10 = (unused)
; 11 = (unused)
; 12 = (unused)
; 13 = (unused)
; 14 = (unused)
; 15 = (unused)
 
; For 8-bit external interrupt manager, only use the _L constant
.DEFINE EXT_INTERRUPT_EN_L   $00
.DEFINE EXT_INTERRUPT_EN_H   $00
 
; These macros are valid for both the 8 and 16-bit interrupt managers
.MACRO  SET_INT0_FLAGS
.ENDM
 
.MACRO  SET_INT1_FLAGS
.ENDM
 
.MACRO  SET_INT2_FLAGS
.ENDM
 
.MACRO  SET_INT3_FLAGS
.ENDM
 
.MACRO  SET_INT4_FLAGS
.ENDM
 
.MACRO  SET_INT5_FLAGS
.ENDM
 
.MACRO  SET_INT6_FLAGS
.ENDM
 
.MACRO  SET_INT7_FLAGS
.ENDM
 
; These macros are only valid for the 16-bit interrupt manager
.MACRO  SET_INT8_FLAGS
.ENDM
 
.MACRO  SET_INT9_FLAGS
.ENDM
 
.MACRO  SET_INT10_FLAGS
.ENDM
 
.MACRO  SET_INT11_FLAGS
.ENDM
 
.MACRO  SET_INT12_FLAGS
.ENDM
 
.MACRO  SET_INT13_FLAGS
.ENDM
 
.MACRO  SET_INT14_FLAGS
.ENDM
 
.MACRO  SET_INT15_FLAGS
.ENDM
 
;------------------------------------------------------------------------------

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.