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[/] [open_hitter/] [trunk/] [bench/] [vhdl/] [hitter_wrapper.vhd] - Rev 2
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-- hitter_wrapper.vhd -- Synthesizable wrapper, exercise wrapper with NSEW buttons and LEDs to report on fpga dev board -- target env: Xilinx Virtex 6 / ML605 -- -- <LGPL Required> -- <History from svn, link required> library ieee; use ieee.std_logic_1164.all; --use ieee.std_logic_arith.all; --library unisim; --use unisim.vcomponents.all; entity hitter_wrapper is port ( PUSH_BUTTONS_5BITS_TRI_I: in std_logic_vector(4 downto 0); LEDS_POSITIONS_TRI_O: out std_logic_vector(4 downto 0) ); end hitter_wrapper; architecture implementation of hitter_wrapper is begin LEDS_POSITIONS_TRI_O(0) <= PUSH_BUTTONS_5BITS_TRI_I(1); LEDS_POSITIONS_TRI_O(1) <= PUSH_BUTTONS_5BITS_TRI_I(2); LEDS_POSITIONS_TRI_O(2) <= PUSH_BUTTONS_5BITS_TRI_I(3); LEDS_POSITIONS_TRI_O(3) <= PUSH_BUTTONS_5BITS_TRI_I(4); LEDS_POSITIONS_TRI_O(4) <= PUSH_BUTTONS_5BITS_TRI_I(0); end implementation;
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