Subversion Repositories openfire2

Hint:

Address from the code side (if you want to know physical address >> 2)
Bit ordering:  0=MSB --> 31=LSB

I/O PORTS 
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ADDRESS                 READ                            WRITE
-------------------------------------------------------------------------------------
SP3SK GPIO: **ATTENTION** USE ALWAYS WORD (32BIT) WRITE DUE TO NOT BYTE SELECT LOGIC
0x0800_0000             31..24=segments_n               31..24=segments_n
0x0800_0001(r)          23..20=drivers_n                23..20=drivers_n
0x0800_0002(r)          19..16=pushbuttons
0x0800_0003(r)          15.. 8=leds                     15..8 =leds
                         7.. 0=switches

UARTS STATUS REGISTER:
0x0800_0004             24=rx1_data_present
                        25=rx1_half_full
                        26=rx1_full
                        27=tx1_half_full
                        28=tx1_full

0x0800_0006              8=rx2_data_present
                         9=rx2_half_full
                        10=rx2_full
                        11=tx2_half_full
                        12=tx2_full

UART1_TXRX_DATA:
0x0800_0008             31..24=read byte                31..24=send byte

UART2_TXRX_DATA:
0x0800_000C             31..24=read byte                31..24=send byte

PROM_READER:
0x0800_0010             31..24=read current byte
0x0800_0011             23=requested sync               23=request next sync
                        22=requested data               22=request next byte
                        21=prom synced
                        20=data ready

TIMER1:
0x0800_0014             31=running/stopped              31=start/stop
                        30..0=current value             30..0=max. timer value

INTERRUPT_ENABLE:
0x0800_0018                                             31=enable timer1 interrupt
                                                        30=enable uart1 receive byte interrupt
                                                        29=enable uart2 receive byte interrupt

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MEMORY MAP
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0x0000_0000     block ram start (inside fpga)
0x0000_1fff     block ram end

0x0000_0000     reset vector
0x0000_0008     software exception vector (break)
0x0000_0010     interrupt vector
0x0000_0018     reserved (breakpoint vector)
0x0000_0020     hardware exception vector

0x0400_0000     external sram start
0x040f_ffff     external sram end

0x040e_2000     video ram start (inside external sram)
0x040f_ffff     video ram end (size = 0x1_e000)

0x0800_0000     i/o space
0x0800_xxxx