Subversion Repositories openfire2

#PACE: Start of Constraints generated by PACE

#PACE: Start of PACE I/O Pin Assignments
NET "b"  LOC = "R11"  ; 
NET "clk_50mhz"  LOC = "T9"  ; 
NET "drivers_n<0>"  LOC = "D14"  ; 
NET "drivers_n<1>"  LOC = "G14"  ; 
NET "drivers_n<2>"  LOC = "F14"  ; 
NET "drivers_n<3>"  LOC = "E13"  ; 
NET "g"  LOC = "T12"  ; 
NET "hsync_n"  LOC = "R9"  ; 
#NET "i2c_clk"  LOC = "D6"  ;
#NET "i2c_data"  LOC = "C6"  ;
NET "leds<0>"  LOC = "K12"  ; 
NET "leds<1>"  LOC = "P14"  ; 
NET "leds<2>"  LOC = "L12"  ; 
NET "leds<3>"  LOC = "N14"  ; 
NET "leds<4>"  LOC = "P13"  ; 
NET "leds<5>"  LOC = "N12"  ; 
NET "leds<6>"  LOC = "P12"  ; 
NET "leds<7>"  LOC = "P11"  ; 
NET "prom_cclk"  LOC = "A14"  ; 
NET "prom_din"  LOC = "M11"  ; 
NET "prom_reset_n"  LOC = "N9"  ; 
NET "pushbuttons<0>"  LOC = "M13"  ; 
NET "pushbuttons<1>"  LOC = "M14"  ; 
NET "pushbuttons<2>"  LOC = "L13"  ; 
NET "pushbuttons<3>"  LOC = "L14"  ; 
NET "r"  LOC = "R12"  ; 
NET "ram1_ce_n"  LOC = "P7"  ; 
NET "ram1_io<0>"  LOC = "N7"  ; 
NET "ram1_io<10>"  LOC = "F2"  ; 
NET "ram1_io<11>"  LOC = "H1"  ; 
NET "ram1_io<12>"  LOC = "J2"  ; 
NET "ram1_io<13>"  LOC = "L2"  ; 
NET "ram1_io<14>"  LOC = "P1"  ; 
NET "ram1_io<15>"  LOC = "R1"  ; 
NET "ram1_io<1>"  LOC = "T8"  ; 
NET "ram1_io<2>"  LOC = "R6"  ; 
NET "ram1_io<3>"  LOC = "T5"  ; 
NET "ram1_io<4>"  LOC = "R5"  ; 
NET "ram1_io<5>"  LOC = "C2"  ; 
NET "ram1_io<6>"  LOC = "C1"  ; 
NET "ram1_io<7>"  LOC = "B1"  ; 
NET "ram1_io<8>"  LOC = "D3"  ; 
NET "ram1_io<9>"  LOC = "P8"  ; 
NET "ram1_lb_n"  LOC = "P6"  ; 
NET "ram1_ub_n"  LOC = "T4"  ; 
NET "ram2_ce_n"  LOC = "N5"  ; 
NET "ram2_io<0>"  LOC = "P2"  ; 
NET "ram2_io<10>"  LOC = "G1"  ; 
NET "ram2_io<11>"  LOC = "F5"  ; 
NET "ram2_io<12>"  LOC = "C3"  ; 
NET "ram2_io<13>"  LOC = "K2"  ; 
NET "ram2_io<14>"  LOC = "M1"  ; 
NET "ram2_io<15>"  LOC = "N1"  ; 
NET "ram2_io<1>"  LOC = "N2"  ; 
NET "ram2_io<2>"  LOC = "M2"  ; 
NET "ram2_io<3>"  LOC = "K1"  ; 
NET "ram2_io<4>"  LOC = "J1"  ; 
NET "ram2_io<5>"  LOC = "G2"  ; 
NET "ram2_io<6>"  LOC = "E1"  ; 
NET "ram2_io<7>"  LOC = "D1"  ; 
NET "ram2_io<8>"  LOC = "D2"  ; 
NET "ram2_io<9>"  LOC = "E2"  ; 
NET "ram2_lb_n"  LOC = "P5"  ; 
NET "ram2_ub_n"  LOC = "R4"  ; 
NET "ram_addr<0>"  LOC = "L5"  ; 
NET "ram_addr<10>"  LOC = "G5"  ; 
NET "ram_addr<11>"  LOC = "H3"  ; 
NET "ram_addr<12>"  LOC = "H4"  ; 
NET "ram_addr<13>"  LOC = "J4"  ; 
NET "ram_addr<14>"  LOC = "J3"  ; 
NET "ram_addr<15>"  LOC = "K3"  ; 
NET "ram_addr<16>"  LOC = "K5"  ; 
NET "ram_addr<17>"  LOC = "L3"  ; 
NET "ram_addr<1>"  LOC = "N3"  ; 
NET "ram_addr<2>"  LOC = "M4"  ; 
NET "ram_addr<3>"  LOC = "M3"  ; 
NET "ram_addr<4>"  LOC = "L4"  ; 
NET "ram_addr<5>"  LOC = "G4"  ; 
NET "ram_addr<6>"  LOC = "F3"  ; 
NET "ram_addr<7>"  LOC = "F4"  ; 
NET "ram_addr<8>"  LOC = "E3"  ; 
NET "ram_addr<9>"  LOC = "E4"  ; 
NET "ram_oe_n"  LOC = "K4"  ; 
NET "ram_we_n"  LOC = "G3"  ; 
NET "rx1"  LOC = "T13"  ; 
#NET "rx2"  LOC = "N10"  ; 
#NET "rx_ultrasonidos"  LOC = "C5"  ; 
NET "segments_n<0>"  LOC = "P16"  ; 
NET "segments_n<1>"  LOC = "N16"  ; 
NET "segments_n<2>"  LOC = "F13"  ; 
NET "segments_n<3>"  LOC = "R16"  ; 
NET "segments_n<4>"  LOC = "P15"  ; 
NET "segments_n<5>"  LOC = "N15"  ; 
NET "segments_n<6>"  LOC = "G13"  ; 
NET "segments_n<7>"  LOC = "E14"  ; 
#NET "spi_clk"  LOC = "E7"  ;
#NET "spi_cs_1"  LOC = "C8"  ;
#NET "spi_cs_2"  LOC = "D8"  ;
#NET "spi_cs_3"  LOC = "C9"  ;
#NET "spi_cs_4"  LOC = "D10"  ;
#NET "spi_datain"  LOC = "C7"  ;
#NET "spi_dataout"  LOC = "D7"  ;
NET "switches<0>"  LOC = "F12"  ; 
NET "switches<1>"  LOC = "G12"  ; 
NET "switches<2>"  LOC = "H14"  ; 
NET "switches<3>"  LOC = "H13"  ; 
NET "switches<4>"  LOC = "J14"  ; 
NET "switches<5>"  LOC = "J13"  ; 
NET "switches<6>"  LOC = "K14"  ; 
NET "switches<7>"  LOC = "K13"  ; 
NET "tx1"  LOC = "R13"  ; 
#NET "tx2"  LOC = "T14"  ;
#NET "tx_ultrasonidos_n"  LOC = "D5"  ; 
#NET "tx_ultrasonidos_p"  LOC = "E6"  ; 
NET "vsync_n"  LOC = "T10"  ; 

#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE