Subversion Repositories openjtag-project

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition " "Info: Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Wed Jun 02 16:01:08 2010 " "Info: Processing started: Wed Jun 02 16:01:08 2010" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off Open_JTAG -c Open_JTAG " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off Open_JTAG -c Open_JTAG" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
{ "Info" "IMPP_MPP_USER_DEVICE" "Open_JTAG EPM570T100C5 " "Info: Selected device EPM570T100C5 for design \"Open_JTAG\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Info: Low junction temperature is 0 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "Info: High junction temperature is 85 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0 -1}
{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Warning: Feature LogicLock is only available with a valid subscription license. Please purchase a software subscription to gain full access to this feature." {  } {  } 0 0 "Feature %1!s! is only available with a valid subscription license. Please purchase a software subscription to gain full access to this feature." 0 0 "" 0 -1}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM240T100C5 " "Info: Device EPM240T100C5 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM240T100I5 " "Info: Device EPM240T100I5 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM240T100A5 " "Info: Device EPM240T100A5 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM570T100I5 " "Info: Device EPM570T100I5 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EPM570T100A5 " "Info: Device EPM570T100A5 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0 -1}
{ "Critical Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "29 29 " "Critical Warning: No exact pin location assignment(s) for 29 pins of 29 total pins" { { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "tms " "Info: Pin tms not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { tms } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 216 680 856 232 "tms" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { tms } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 299 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "rst " "Info: Pin rst not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { rst } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 16 48 216 32 "rst" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { rst } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 304 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "tck " "Info: Pin tck not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { tck } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 168 680 856 184 "tck" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { tck } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 306 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wrk " "Info: Pin wrk not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { wrk } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 32 680 856 48 "wrk" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { wrk } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 308 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wr " "Info: Pin wr not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { wr } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 288 680 856 304 "wr" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { wr } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 309 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "rd " "Info: Pin rd not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { rd } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 304 680 856 320 "rd" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { rd } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 310 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "tdi " "Info: Pin tdi not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { tdi } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 384 680 856 400 "tdi" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { tdi } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 311 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "trst " "Info: Pin trst not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { trst } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 400 680 856 416 "trst" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { trst } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 312 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "wcks " "Info: Pin wcks not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { wcks } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 560 712 888 576 "wcks" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { wcks } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 313 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "new_state\[3\] " "Info: Pin new_state\[3\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { new_state[3] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 416 680 856 432 "new_state\[3..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { new_state[3] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 291 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "new_state\[2\] " "Info: Pin new_state\[2\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { new_state[2] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 416 680 856 432 "new_state\[3..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { new_state[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 292 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "new_state\[1\] " "Info: Pin new_state\[1\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { new_state[1] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 416 680 856 432 "new_state\[3..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { new_state[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 293 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "new_state\[0\] " "Info: Pin new_state\[0\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { new_state[0] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 416 680 856 432 "new_state\[3..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { new_state[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 294 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sm\[3\] " "Info: Pin sm\[3\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { sm[3] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 48 680 856 64 "sm\[3..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { sm[3] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 295 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sm\[2\] " "Info: Pin sm\[2\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { sm[2] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 48 680 856 64 "sm\[3..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { sm[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 296 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sm\[1\] " "Info: Pin sm\[1\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { sm[1] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 48 680 856 64 "sm\[3..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { sm[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 297 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "sm\[0\] " "Info: Pin sm\[0\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { sm[0] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 48 680 856 64 "sm\[3..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { sm[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 298 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "db\[7\] " "Info: Pin db\[7\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { db[7] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 336 680 856 352 "db\[7..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { db[7] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 283 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "db\[6\] " "Info: Pin db\[6\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { db[6] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 336 680 856 352 "db\[7..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { db[6] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 284 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "db\[5\] " "Info: Pin db\[5\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { db[5] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 336 680 856 352 "db\[7..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { db[5] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 285 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "db\[4\] " "Info: Pin db\[4\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { db[4] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 336 680 856 352 "db\[7..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { db[4] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 286 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "db\[3\] " "Info: Pin db\[3\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { db[3] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 336 680 856 352 "db\[7..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { db[3] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 287 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "db\[2\] " "Info: Pin db\[2\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { db[2] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 336 680 856 352 "db\[7..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { db[2] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 288 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "db\[1\] " "Info: Pin db\[1\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { db[1] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 336 680 856 352 "db\[7..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { db[1] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 289 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "db\[0\] " "Info: Pin db\[0\] not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { db[0] } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 336 680 856 352 "db\[7..0\]" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { db[0] } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 290 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "rxf " "Info: Pin rxf not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { rxf } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 320 48 216 336 "rxf" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { rxf } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 303 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "clk " "Info: Pin clk not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { clk } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 560 288 456 576 "clk" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 301 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "txe " "Info: Pin txe not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { txe } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 304 48 216 320 "txe" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { txe } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 302 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1} { "Info" "IFIOMGR_PIN_MISSING_LOCATION_INFO" "tdo " "Info: Pin tdo not assigned to an exact location on the device" {  } { { "c:/altera/91sp2/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/91sp2/quartus/bin/pin_planner.ppl" { tdo } } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 384 48 216 400 "tdo" "" } } } } { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { tdo } "NODE_NAME" } } { "temporary_test_loc" "" { Generic "C:/AlteraWorks/91/Open JTAG/" 0 { } { { 0 { 0 ""} 0 305 3016 4149 0}  }  } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0 "" 0 -1}  } {  } 1 0 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins" 0 0 "" 0 -1}
{ "Info" "ITDC_FITTER_TIMING_ENGINE" "Classic " "Info: Timing-driven compilation is using the Classic Timing Analyzer" {  } {  } 0 0 "Timing-driven compilation is using the %1!s! Timing Analyzer" 0 0 "" 0 -1}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1000 MHz " "Info: Assuming a global fmax requirement of 1000 MHz" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0 "" 0 -1} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tsu 2.0 ns " "Info: Assuming a global tsu requirement of 2.0 ns" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0 "" 0 -1} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tco 1.0 ns " "Info: Assuming a global tco requirement of 1.0 ns" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0 "" 0 -1} { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "tpd 1.0 ns " "Info: Assuming a global tpd requirement of 1.0 ns" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0 "" 0 -1}  } {  } 0 0 "Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" 0 0 "" 0 -1}
{ "Extra Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Extra Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Performing register packing on registers with non-logic cell location assignments" 0 0 "" 0 -1}
{ "Extra Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Extra Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 1 0 "Completed register packing on registers with non-logic cell location assignments" 0 0 "" 0 -1}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0 0 "Completed %1!s!" 0 0 "" 0 -1}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "clk Global clock in PIN 12 " "Info: Automatically promoted some destinations of signal \"clk\" to use Global clock in PIN 12" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "clock_mux:inst1\|wcks " "Info: Destination \"clock_mux:inst1\|wcks\" may be non-global or may not use global clock" {  } { { "clock_mux.vhd" "" { Text "C:/AlteraWorks/91/Open JTAG/clock_mux.vhd" 16 -1 0 } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0 "" 0 -1}  } { { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 560 288 456 576 "clk" "" } } } }  } 0 0 "Automatically promoted some destinations of signal \"%1!s!\" to use %2!s!" 0 0 "" 0 -1}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "clock_mux:inst1\|wcks Global clock " "Info: Automatically promoted some destinations of signal \"clock_mux:inst1\|wcks\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "wcks " "Info: Destination \"wcks\" may be non-global or may not use global clock" {  } { { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 560 712 888 576 "wcks" "" } } } }  } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0 "" 0 -1}  } { { "clock_mux.vhd" "" { Text "C:/AlteraWorks/91/Open JTAG/clock_mux.vhd" 16 -1 0 } }  } 0 0 "Automatically promoted some destinations of signal \"%1!s!\" to use %2!s!" 0 0 "" 0 -1}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" {  } {  } 0 0 "Completed %1!s!" 0 0 "" 0 -1}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0 0 "Starting register packing" 0 0 "" 0 -1}
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0 0 "Fitter is using %2!s! packing mode for logic elements with %1!s! setting for Auto Packed Registers logic option" 0 0 "" 0 -1}
{ "Extra Info" "IFSAC_FSAC_START_LUT_PACKING" "" "Extra Info: Moving registers into LUTs to improve timing and density" {  } {  } 1 0 "Moving registers into LUTs to improve timing and density" 0 0 "" 0 -1}
{ "Info" "IFYGR_FYGR_NO_REGS_IN_IOS_HEADER" "" "Info: Started processing fast register assignments" {  } {  } 0 0 "Started processing fast register assignments" 0 0 "" 0 -1}
{ "Info" "IFYGR_FYGR_NO_REGS_IN_IOS_FOOTER" "" "Info: Finished processing fast register assignments" {  } {  } 0 0 "Finished processing fast register assignments" 0 0 "" 0 -1}
{ "Extra Info" "IFSAC_FSAC_FINISH_LUT_PACKING" "00:00:00 " "Extra Info: Finished moving registers into LUTs: elapsed time is 00:00:00" {  } {  } 1 0 "Finished moving registers into LUTs: elapsed time is %1!s!" 0 0 "" 0 -1}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" {  } {  } 0 0 "Finished register packing" 0 0 "" 0 -1}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement " "Info: Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "28 unused 3.3V 4 16 8 " "Info: Number of I/O pins in group: 28 (unused VREF, 3.3V VCCIO, 4 input, 16 output, 8 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "3.3-V LVTTL. " "Info: I/O standards used: 3.3-V LVTTL." {  } {  } 0 0 "I/O standards used: %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Number of I/O pins in group: %1!d! (%2!s! VREF, %3!s! VCCIO, %4!d! input, %5!d! output, %6!d! bidirectional)" 0 0 "" 0 -1}  } {  } 0 0 "Statistics of %1!s!" 0 0 "" 0 -1}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "Info: I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Info: Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use undetermined 1 35 " "Info: I/O bank number 1 does not use VREF pins and has undetermined VCCIO pins. 1 total pin(s) used --  35 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use undetermined 0 40 " "Info: I/O bank number 2 does not use VREF pins and has undetermined VCCIO pins. 0 total pin(s) used --  40 pins available" {  } {  } 0 0 "I/O bank number %1!s! %2!s! VREF pins and has %3!s! VCCIO pins. %4!d! total pin(s) used --  %5!d! pins available" 0 0 "" 0 -1}  } {  } 0 0 "Statistics of %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "I/O bank details %1!s! I/O pin placement" 0 0 "" 0 -1}
{ "Info" "IFITCC_FITTER_PREPARATION_END" "00:00:01 " "Info: Fitter preparation operations ending: elapsed time is 00:00:01" {  } {  } 0 0 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "" 0 -1}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0 "" 0 -1}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "" 0 -1}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0 "" 0 -1}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0 "" 0 -1}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "" 0 -1}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "6.057 ns register pin " "Info: Estimated most critical path is register to pin delay of 6.057 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns serializer:inst2\|tms 1 REG LAB_X9_Y7 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X9_Y7; Fanout = 3; REG Node = 'serializer:inst2\|tms'" {  } { { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "" { serializer:inst2|tms } "NODE_NAME" } } { "serializer.vhd" "" { Text "C:/AlteraWorks/91/Open JTAG/serializer.vhd" 32 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.620 ns) + CELL(0.740 ns) 1.360 ns inst4 2 COMB LAB_X9_Y7 1 " "Info: 2: + IC(0.620 ns) + CELL(0.740 ns) = 1.360 ns; Loc. = LAB_X9_Y7; Fanout = 1; COMB Node = 'inst4'" {  } { { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "1.360 ns" { serializer:inst2|tms inst4 } "NODE_NAME" } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 200 592 656 248 "inst4" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(2.375 ns) + CELL(2.322 ns) 6.057 ns tms 3 PIN PIN_87 0 " "Info: 3: + IC(2.375 ns) + CELL(2.322 ns) = 6.057 ns; Loc. = PIN_87; Fanout = 0; PIN Node = 'tms'" {  } { { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "4.697 ns" { inst4 tms } "NODE_NAME" } } { "Open_JTAG.bdf" "" { Schematic "C:/AlteraWorks/91/Open JTAG/Open_JTAG.bdf" { { 216 680 856 232 "tms" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.062 ns ( 50.55 % ) " "Info: Total cell delay = 3.062 ns ( 50.55 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "2.995 ns ( 49.45 % ) " "Info: Total interconnect delay = 2.995 ns ( 49.45 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/91sp2/quartus/bin/TimingClosureFloorplan.fld" "" "6.057 ns" { serializer:inst2|tms inst4 tms } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0 "" 0 -1}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0 "" 0 -1}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "15 " "Info: Average interconnect usage is 15% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "15 X0_Y0 X13_Y8 " "Info: Peak interconnect usage is 15% of the available device resources in the region that extends from location X0_Y0 to location X13_Y8" {  } {  } 0 0 "Peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "" 0 -1}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources" 0 0 "" 0 -1}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "" 0 -1}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0 "" 0 -1} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0 "" 0 -1}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0 "" 0 -1}
{ "Warning" "WFIOMGR_RESERVE_ASSIGNMENT_FOR_UNUSED_PINS_IS_DEFAULT" "As output driving ground " "Warning: The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'." {  } {  } 0 0 "The Reserve All Unused Pins setting has not been specified, and will default to '%1!s!'." 0 0 "" 0 -1}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 3 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "175 " "Info: Peak virtual memory: 175 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Wed Jun 02 16:01:11 2010 " "Info: Processing ended: Wed Jun 02 16:01:11 2010" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}