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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [bin/] [rtlsim.sh] - Rev 23
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#!/bin/sh #------------------------------------------------------------------------------ # Copyright (C) 2001 Authors # # This source file may be used and distributed without restriction provided # that this copyright statement is not removed from the file and that any # derivative work contains the original copyright notice and the associated # disclaimer. # # This source file is free software; you can redistribute it and/or modify # it under the terms of the GNU Lesser General Public License as published # by the Free Software Foundation; either version 2.1 of the License, or # (at your option) any later version. # # This source is distributed in the hope that it will be useful, but WITHOUT # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or # FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public # License for more details. # # You should have received a copy of the GNU Lesser General Public License # along with this source; if not, write to the Free Software Foundation, # Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA # #------------------------------------------------------------------------------ # # File Name: rtlsim.sh # # Author(s): # - Olivier Girard, olgirard@gmail.com # #------------------------------------------------------------------------------ # $Rev: 17 $ # $LastChangedBy: olivier.girard $ # $LastChangedDate: 2009-08-04 23:15:39 +0200 (Tue, 04 Aug 2009) $ #------------------------------------------------------------------------------ ############################################################################### # Parameter Check # ############################################################################### EXPECTED_ARGS=3 if [ $# -ne $EXPECTED_ARGS ]; then echo "ERROR : wrong number of arguments" echo "USAGE : rtlsim.sh <verilog stimulus file> <rom file> <submit file>" echo "Example : rtlsim.sh ./stimulus.v rom.mem ../src/submit.f" exit 1 fi ############################################################################### # Check if the required files exist # ############################################################################### if [ ! -e $1 ]; then echo "Verilog stimulus file $1 doesn't exist" exit 1 fi if [ ! -e $2 ]; then echo "ROM memory file $2 doesn't exist" exit 1 fi if [ ! -e $3 ]; then echo "Verilog submit file $3 doesn't exist" exit 1 fi ############################################################################### # Start verilog simulation # ############################################################################### rm -rf simv iverilog -o simv -c $3 ./simv
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