Subversion Repositories openmsp430

#!/bin/bash

# Disable waveform dumping
OMSP_NODUMP=1
export OMSP_NODUMP

# Choose GCC toolchain prefix ('msp430' for MSPGCC / 'msp430-elf' for GCC RedHat/TI)
# Note: default to MSPGCC until GCC RedHat/TI is mature enough
if command -v msp430-gcc >/dev/null; then
    MSPGCC_PFX=msp430
else
    MSPGCC_PFX=msp430-elf
fi
#MSPGCC_PFX=msp430
export MSPGCC_PFX

# Choose simulator:
#                   - iverilog  : Icarus Verilog  (default)
#                   - cver      : CVer
#                   - verilog   : Verilog-XL
#                   - ncverilog : NC-Verilog
#                   - vcs       : VCS
#                   - vsim      : Modelsim
#                   - isim      : Xilinx simulator
OMSP_SIMULATOR=iverilog
export OMSP_SIMULATOR


# Argument specifies number of regression loops
if [ $# -ne 1 ]; then
    LAST_REGRESSION=0
else
    LAST_REGRESSION=$(($1-1))
fi

# Cleanup from previous regression
LOG_DIR=./log
rm -rf $LOG_DIR/*

# Perform the regression runs
for (( ii=0; ii<=$LAST_REGRESSION; ii++ ))
  do

    # Cleanup & log directory setup
    rm -rf ./cov_work
    LOG_DIR=./log/$ii
    mkdir -p $LOG_DIR

    # Two-Operand Arithmetic test patterns
    ../bin/msp430sim two-op_mov               | tee $LOG_DIR/two-op_mov.log
    ../bin/msp430sim two-op_mov-b             | tee $LOG_DIR/two-op_mov-b.log
    ../bin/msp430sim two-op_add               | tee $LOG_DIR/two-op_add.log

    ../bin/msp430sim two-op_add-b             | tee $LOG_DIR/two-op_add-b.log
    ../bin/msp430sim two-op_addc              | tee $LOG_DIR/two-op_addc.log
    ../bin/msp430sim two-op_sub               | tee $LOG_DIR/two-op_sub.log
    ../bin/msp430sim two-op_subc              | tee $LOG_DIR/two-op_subc.log
    ../bin/msp430sim two-op_cmp               | tee $LOG_DIR/two-op_cmp.log
    ../bin/msp430sim two-op_bit               | tee $LOG_DIR/two-op_bit.log
    ../bin/msp430sim two-op_bic               | tee $LOG_DIR/two-op_bic.log
    ../bin/msp430sim two-op_bis               | tee $LOG_DIR/two-op_bis.log
    ../bin/msp430sim two-op_xor               | tee $LOG_DIR/two-op_xor.log
    ../bin/msp430sim two-op_and               | tee $LOG_DIR/two-op_and.log
    ../bin/msp430sim two-op_dadd              | tee $LOG_DIR/two-op_dadd.log
    ../bin/msp430sim two-op_autoincr          | tee $LOG_DIR/two-op_autoincr.log
    ../bin/msp430sim two-op_autoincr-b        | tee $LOG_DIR/two-op_autoincr-b.log

    # Conditional Jump test patterns
    ../bin/msp430sim c-jump_jeq               | tee $LOG_DIR/c-jump_jeq.log
    ../bin/msp430sim c-jump_jne               | tee $LOG_DIR/c-jump_jne.log
    ../bin/msp430sim c-jump_jc                | tee $LOG_DIR/c-jump_jc.log
    ../bin/msp430sim c-jump_jnc               | tee $LOG_DIR/c-jump_jnc.log
    ../bin/msp430sim c-jump_jn                | tee $LOG_DIR/c-jump_jn.log
    ../bin/msp430sim c-jump_jge               | tee $LOG_DIR/c-jump_jge.log
    ../bin/msp430sim c-jump_jl                | tee $LOG_DIR/c-jump_jl.log
    ../bin/msp430sim c-jump_jmp               | tee $LOG_DIR/c-jump_jmp.log

    # Single-Operand Arithmetic test patterns
    ../bin/msp430sim sing-op_rrc              | tee $LOG_DIR/sing-op_rrc.log
    ../bin/msp430sim sing-op_rra              | tee $LOG_DIR/sing-op_rra.log
    ../bin/msp430sim sing-op_swpb             | tee $LOG_DIR/sing-op_swpb.log
    ../bin/msp430sim sing-op_sxt              | tee $LOG_DIR/sing-op_sxt.log
    ../bin/msp430sim sing-op_push             | tee $LOG_DIR/sing-op_push.log
    ../bin/msp430sim sing-op_call             | tee $LOG_DIR/sing-op_call.log

    # Interrupts & NMI
    ../bin/msp430sim sing-op_reti             | tee $LOG_DIR/sing-op_reti.log
    ../bin/msp430sim nmi                      | tee $LOG_DIR/nmi.log
    ../bin/msp430sim irq32                    | tee $LOG_DIR/irq32.log
    ../bin/msp430sim irq64                    | tee $LOG_DIR/irq64.log

    # ROM Data Read access
    ../bin/msp430sim two-op_add_rom-rd        | tee $LOG_DIR/two-op_add_rom-rd.log
    ../bin/msp430sim sing-op_push_rom-rd      | tee $LOG_DIR/sing-op_push_rom-rd.log
    ../bin/msp430sim sing-op_call_rom-rd      | tee $LOG_DIR/sing-op_call_rom-rd.log

    # Power saving modes (CPUOFF, OSCOFF, SCG0, SCG1)
    ../bin/msp430sim op_modes                 | tee $LOG_DIR/op_modes.log
    ../bin/msp430sim op_modes_asic            | tee $LOG_DIR/op_modes_asic.log
    ../bin/msp430sim lp_modes_asic            | tee $LOG_DIR/lp_modes_asic.log
    ../bin/msp430sim lp_modes_dbg_asic        | tee $LOG_DIR/lp_modes_dbg_asic.log

    # CPU startup conditions
    ../bin/msp430sim cpu_startup_asic         | tee $LOG_DIR/cpu_startup_asic.log

    # Basic clock module
    ../bin/msp430sim clock_module             | tee $LOG_DIR/clock_module.log
    ../bin/msp430sim clock_module_asic        | tee $LOG_DIR/clock_module_asic.log
    ../bin/msp430sim clock_module_asic_mclk   | tee $LOG_DIR/clock_module_asic_mclk.log
    ../bin/msp430sim clock_module_asic_smclk  | tee $LOG_DIR/clock_module_asic_smclk.log
    ../bin/msp430sim clock_module_asic_lfxt   | tee $LOG_DIR/clock_module_asic_lfxt.log

    # Serial Debug Interface (UART)
    ../bin/msp430sim dbg_uart                 | tee $LOG_DIR/dbg_uart.log
    ../bin/msp430sim dbg_uart_sync            | tee $LOG_DIR/dbg_uart_sync.log
    ../bin/msp430sim dbg_uart_cpu             | tee $LOG_DIR/dbg_uart_cpu.log
    ../bin/msp430sim dbg_uart_mem             | tee $LOG_DIR/dbg_uart_mem.log
    ../bin/msp430sim dbg_uart_hwbrk0          | tee $LOG_DIR/dbg_uart_hwbrk0.log
    ../bin/msp430sim dbg_uart_hwbrk1          | tee $LOG_DIR/dbg_uart_hwbrk1.log
    ../bin/msp430sim dbg_uart_hwbrk2          | tee $LOG_DIR/dbg_uart_hwbrk2.log
    ../bin/msp430sim dbg_uart_hwbrk3          | tee $LOG_DIR/dbg_uart_hwbrk3.log
    ../bin/msp430sim dbg_uart_rdwr            | tee $LOG_DIR/dbg_uart_rdwr.log
    ../bin/msp430sim dbg_uart_halt_irq        | tee $LOG_DIR/dbg_uart_halt_irq.log
    ../bin/msp430sim dbg_uart_onoff           | tee $LOG_DIR/dbg_uart_onoff.log
    ../bin/msp430sim dbg_uart_onoff_asic      | tee $LOG_DIR/dbg_uart_onoff_asic.log

    # Serial Debug Interface (I2C)
    ../bin/msp430sim dbg_i2c                  | tee $LOG_DIR/dbg_i2c.log
    ../bin/msp430sim dbg_i2c_sync             | tee $LOG_DIR/dbg_i2c_sync.log
    ../bin/msp430sim dbg_i2c_cpu              | tee $LOG_DIR/dbg_i2c_cpu.log
    ../bin/msp430sim dbg_i2c_mem              | tee $LOG_DIR/dbg_i2c_mem.log
    ../bin/msp430sim dbg_i2c_hwbrk0           | tee $LOG_DIR/dbg_i2c_hwbrk0.log
    ../bin/msp430sim dbg_i2c_hwbrk1           | tee $LOG_DIR/dbg_i2c_hwbrk1.log
    ../bin/msp430sim dbg_i2c_hwbrk2           | tee $LOG_DIR/dbg_i2c_hwbrk2.log
    ../bin/msp430sim dbg_i2c_hwbrk3           | tee $LOG_DIR/dbg_i2c_hwbrk3.log
    ../bin/msp430sim dbg_i2c_rdwr             | tee $LOG_DIR/dbg_i2c_rdwr.log
    ../bin/msp430sim dbg_i2c_halt_irq         | tee $LOG_DIR/dbg_i2c_halt_irq.log
    ../bin/msp430sim dbg_i2c_onoff            | tee $LOG_DIR/dbg_i2c_onoff.log
    ../bin/msp430sim dbg_i2c_onoff_asic       | tee $LOG_DIR/dbg_i2c_onoff_asic.log

    # SFR test patterns
    ../bin/msp430sim sfr                      | tee $LOG_DIR/sfr.log

    # SCAN test patterns (only to increase coverage)
    ../bin/msp430sim scan                     | tee $LOG_DIR/scan.log

    # Watchdog test patterns
    ../bin/msp430sim wdt_interval             | tee $LOG_DIR/wdt_interval.log
    ../bin/msp430sim wdt_watchdog             | tee $LOG_DIR/wdt_watchdog.log
    ../bin/msp430sim wdt_clkmux               | tee $LOG_DIR/wdt_clkmux.log
    ../bin/msp430sim wdt_wkup                 | tee $LOG_DIR/wdt_wkup.log

    # GPIO test patterns
    ../bin/msp430sim gpio_rdwr                | tee $LOG_DIR/gpio_rdwr.log
    ../bin/msp430sim gpio_irq                 | tee $LOG_DIR/gpio_irq.log

    # Peripheral templates test patterns
    ../bin/msp430sim template_periph_8b       | tee $LOG_DIR/template_periph_8b.log
    ../bin/msp430sim template_periph_16b      | tee $LOG_DIR/template_periph_16b.log

    # Timer A patterns
    ../bin/msp430sim tA_modes                 | tee $LOG_DIR/tA_modes.log
    ../bin/msp430sim tA_compare               | tee $LOG_DIR/tA_compare.log
    ../bin/msp430sim tA_output                | tee $LOG_DIR/tA_output.log
    ../bin/msp430sim tA_capture               | tee $LOG_DIR/tA_capture.log
    ../bin/msp430sim tA_clkmux                | tee $LOG_DIR/tA_clkmux.log

    # DMA Interface
    ../bin/msp430sim dma_rdwr_16b             | tee $LOG_DIR/dma_rdwr_16b.log
    ../bin/msp430sim dma_rdwr_8b              | tee $LOG_DIR/dma_rdwr_8b.log
    ../bin/msp430sim dma_resp                 | tee $LOG_DIR/dma_resp.log
    ../bin/msp430sim dma_dbg_arbiter          | tee $LOG_DIR/dma_dbg_arbiter.log
    ../bin/msp430sim dma_lpm0_asic            | tee $LOG_DIR/dma_lpm0_asic.log
    ../bin/msp430sim dma_lpm1_asic            | tee $LOG_DIR/dma_lpm1_asic.log
    ../bin/msp430sim dma_lpm2_asic            | tee $LOG_DIR/dma_lpm2_asic.log
    ../bin/msp430sim dma_lpm3_asic            | tee $LOG_DIR/dma_lpm3_asic.log
    ../bin/msp430sim dma_lpm4_asic            | tee $LOG_DIR/dma_lpm4_asic.log

    # Simple full duplex UART (8N1 protocol)
    #../bin/msp430sim uart                    | tee $LOG_DIR/uart.log

    # Hardware multiplier test patterns
    ../bin/msp430sim mpy_basic                | tee $LOG_DIR/mpy_basic.log


    # Report regression results
    ../bin/parse_results $LOG_DIR             | tee $LOG_DIR/../summary.$ii.log

done


if [ $LAST_REGRESSION != 0 ]; then
    ../bin/parse_summaries                    | tee $LOG_DIR/../regressions_summary.log
fi