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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                        SERIAL DEBUG INTERFACE                             */
/*---------------------------------------------------------------------------*/
/* Test the serial debug interface:                                          */
/*                           - Interrupts when going out of halt mode.       */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 19 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
/*===========================================================================*/

.include "pmem_defs.asm"

.global main

main:
        ; Disable interrupts
        dint
        mov.b #0x00, &P1IE


        /* -------------- PORT 1: TEST INTERRUPT VECTOR  --------------- */

        mov   #DMEM_250, r1     ; Initialize stack

        mov.b   #0x0001, &P1IE  ; Enable GPIO interrupt

        eint                    ; Enable Global interrupts

        mov     #0x0000, r13;
        mov     #0x0000, r14;
        mov   #DMEM_200, r15;
infinite_loop:
        inc     r13
        bit     #0x0002, &P1IN
        jz      infinite_loop


        /* ----------------------         END OF TEST        --------------- */
end_of_test:
        nop
        br #0xffff


        /* ----------------------      INTERRUPT ROUTINES    --------------- */

PORT1_VECTOR:
        mov.b &P1IFG,   0(r15)
        mov.b  #0x00,   &P1IFG
        mov    #0xaaaa, r14;
        reti    



        /* ----------------------         INTERRUPT VECTORS  --------------- */

.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    <unused>
.word end_of_test  ; Interrupt  1                      <unused>
.word PORT1_VECTOR ; Interrupt  2                      <unused>
.word end_of_test  ; Interrupt  3                      <unused>
.word end_of_test  ; Interrupt  4                      <unused>
.word end_of_test  ; Interrupt  5                      <unused>
.word end_of_test  ; Interrupt  6                      <unused>
.word end_of_test  ; Interrupt  7                      <unused>
.word end_of_test  ; Interrupt  8                      <unused>
.word end_of_test  ; Interrupt  9                      <unused>
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      <unused>
.word end_of_test  ; Interrupt 12                      <unused>
.word end_of_test  ; Interrupt 13                      <unused>
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET