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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [irq64.s43] - Rev 224
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/*===========================================================================*/
/* Copyright (C) 2001 Authors */
/* */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer. */
/* */
/* This source file is free software; you can redistribute it and/or modify */
/* it under the terms of the GNU Lesser General Public License as published */
/* by the Free Software Foundation; either version 2.1 of the License, or */
/* (at your option) any later version. */
/* */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
/* License for more details. */
/* */
/* You should have received a copy of the GNU Lesser General Public License */
/* along with this source; if not, write to the Free Software Foundation, */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
/* */
/*===========================================================================*/
/* IRQ 1 to 32 FOR SYSTEM WITH 64 IRQs */
/*---------------------------------------------------------------------------*/
/* Test the some IRQs for RTL configuration with more than 16 IRQs: */
/* */
/* - for 16 IRQ configuration: test is skipped. */
/* - for 32 IRQ configuration: test is skipped. */
/* - for 64 IRQ configuration: will test IRQ 1 to 32. */
/* */
/* */
/* Author(s): */
/* - Olivier Girard, olgirard@gmail.com */
/* */
/*---------------------------------------------------------------------------*/
/* $Rev: 19 $ */
/* $LastChangedBy: olivier.girard $ */
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */
/*===========================================================================*/
.include "pmem_defs.asm"
.global main
mov #0x1234, r3
mov #0x1234, r4
mov #0x1234, r5
mov #0x1234, r6
mov #0x1234, r7
mov #0x1234, r8
mov #0x1234, r9
mov #0x1234, r10
mov #0x1234, r11
mov #0x1234, r12
mov #0x1234, r13
mov #0x1234, r14
main:
# Test RESET vector
#------------------------
mov #0x1000, r15
# Test RETI instruction
#------------------------
# Pre-initialize stack
mov #DMEM_252, r1
push #RETI_ROUTINE
push #0x010f
mov #0x0000, &0x0200
# Run RETI test
mov #0x0000, r2
mov #0x0000, r5
reti
end_of_reti_test:
mov #0x2000, r15
# Test IRQ 0
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0x3000, r15
wait_irq00:
cmp #0x5678, r6
jne wait_irq00
mov #0x3001, r15
# Test IRQ 1
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0x4000, r15
wait_irq01:
cmp #0x9abc, r6
jne wait_irq01
mov #0x4001, r15
# Test IRQ 2
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0x5000, r15
wait_irq02:
cmp #0xdef1, r6
jne wait_irq02
mov #0x5001, r15
# Test IRQ 3
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0x6000, r15
wait_irq03:
cmp #0x2345, r6
jne wait_irq03
mov #0x6001, r15
# Test IRQ 4
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0x7000, r15
wait_irq04:
cmp #0x6789, r6
jne wait_irq04
mov #0x7001, r15
# Test IRQ 5
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0x8000, r15
wait_irq05:
cmp #0xabcd, r6
jne wait_irq05
mov #0x8001, r15
# Test IRQ 6
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0x9000, r15
wait_irq06:
cmp #0xef12, r6
jne wait_irq06
mov #0x9001, r15
# Test IRQ 7
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xa000, r15
wait_irq07:
cmp #0x3456, r6
jne wait_irq07
mov #0xa001, r15
# Test IRQ 8
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xb000, r15
wait_irq08:
cmp #0x789a, r6
jne wait_irq08
mov #0xb001, r15
# Test IRQ 9
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xc000, r15
wait_irq09:
cmp #0xbcde, r6
jne wait_irq09
mov #0xc001, r15
# Test IRQ 10
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xd000, r15
wait_irq10:
cmp #0xf123, r6
jne wait_irq10
mov #0xd001, r15
# Test IRQ 11
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xe000, r15
wait_irq11:
cmp #0x4567, r6
jne wait_irq11
mov #0xe001, r15
# Test IRQ 12
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xf000, r15
wait_irq12:
cmp #0x89ab, r6
jne wait_irq12
mov #0xf001, r15
# Test IRQ 13
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xf100, r15
wait_irq13:
cmp #0xcdef, r6
jne wait_irq13
mov #0xf101, r15
# Test IRQ 14
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xf200, r15
wait_irq14:
cmp #0xfedc, r6
jne wait_irq14
mov #0xf201, r15
# Test IRQ 15
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xf300, r15
wait_irq15:
cmp #0xba98, r6
jne wait_irq15
mov #0xf301, r15
# Test IRQ 16
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xf400, r15
wait_irq16:
cmp #0x7654, r6
jne wait_irq16
mov #0xf401, r15
# Test IRQ 17
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xf500, r15
wait_irq17:
cmp #0x3210, r6
jne wait_irq17
mov #0xf501, r15
# Test IRQ 18
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xf600, r15
wait_irq18:
cmp #0x0246, r6
jne wait_irq18
mov #0xf601, r15
# Test IRQ 19
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xf700, r15
wait_irq19:
cmp #0x1357, r6
jne wait_irq19
mov #0xf701, r15
# Test IRQ 20
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xf800, r15
wait_irq20:
cmp #0x8ace, r6
jne wait_irq20
mov #0xf801, r15
# Test IRQ 21
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xf900, r15
wait_irq21:
cmp #0x9bdf, r6
jne wait_irq21
mov #0xf901, r15
# Test IRQ 22
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xfa00, r15
wait_irq22:
cmp #0xfdb9, r6
jne wait_irq22
mov #0xfa01, r15
# Test IRQ 23
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xfb00, r15
wait_irq23:
cmp #0xeca8, r6
jne wait_irq23
mov #0xfb01, r15
# Test IRQ 24
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xfc00, r15
wait_irq24:
cmp #0x7531, r6
jne wait_irq24
mov #0xfc01, r15
# Test IRQ 25
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xfd00, r15
wait_irq25:
cmp #0x6420, r6
jne wait_irq25
mov #0xfd01, r15
# Test IRQ 26
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xfe00, r15
wait_irq26:
cmp #0x0134, r6
jne wait_irq26
mov #0xfe01, r15
# Test IRQ 27
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xff00, r15
wait_irq27:
cmp #0x1245, r6
jne wait_irq27
mov #0xff01, r15
# Test IRQ 28
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xff10, r15
wait_irq28:
cmp #0x2356, r6
jne wait_irq28
mov #0xff11, r15
# Test IRQ 29
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xff20, r15
wait_irq29:
cmp #0x3467, r6
jne wait_irq29
mov #0xff21, r15
# Test IRQ 30
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xff30, r15
wait_irq30:
cmp #0x4578, r6
jne wait_irq30
mov #0xff31, r15
# Test IRQ 31
#-------------------------
mov #0x0008, r2 ; Enable interrupts
mov #0x0000, r6
mov #0xaaaa, r7
mov #0x5555, r8
mov #0xff40, r15
wait_irq31:
cmp #0x5689, r6
jne wait_irq31
mov #0xff41, r15
/* ---------------------- END OF TEST --------------- */
end_of_test:
nop
br #0xffff
/* ---------------------- FUNCTIONS --------------- */
RETI_ROUTINE:
mov #0x1234, r5
jmp end_of_reti_test
IRQ00_ROUTINE:
mov #0x5678, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ01_ROUTINE:
mov #0x9abc, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ02_ROUTINE:
mov #0xdef1, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ03_ROUTINE:
mov #0x2345, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ04_ROUTINE:
mov #0x6789, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ05_ROUTINE:
mov #0xabcd, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ06_ROUTINE:
mov #0xef12, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ07_ROUTINE:
mov #0x3456, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ08_ROUTINE:
mov #0x789a, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ09_ROUTINE:
mov #0xbcde, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ10_ROUTINE:
mov #0xf123, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ11_ROUTINE:
mov #0x4567, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ12_ROUTINE:
mov #0x89ab, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ13_ROUTINE:
mov #0xcdef, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ14_ROUTINE:
mov #0xfedc, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ15_ROUTINE:
mov #0xba98, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ16_ROUTINE:
mov #0x7654, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ17_ROUTINE:
mov #0x3210, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ18_ROUTINE:
mov #0x0246, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ19_ROUTINE:
mov #0x1357, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ20_ROUTINE:
mov #0x8ace, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ21_ROUTINE:
mov #0x9bdf, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ22_ROUTINE:
mov #0xfdb9, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ23_ROUTINE:
mov #0xeca8, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ24_ROUTINE:
mov #0x7531, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ25_ROUTINE:
mov #0x6420, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ26_ROUTINE:
mov #0x0134, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ27_ROUTINE:
mov #0x1245, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ28_ROUTINE:
mov #0x2356, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ29_ROUTINE:
mov #0x3467, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ30_ROUTINE:
mov #0x4578, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
IRQ31_ROUTINE:
mov #0x5689, r6
mov r2, r7 ; Save Status register
mov r1, r8 ; Save Stack register
reti
nop
nop
nop
nop
nop
/* ---------------------- INTERRUPT VECTORS --------------- */
.section .vectors64, "a"
.word IRQ00_ROUTINE ; Interrupt 0 (lowest priority) <unused>
.word IRQ01_ROUTINE ; Interrupt 1 <unused>
.word IRQ02_ROUTINE ; Interrupt 2 <unused>
.word IRQ03_ROUTINE ; Interrupt 3 <unused>
.word IRQ04_ROUTINE ; Interrupt 4 <unused>
.word IRQ05_ROUTINE ; Interrupt 5 <unused>
.word IRQ06_ROUTINE ; Interrupt 6 <unused>
.word IRQ07_ROUTINE ; Interrupt 7 <unused>
.word IRQ08_ROUTINE ; Interrupt 8 <unused>
.word IRQ09_ROUTINE ; Interrupt 9 <unused>
.word IRQ10_ROUTINE ; Interrupt 10 <unused>
.word IRQ11_ROUTINE ; Interrupt 11 <unused>
.word IRQ12_ROUTINE ; Interrupt 12 <unused>
.word IRQ13_ROUTINE ; Interrupt 13 <unused>
.word IRQ14_ROUTINE ; Interrupt 14 <unused>
.word IRQ15_ROUTINE ; Interrupt 15 <unused>
.word IRQ16_ROUTINE ; Interrupt 16 <unused>
.word IRQ17_ROUTINE ; Interrupt 17 <unused>
.word IRQ18_ROUTINE ; Interrupt 18 <unused>
.word IRQ19_ROUTINE ; Interrupt 19 <unused>
.word IRQ20_ROUTINE ; Interrupt 20 <unused>
.word IRQ21_ROUTINE ; Interrupt 21 <unused>
.word IRQ22_ROUTINE ; Interrupt 22 <unused>
.word IRQ23_ROUTINE ; Interrupt 23 <unused>
.word IRQ24_ROUTINE ; Interrupt 24 <unused>
.word IRQ25_ROUTINE ; Interrupt 25 <unused>
.word IRQ26_ROUTINE ; Interrupt 26 <unused>
.word IRQ27_ROUTINE ; Interrupt 27 <unused>
.word IRQ28_ROUTINE ; Interrupt 28 <unused>
.word IRQ29_ROUTINE ; Interrupt 29 <unused>
.word IRQ30_ROUTINE ; Interrupt 30 <unused>
.word IRQ31_ROUTINE ; Interrupt 31 <unused>
.section .vectors32, "a"
.word end_of_test ; Interrupt 32 <unused>
.word end_of_test ; Interrupt 33 <unused>
.word end_of_test ; Interrupt 34 <unused>
.word end_of_test ; Interrupt 35 <unused>
.word end_of_test ; Interrupt 36 <unused>
.word end_of_test ; Interrupt 37 <unused>
.word end_of_test ; Interrupt 38 <unused>
.word end_of_test ; Interrupt 39 <unused>
.word end_of_test ; Interrupt 40 <unused>
.word end_of_test ; Interrupt 41 <unused>
.word end_of_test ; Interrupt 42 <unused>
.word end_of_test ; Interrupt 43 <unused>
.word end_of_test ; Interrupt 44 <unused>
.word end_of_test ; Interrupt 45 <unused>
.word end_of_test ; Interrupt 46 <unused>
.word end_of_test ; Interrupt 47 <unused>
.section .vectors, "a"
.word end_of_test ; Interrupt 48 <unused>
.word end_of_test ; Interrupt 49 <unused>
.word end_of_test ; Interrupt 50 <unused>
.word end_of_test ; Interrupt 51 <unused>
.word end_of_test ; Interrupt 52 <unused>
.word end_of_test ; Interrupt 53 <unused>
.word end_of_test ; Interrupt 54 <unused>
.word end_of_test ; Interrupt 55 <unused>
.word end_of_test ; Interrupt 56 <unused>
.word end_of_test ; Interrupt 57 <unused>
.word end_of_test ; Interrupt 58 Watchdog timer
.word end_of_test ; Interrupt 59 <unused>
.word end_of_test ; Interrupt 60 <unused>
.word end_of_test ; Interrupt 61 <unused>
.word end_of_test ; Interrupt 62 NMI
.word main ; Interrupt 63 (highest priority) RESET
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