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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [mpy_basic.s43] - Rev 154
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/*===========================================================================*//* Copyright (C) 2001 Authors *//* *//* This source file may be used and distributed without restriction provided *//* that this copyright statement is not removed from the file and that any *//* derivative work contains the original copyright notice and the associated *//* disclaimer. *//* *//* This source file is free software; you can redistribute it and/or modify *//* it under the terms of the GNU Lesser General Public License as published *//* by the Free Software Foundation; either version 2.1 of the License, or *//* (at your option) any later version. *//* *//* This source is distributed in the hope that it will be useful, but WITHOUT*//* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or *//* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public *//* License for more details. *//* *//* You should have received a copy of the GNU Lesser General Public License *//* along with this source; if not, write to the Free Software Foundation, *//* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA *//* *//*===========================================================================*//* HARDWARE MULTIPLIER *//*---------------------------------------------------------------------------*//* Test the hardware multiplier: *//* - MPY mode. *//* - MPYS mode. *//* - MAC mode. *//* - MACS mode. *//* *//* Author(s): *//* - Olivier Girard, olgirard@gmail.com *//* *//*---------------------------------------------------------------------------*//* $Rev: 18 $ *//* $LastChangedBy: olivier.girard $ *//* $LastChangedDate: 2009-08-04 23:44:12 +0200 (Tue, 04 Aug 2009) $ *//*===========================================================================*/.include "pmem_defs.asm".global mainmain:/* -------------- UNSIGNED MULTIPLICATION --------------- */mov #0x0000, &RESLOmov #0xC000, &RESHImov #0x3104, &MPY ; 0x3104 * 0x0285 = 0x007B_7F14, ext=0x0000mov #0x0285, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0001, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x0000, &MPY ; 0x0000 * 0x0000 = 0x0000_0000, ext=0x0000mov #0x0000, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0002, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x0001, &MPY ; 0x0001 * 0x0001 = 0x0000_0001, ext=0x0000mov #0x0001, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0003, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x7FFF, &MPY ; 0x7FFF * 0x7FFF = 0x3FFF_0001, ext=0x0000mov #0x7FFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0004, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0xFFFF, &MPY ; 0xFFFF * 0xFFFF = 0xFFFE_0001, ext=0x0000mov #0xFFFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0005, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x7FFF, &MPY ; 0x7FFF * 0xFFFF = 0x7FFE_8001, ext=0x0000mov #0xFFFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0006, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x8000, &MPY ; 0x8000 * 0x7FFF = 0x3FFF_8000, ext=0x0000mov #0x7FFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0007, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x8000, &MPY ; 0x8000 * 0xFFFF = 0x7FFF_8000, ext=0x0000mov #0xFFFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0008, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x8000, &MPY ; 0x8000 * 0x8000 = 0x4000_0000, ext=0x0000mov #0x8000, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0009, R15nopnopnopnop/* -------------- SIGNED MULTIPLICATION --------------- */mov #0x0000, &RESLOmov #0xC000, &RESHImov #0x3104, &MPYS ; 0x3104 * 0x8285 = 0xE7F9_7F14, ext=0xFFFFmov #0x8285, &OP2 ; 12548 * -32123mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0001, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x0000, &MPYS ; 0x0000 * 0x0000 = 0x0000_0000, ext=0x0000mov #0x0000, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0002, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x0001, &MPYS ; 0x0001 * 0x0001 = 0x0000_0001, ext=0x0000mov #0x0001, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0003, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x7FFF, &MPYS ; 0x7FFF * 0x7FFF = 0x3FFF_0001, ext=0x0000mov #0x7FFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0004, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0xFFFF, &MPYS ; 0xFFFF * 0xFFFF = 0x0000_0001, ext=0x0000mov #0xFFFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0005, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x7FFF, &MPYS ; 0x7FFF * 0xFFFF = 0xFFFF_8001, ext=0xFFFFmov #0xFFFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0006, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x8000, &MPYS ; 0x8000 * 0x7FFF = 0xC000_8000, ext=0xFFFFmov #0x7FFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0007, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x8000, &MPYS ; 0x8000 * 0xFFFF = 0x0000_8000, ext=0x0000mov #0xFFFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0008, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x8000, &MPYS ; 0x8000 * 0x8000 = 0x4000_0000, ext=0x0000mov #0x8000, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0009, R15nopnopnopnop/* -------------- UNSIGNED MULTIPLY-ACCUMULATE --------------- */mov #0x0000, &RESLOmov #0xC000, &RESHImov #0x3104, &MAC ; 0xC000_0000 + (0x3104 * 0x0285) = 0x007B_7F14, ext=0x0000mov #0x0285, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0001, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x0000, &MAC ; 0xC000_0000 + (0x0000 * 0x0000) = 0xC000_0000, ext=0x0000mov #0x0000, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0002, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x0001, &MAC ; 0xC000_0000 + (0x0001 * 0x0001) = 0xC000_0001, ext=0x0000mov #0x0001, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0003, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x7FFF, &MAC ; 0xC000_0000 + (0x7FFF * 0x7FFF) = 0xFFFF_0001, ext=0x0000mov #0x7FFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0004, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0xFFFF, &MAC ; 0xC000_0000 + (0xFFFF * 0xFFFF) = 0xBFFE_0001, ext=0x0001mov #0xFFFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0005, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x7FFF, &MAC ; 0xC000_0000 + (0x7FFF * 0xFFFF) = 0x3FFE_8001, ext=0x0001mov #0xFFFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0006, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x8000, &MAC ; 0xC000_0000 + (0x8000 * 0x7FFF) = 0xFFFF_8000, ext=0x0000mov #0x7FFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0007, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x8000, &MAC ; 0xC000_0000 + (0x8000 * 0xFFFF) = 0x3FFF_8000, ext=0x0001mov #0xFFFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0008, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x8000, &MAC ; 0xC000_0000 + (0x8000 * 0x8000) = 0x0000_0000, ext=0x0001mov #0x8000, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0009, R15nopnopnopnop/* -------------- SIGNED MULTIPLY-ACCUMULATE --------------- */mov #0x0000, &RESLOmov #0xC000, &RESHImov #0x3104, &MACS ; 0xC000_0000 + (0x3104 * 0x8285) = 0xA7F9_7F14, ext=0xFFFFmov #0x8285, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0001, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x0000, &MACS ; 0xC000_0000 + (0x0000 * 0x0000) = 0xC000_0000, ext=0xFFFFmov #0x0000, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0002, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x0001, &MACS ; 0xC000_0000 + (0x0001 * 0x0001) = 0xC000_0001, ext=0xFFFFmov #0x0001, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0003, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x7FFF, &MACS ; 0xC000_0000 + (0x7FFF * 0x7FFF) = 0xFFFF_0001, ext=0xFFFFmov #0x7FFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0004, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0xFFFF, &MACS ; 0xC000_0000 + (0xFFFF * 0xFFFF) = 0xC000_0001, ext=0xFFFFmov #0xFFFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0005, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x7FFF, &MACS ; 0xC000_0000 + (0x7FFF * 0xFFFF = 0xBFFF_8001, ext=0xFFFFmov #0xFFFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0006, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x8000, &MACS ; 0xC000_0000 + (0x8000 * 0x7FFF) = 0x8000_8000, ext=0xFFFFmov #0x7FFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0007, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x8000, &MACS ; 0xC000_0000 + (0x8000 * 0xFFFF) = 0xC000_8000, ext=0xFFFFmov #0xFFFF, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0008, R15nopnopnopnopmov #0x0000, &RESLOmov #0xC000, &RESHImov #0x8000, &MACS ; 0xC000_0000 + (0x8000 * 0x8000) = 0x0000_0000, ext=0x0000mov #0x8000, &OP2mov &RESLO, R10mov &RESHI, R11mov &SUMEXT, R12nopmov #0x0009, R15nopnopnopnop/* -------------- RD/WR ACCESS OPERANDS --------------- */mov #0x1234, &MPYmov #0x5678, &OP2nopmov &MPY, r10mov &MPYS, r11mov &MAC, r12mov &MACS, r13mov &OP2, r14nopmov #0x0001, r15nopnopnopnopmov #0x4321, &MPYSmov #0x8765, &OP2nopmov &MPY, r10mov &MPYS, r11mov &MAC, r12mov &MACS, r13mov &OP2, r14nopmov #0x0002, r15nopnopnopnopmov #0x9ABC, &MACmov #0xDEF0, &OP2nopmov &MPY, r10mov &MPYS, r11mov &MAC, r12mov &MACS, r13mov &OP2, r14nopmov #0x0003, r15nopnopnopnopmov #0xCBA9, &MACSmov #0x0FED, &OP2nopmov &MPY, r10mov &MPYS, r11mov &MAC, r12mov &MACS, r13mov &OP2, r14nopmov #0x0004, r15nopnopnopnop/* ---------------------- END OF TEST --------------- */end_of_test:nopbr #0xffff/* ---------------------- INTERRUPT VECTORS --------------- */.section .vectors, "a".word end_of_test ; Interrupt 0 (lowest priority) <unused>.word end_of_test ; Interrupt 1 <unused>.word end_of_test ; Interrupt 2 <unused>.word end_of_test ; Interrupt 3 <unused>.word end_of_test ; Interrupt 4 <unused>.word end_of_test ; Interrupt 5 <unused>.word end_of_test ; Interrupt 6 <unused>.word end_of_test ; Interrupt 7 <unused>.word end_of_test ; Interrupt 8 <unused>.word end_of_test ; Interrupt 9 <unused>.word end_of_test ; Interrupt 10 Watchdog timer.word end_of_test ; Interrupt 11 <unused>.word end_of_test ; Interrupt 12 <unused>.word end_of_test ; Interrupt 13 <unused>.word end_of_test ; Interrupt 14 NMI.word main ; Interrupt 15 (highest priority) RESET
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