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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [mpy_basic.s43] - Rev 81

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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                          HARDWARE MULTIPLIER                              */
/*---------------------------------------------------------------------------*/
/* Test the hardware multiplier:                                             */
/*                                - MPY  mode.                               */
/*                                - MPYS mode.                               */
/*                                - MAC  mode.                               */
/*                                - MACS mode.                               */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 18 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2009-08-04 23:44:12 +0200 (Tue, 04 Aug 2009) $          */
/*===========================================================================*/

.global main

.set   MPY,    0x0130
.set   MPYS,   0x0132
.set   MAC,    0x0134
.set   MACS,   0x0136
.set   OP2,    0x0138
.set   RESLO,  0x013A
.set   RESHI,  0x013C
.set   SUMEXT, 0x013E
        
        
main:
        
        /* --------------   UNSIGNED MULTIPLICATION   --------------- */

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x3104, &MPY       ; 0x3104 * 0x0285 = 0x007B_7F14, ext=0x0000
        mov #0x0285, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0001, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x0000, &MPY       ; 0x0000 * 0x0000 = 0x0000_0000, ext=0x0000
        mov #0x0000, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0002, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x0001, &MPY       ; 0x0001 * 0x0001 = 0x0000_0001, ext=0x0000
        mov #0x0001, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0003, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x7FFF, &MPY       ; 0x7FFF * 0x7FFF = 0x3FFF_0001, ext=0x0000
        mov #0x7FFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0004, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0xFFFF, &MPY       ; 0xFFFF * 0xFFFF = 0xFFFE_0001, ext=0x0000
        mov #0xFFFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0005, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x7FFF, &MPY       ; 0x7FFF * 0xFFFF = 0x7FFE_8001, ext=0x0000
        mov #0xFFFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0006, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x8000, &MPY       ; 0x8000 * 0x7FFF = 0x3FFF_8000, ext=0x0000
        mov #0x7FFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0007, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x8000, &MPY       ; 0x8000 * 0xFFFF = 0x7FFF_8000, ext=0x0000
        mov #0xFFFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0008, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x8000, &MPY       ; 0x8000 * 0x8000 = 0x4000_0000, ext=0x0000
        mov #0x8000, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0009, R15
        nop
        nop
        nop
        nop

        /* --------------    SIGNED MULTIPLICATION    --------------- */

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x3104, &MPYS      ; 0x3104 * 0x8285 = 0xE7F9_7F14, ext=0xFFFF
        mov #0x8285, &OP2       ;  12548 * -32123

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0001, R15
        nop
        nop
        nop
        nop
                
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x0000, &MPYS      ; 0x0000 * 0x0000 = 0x0000_0000, ext=0x0000
        mov #0x0000, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0002, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x0001, &MPYS      ; 0x0001 * 0x0001 = 0x0000_0001, ext=0x0000
        mov #0x0001, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0003, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x7FFF, &MPYS      ; 0x7FFF * 0x7FFF = 0x3FFF_0001, ext=0x0000
        mov #0x7FFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0004, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0xFFFF, &MPYS      ; 0xFFFF * 0xFFFF = 0x0000_0001, ext=0x0000
        mov #0xFFFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0005, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x7FFF, &MPYS      ; 0x7FFF * 0xFFFF = 0xFFFF_8001, ext=0xFFFF
        mov #0xFFFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0006, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x8000, &MPYS      ; 0x8000 * 0x7FFF = 0xC000_8000, ext=0xFFFF
        mov #0x7FFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0007, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x8000, &MPYS      ; 0x8000 * 0xFFFF = 0x0000_8000, ext=0x0000
        mov #0xFFFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0008, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x8000, &MPYS      ; 0x8000 * 0x8000 = 0x4000_0000, ext=0x0000
        mov #0x8000, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0009, R15
        nop
        nop
        nop
        nop

        /* --------------   UNSIGNED MULTIPLY-ACCUMULATE   --------------- */

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x3104, &MAC       ; 0xC000_0000 + (0x3104 * 0x0285) = 0x007B_7F14, ext=0x0000
        mov #0x0285, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0001, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x0000, &MAC       ; 0xC000_0000 + (0x0000 * 0x0000) = 0xC000_0000, ext=0x0000
        mov #0x0000, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0002, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x0001, &MAC       ; 0xC000_0000 + (0x0001 * 0x0001) = 0xC000_0001, ext=0x0000
        mov #0x0001, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0003, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x7FFF, &MAC       ; 0xC000_0000 + (0x7FFF * 0x7FFF) = 0xFFFF_0001, ext=0x0000
        mov #0x7FFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0004, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0xFFFF, &MAC       ; 0xC000_0000 + (0xFFFF * 0xFFFF) = 0xBFFE_0001, ext=0x0001
        mov #0xFFFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0005, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x7FFF, &MAC       ; 0xC000_0000 + (0x7FFF * 0xFFFF) = 0x3FFE_8001, ext=0x0001
        mov #0xFFFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0006, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x8000, &MAC       ; 0xC000_0000 + (0x8000 * 0x7FFF) = 0xFFFF_8000, ext=0x0000
        mov #0x7FFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0007, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x8000, &MAC       ; 0xC000_0000 + (0x8000 * 0xFFFF) = 0x3FFF_8000, ext=0x0001
        mov #0xFFFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0008, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x8000, &MAC       ; 0xC000_0000 + (0x8000 * 0x8000) = 0x0000_0000, ext=0x0001
        mov #0x8000, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0009, R15
        nop
        nop
        nop
        nop

        
        /* --------------   SIGNED MULTIPLY-ACCUMULATE   --------------- */

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x3104, &MACS      ; 0xC000_0000 + (0x3104 * 0x8285) = 0xA7F9_7F14, ext=0xFFFF
        mov #0x8285, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0001, R15
        nop
        nop
        nop
        nop
                
        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x0000, &MACS      ; 0xC000_0000 + (0x0000 * 0x0000) = 0xC000_0000, ext=0xFFFF
        mov #0x0000, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0002, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x0001, &MACS      ; 0xC000_0000 + (0x0001 * 0x0001) = 0xC000_0001, ext=0xFFFF
        mov #0x0001, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0003, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x7FFF, &MACS      ; 0xC000_0000 + (0x7FFF * 0x7FFF) = 0xFFFF_0001, ext=0xFFFF
        mov #0x7FFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0004, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0xFFFF, &MACS      ; 0xC000_0000 + (0xFFFF * 0xFFFF) = 0xC000_0001, ext=0xFFFF
        mov #0xFFFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0005, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x7FFF, &MACS      ; 0xC000_0000 + (0x7FFF * 0xFFFF = 0xBFFF_8001, ext=0xFFFF
        mov #0xFFFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0006, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x8000, &MACS      ; 0xC000_0000 + (0x8000 * 0x7FFF) = 0x8000_8000, ext=0xFFFF
        mov #0x7FFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0007, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x8000, &MACS      ; 0xC000_0000 + (0x8000 * 0xFFFF) = 0xC000_8000, ext=0xFFFF
        mov #0xFFFF, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0008, R15
        nop
        nop
        nop
        nop

        mov #0x0000, &RESLO
        mov #0xC000, &RESHI

        mov #0x8000, &MACS      ; 0xC000_0000 + (0x8000 * 0x8000) = 0x0000_0000, ext=0x0000
        mov #0x8000, &OP2

        mov &RESLO,  R10
        mov &RESHI,  R11
        mov &SUMEXT, R12
        nop
        mov #0x0009, R15
        nop
        nop
        nop
        nop



        /* ----------------------         END OF TEST        --------------- */
end_of_test:
        nop
        br #0xffff




        /* ----------------------         INTERRUPT VECTORS  --------------- */

.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    <unused>
.word end_of_test  ; Interrupt  1                      <unused>
.word end_of_test  ; Interrupt  2                      <unused>
.word end_of_test  ; Interrupt  3                      <unused>
.word end_of_test  ; Interrupt  4                      <unused>
.word end_of_test  ; Interrupt  5                      <unused>
.word end_of_test  ; Interrupt  6                      <unused>
.word end_of_test  ; Interrupt  7                      <unused>
.word end_of_test  ; Interrupt  8                      <unused>
.word end_of_test  ; Interrupt  9                      <unused>
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      <unused>
.word end_of_test  ; Interrupt 12                      <unused>
.word end_of_test  ; Interrupt 13                      <unused>
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET

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