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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [op_modes.s43] - Rev 219
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/*===========================================================================*/
/* Copyright (C) 2001 Authors */
/* */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer. */
/* */
/* This source file is free software; you can redistribute it and/or modify */
/* it under the terms of the GNU Lesser General Public License as published */
/* by the Free Software Foundation; either version 2.1 of the License, or */
/* (at your option) any later version. */
/* */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
/* License for more details. */
/* */
/* You should have received a copy of the GNU Lesser General Public License */
/* along with this source; if not, write to the Free Software Foundation, */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
/* */
/*===========================================================================*/
/* CPU OPERATING MODES (FPGA VERSION) */
/*---------------------------------------------------------------------------*/
/* Test the CPU Operating modes: */
/* - CPUOFF (<=> R2[4]): turn off CPU. */
/* - OSCOFF (<=> R2[5]): turn off LFXT_CLK. */
/* - SCG1 (<=> R2[7]): turn off SMCLK. */
/* */
/* Author(s): */
/* - Olivier Girard, olgirard@gmail.com */
/* */
/*---------------------------------------------------------------------------*/
/* $Rev: 202 $ */
/* $LastChangedBy: olivier.girard $ */
/* $LastChangedDate: 2015-07-01 23:13:32 +0200 (Wed, 01 Jul 2015) $ */
/*===========================================================================*/
.include "pmem_defs.asm"
.global main
WAIT_FUNC:
dec r14
jnz WAIT_FUNC
ret
main:
; Enable GPIO interrupts on P1[0]
mov.b #0x00, &P1DIR
mov.b #0x00, &P1IFG
mov.b #0x00, &P1IES
mov.b #0x01, &P1IE
; Initialize stack and enable global interrupts
mov #DMEM_250, r1
eint
mov #0x1000, r15
/* -------------- SCG1 (<=> R2[7]): turn off SMCLK --------------- */
mov.b #0x06, &BCSCTL2 ; # Div /8
mov #0x0008, r2 ; # SCG1=0 (SMCLK on)
mov #0x1001, r15
mov #0x0020, r14
call #WAIT_FUNC
mov #0x0088, r2 ; # SCG1=1 (SMCLK off)
mov #0x1002, r15
mov #0x0020, r14
call #WAIT_FUNC
mov #0x1003, r15 ; # SCG1=1 (SMCLK off) with IRQ
mov #0x0020, r14
call #WAIT_FUNC
mov #0x1004, r15 ; # SCG1=1 (SMCLK off) return from IRQ
mov #0x0020, r14
call #WAIT_FUNC
mov #0x0008, r2 ; # SCG1=0 (SMCLK on)
mov #0x1005, r15
mov #0x0020, r14
call #WAIT_FUNC
mov #0x2000, r15
/* -------------- OSCOFF (<=> R2[5]): turn off LFXT1CLK --------------- */
mov.b #0x00, &BCSCTL2 ; # Div /1 --> select DCOCLK
mov #0x0008, r2 ; # OSCOFF=0 (LFXT1 on)
mov #0x2001, r15
mov #0x0050, r14
call #WAIT_FUNC
mov.b #0x00, &BCSCTL2 ; # Div /1 --> SMCLK select DCOCLK
mov #0x0028, r2 ; # OSCOFF=1 (LFXT1 off)
mov #0x2002, r15
mov #0x0050, r14
call #WAIT_FUNC
mov #0x2003, r15 ; # OSCOFF=1 (LFXT1 off) with IRQ
mov #0x0050, r14
call #WAIT_FUNC
mov #0x2004, r15 ; # OSCOFF=1 (LFXT1 off) return from IRQ
mov #0x0050, r14
call #WAIT_FUNC
mov.b #0x08, &BCSCTL2 ; # Div /1 --> SMCLK select LFXT1CLK
mov #0x0028, r2 ; # OSCOFF=1 (LFXT1 off)
mov #0x2005, r15
mov #0x0050, r14
call #WAIT_FUNC
mov.b #0x00, &BCSCTL2 ; # Div /1 --> SMCLK select DCOCLK
mov #0x0008, r2 ; # OSCOFF=0 (LFXT1 on)
mov #0x2006, r15
mov #0x0050, r14
call #WAIT_FUNC
mov #0x3000, r15
/* -------------- CPUOFF (<=> R2[4]): turn off CPU --------------- */
; Enable GPIO interrupts on P2[0]
mov.b #0x00, &P2DIR
mov.b #0x00, &P2IFG
mov.b #0x00, &P2IES
mov.b #0x01, &P2IE
mov.b #0x00, &BCSCTL2 ; # Div /1 --> select DCOCLK
mov #0x3001, r15
mov #0x0008, r2 ; # CPUOFF=0 (CPU on)
mov #0x0020, r14
call #WAIT_FUNC
mov #0x3002, r15
mov #0x0018, r2 ; # CPUOFF=1 (CPU off)
mov #0x0020, r14
call #WAIT_FUNC
mov #0x3003, r15
mov #0x0008, r2 ; # CPUOFF=0 (CPU on)
mov #0x0020, r14
call #WAIT_FUNC
mov #0x4000, r15
/* -------------- DMA_SCG1 --------------------------------------------- */
mov.b #0x06, &BCSCTL2 ; # Div /8
mov.b #0x00, &BCSCTL1 ; # DMA_OSCOFF=0 / DMA_SCG1=0
mov #0x0088, r2 ; # SCG1=1 (SMCLK off)
mov #0x4001, r15
mov #0x0020, r14
call #WAIT_FUNC
mov.b #0x02, &BCSCTL1 ; # DMA_OSCOFF=1 / DMA_SCG1=0
mov #0x0088, r2 ; # SCG1=1 (SMCLK off)
mov #0x4002, r15
mov #0x0020, r14
call #WAIT_FUNC
mov.b #0x08, &BCSCTL1 ; # DMA_OSCOFF=0 / DMA_SCG1=1
mov #0x0088, r2 ; # SCG1=1 (SMCLK off)
mov #0x4003, r15
mov #0x0020, r14
call #WAIT_FUNC
mov.b #0x0A, &BCSCTL1 ; # DMA_OSCOFF=1 / DMA_SCG1=1
mov #0x0088, r2 ; # SCG1=1 (SMCLK off)
mov #0x4004, r15
mov #0x0020, r14
call #WAIT_FUNC
mov.b #0x00, &BCSCTL1 ; # DMA_OSCOFF=0 / DMA_SCG1=0
mov #0x0088, r2 ; # SCG1=1 (SMCLK off)
mov #0x4005, r15
mov #0x0020, r14
call #WAIT_FUNC
mov #0x0008, r2 ; # SCG1=0 (SMCLK on)
mov #0x4006, r15
mov #0x0020, r14
call #WAIT_FUNC
mov #0x5000, r15
/* -------------- DMA_OSCOFF --------------------------------------------------- */
mov.b #0x06, &BCSCTL2 ; # Div /8
mov.b #0x00, &BCSCTL1 ; # DMA_OSCOFF=0 / DMA_SCG1=0
mov #0x0028, r2 ; # OSCOFF=1 (LFXT1 off)
mov #0x5001, r15
mov #0x0020, r14
call #WAIT_FUNC
mov.b #0x02, &BCSCTL1 ; # DMA_OSCOFF=1 / DMA_SCG1=0
mov #0x0028, r2 ; # OSCOFF=1 (LFXT1 off)
mov #0x5002, r15
mov #0x0020, r14
call #WAIT_FUNC
mov.b #0x08, &BCSCTL1 ; # DMA_OSCOFF=0 / DMA_SCG1=1
mov #0x0028, r2 ; # OSCOFF=1 (LFXT1 off)
mov #0x5003, r15
mov #0x0020, r14
call #WAIT_FUNC
mov.b #0x0A, &BCSCTL1 ; # DMA_OSCOFF=1 / DMA_SCG1=1
mov #0x0028, r2 ; # OSCOFF=1 (LFXT1 off)
mov #0x5004, r15
mov #0x0020, r14
call #WAIT_FUNC
mov.b #0x00, &BCSCTL1 ; # DMA_OSCOFF=0 / DMA_SCG1=0
mov #0x0028, r2 ; # OSCOFF=1 (LFXT1 off)
mov #0x5005, r15
mov #0x0020, r14
call #WAIT_FUNC
mov #0x0008, r2 ; # OSCOFF=1 (LFXT1 on)
mov #0x5006, r15
mov #0x0020, r14
call #WAIT_FUNC
mov #0x6000, r15
/* ---------------------- END OF TEST --------------- */
end_of_test:
nop
br #0xffff
/* ---------------------- INTERRUPT ROUTINES --------------- */
PORT1_VECTOR:
push r14
mov #0x0050, r14
call #WAIT_FUNC
pop r14
mov.b #0x00, &P1IFG
reti
PORT2_VECTOR:
push r14
mov #0x0050, r14
call #WAIT_FUNC
pop r14
mov.b #0x00, &P2IFG
bic #0x10, 0(r1) ;exit lowpower mode
reti
/* ---------------------- INTERRUPT VECTORS --------------- */
.section .vectors, "a"
.word end_of_test ; Interrupt 0 (lowest priority) <unused>
.word end_of_test ; Interrupt 1 <unused>
.word PORT1_VECTOR ; Interrupt 2 <unused>
.word PORT2_VECTOR ; Interrupt 3 <unused>
.word end_of_test ; Interrupt 4 <unused>
.word end_of_test ; Interrupt 5 <unused>
.word end_of_test ; Interrupt 6 <unused>
.word end_of_test ; Interrupt 7 <unused>
.word end_of_test ; Interrupt 8 <unused>
.word end_of_test ; Interrupt 9 <unused>
.word end_of_test ; Interrupt 10 Watchdog timer
.word end_of_test ; Interrupt 11 <unused>
.word end_of_test ; Interrupt 12 <unused>
.word end_of_test ; Interrupt 13 <unused>
.word end_of_test ; Interrupt 14 NMI
.word main ; Interrupt 15 (highest priority) RESET
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