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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [sing-op_rra.s43] - Rev 106
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/*===========================================================================*//* Copyright (C) 2001 Authors *//* *//* This source file may be used and distributed without restriction provided *//* that this copyright statement is not removed from the file and that any *//* derivative work contains the original copyright notice and the associated *//* disclaimer. *//* *//* This source file is free software; you can redistribute it and/or modify *//* it under the terms of the GNU Lesser General Public License as published *//* by the Free Software Foundation; either version 2.1 of the License, or *//* (at your option) any later version. *//* *//* This source is distributed in the hope that it will be useful, but WITHOUT*//* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or *//* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public *//* License for more details. *//* *//* You should have received a copy of the GNU Lesser General Public License *//* along with this source; if not, write to the Free Software Foundation, *//* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA *//* *//*===========================================================================*//* SINGLE-OPERAND ARITHMETIC: RRA[.B] INSTRUCTION *//*---------------------------------------------------------------------------*//* Test the RRA[.B] instruction. *//* *//* Author(s): *//* - Olivier Girard, olgirard@gmail.com *//* *//*---------------------------------------------------------------------------*//* $Rev: 19 $ *//* $LastChangedBy: olivier.girard $ *//* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ *//*===========================================================================*/.global mainmain:/* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */# Addressing mode: Rn#------------------------mov #0x0001, r2 ;# Test 1mov #0x7332, r4rra r4 ;# RRA ({r4=0x7332} => {r4=0x3999, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2mov #0x7333, r6rra r6 ;# RRA ({r6=0x7333} => {r6=0x3999, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3mov #0x8332, r8rra r8 ;# RRA ({r9=0x8332} => {r9=0xc199, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4mov #0x8333, r10rra r10 ;# RRA ({r10=0x8333} => {r10=0xc199, C=1})mov r2, r11mov #0x1000, r15# Addressing mode: @Rn#------------------------mov #0x0001, r2 ;# Test 1mov #0x7332, &0x0200mov #0x0200, r4mov #0xaaaa, &0x0202rra @r4 ;# RRA ({mem00=0x7332} => {mem00=0x3999, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2mov #0x7333, &0x0202mov #0x0202, r6mov #0xaaaa, &0x0204rra @r6 ;# RRA ({mem01=0x7333} => {mem01=0x3999, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3mov #0x8332, &0x0204mov #0x0204, r8mov #0xaaaa, &0x0206rra @r8 ;# RRA ({mem02=0x8332} => {mem02=0xc199, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4mov #0x8333, &0x0206mov #0x0206, r10mov #0xaaaa, &0x0208rra @r10 ;# RRA ({mem03=0x8333} => {mem03=0xc199, C=1})mov r2, r11mov #0x2000, r15# Addressing mode: @Rn+#------------------------mov #0x0001, r2 ;# Test 1mov #0x7332, &0x0208mov #0x0208, r4mov #0xaaaa, &0x020Arra @r4+ ;# RRA ({mem04=0x7332} => {mem04=0x3999, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2mov #0x7333, &0x020Amov #0x020A, r6mov #0xaaaa, &0x020Crra @r6+ ;# RRA ({mem05=0x7333} => {mem05=0x3999, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3mov #0x8332, &0x020Cmov #0x020C, r8mov #0xaaaa, &0x020Erra @r8+ ;# RRA ({mem06=0x8332} => {mem06=0xc199, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4mov #0x8333, &0x020Emov #0x020E, r10mov #0xaaaa, &0x0210rra @r10+ ;# RRA ({mem07=0x8333} => {mem07=0xc199, C=1})mov r2, r11mov #0x3000, r15# Addressing mode: X(Rn)#------------------------mov #0x0001, r2 ;# Test 1mov #0x7332, &0x0210mov #0x0200, r4mov #0xaaaa, &0x0212rra 16(r4) ;# RRA ({mem08=0x7332} => {mem08=0x3999, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2mov #0x7333, &0x0212mov #0x0200, r6mov #0xaaaa, &0x0214rra 18(r6) ;# RRA ({mem09=0x7333} => {mem09=0x3999, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3mov #0x8332, &0x0214mov #0x0200, r8mov #0xaaaa, &0x0216rra 20(r8) ;# RRA ({mem0a=0x8332} => {mem0a=0xc199, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4mov #0x8333, &0x0216mov #0x0200, r10mov #0xaaaa, &0x0218rra 22(r10) ;# RRA ({mem0b=0x8333} => {mem0b=0xc199, C=1})mov r2, r11mov #0x4000, r15# Addressing mode: EDE#------------------------.set EDE_218, (__data_start+0x0018).set EDE_21A, (__data_start+0x001A).set EDE_21C, (__data_start+0x001C).set EDE_21E, (__data_start+0x001E)mov #0x0001, r2 ;# Test 1mov #0x7332, &0x0218mov #0xaaaa, &0x021Arra EDE_218 ;# RRA ({mem0c=0x7332} => {mem0c=0x3999, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2mov #0x7333, &0x021Amov #0xaaaa, &0x021Crra EDE_21A ;# RRA ({mem0d=0x7333} => {mem0d=0x3999, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3mov #0x8332, &0x021Cmov #0xaaaa, &0x021Erra EDE_21C ;# RRA ({mem0e=0x8332} => {mem0e=0xc199, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4mov #0x8333, &0x021Emov #0xaaaa, &0x0220rra EDE_21E ;# RRA ({mem0f=0x8333} => {mem0f=0xc199, C=1})mov r2, r11mov #0x5000, r15# Addressing mode: &EDE#------------------------.set aEDE_220, 0x0220.set aEDE_222, 0x0222.set aEDE_224, 0x0224.set aEDE_226, 0x0226mov #0x0001, r2 ;# Test 1mov #0x7332, &0x0220mov #0xaaaa, &0x0222rra &aEDE_220 ;# RRA ({mem10=0x7332} => {mem10=0x3999, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2mov #0x7333, &0x0222mov #0xaaaa, &0x0224rra &aEDE_222 ;# RRA ({mem11=0x7333} => {mem11=0x3999, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3mov #0x8332, &0x0224mov #0xaaaa, &0x0226rra &aEDE_224 ;# RRA ({mem12=0x8332} => {mem12=0xc199, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4mov #0x8333, &0x0226mov #0xaaaa, &0x0228rra &aEDE_226 ;# RRA ({mem13=0x8333} => {mem13=0xc199, C=1})mov r2, r11mov #0x6000, r15/* ----------------------- CLEAR MEMORY --------------------------- */mov #0x0015, r4mov #0x0200, r5clear_mem_loop:clr 0(r5)incd r5dec r4jnz clear_mem_loopmov #0x7000, r15/* -------------- TEST INSTRUCTION IN BYTE MODE ------------------- */# Addressing mode: Rn#------------------------mov #0x0001, r2 ;# Test 1mov #0xff72, r4rra.b r4 ;# RRA.B ({r4=0x32} => {r4=0x39, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2mov #0xff73, r6rra.b r6 ;# RRA.B ({r6=0x33} => {r6=0x39, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3mov #0xf082, r8rra.b r8 ;# RRA.B ({r9=0x32} => {r9=0xc1, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4mov #0xf083, r10rra.b r10 ;# RRA.B ({r10=0x33} => {r10=0xc1, C=1})mov r2, r11mov #0x8000, r15# Addressing mode: @Rn (Low Byte)#---------------------------------mov #0x0001, r2 ;# Test 1: Low Bytemov #0x2572, &0x0200mov #0x0200, r4mov #0xaaaa, &0x0202rra.b @r4 ;# RRA.B ({mem00=0x2572} => {mem00=0x2539, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2: Low Bytemov #0x2573, &0x0202mov #0x0202, r6mov #0xaaaa, &0x0204rra.b @r6 ;# RRA.B ({mem01=0x2573} => {mem01=0x2539, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3: Low Bytemov #0x2582, &0x0204mov #0x0204, r8mov #0xaaaa, &0x0206rra.b @r8 ;# RRA.B ({mem02=0x2582} => {mem02=0x25c1, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4: Low Bytemov #0x2583, &0x0206mov #0x0206, r10mov #0xaaaa, &0x0208rra.b @r10 ;# RRA.B ({mem03=0x2583} => {mem03=0x25c1, C=1})mov r2, r11mov #0x9000, r15# Addressing mode: @Rn (High Byte)#---------------------------------mov #0x0001, r2 ;# Test 1: High Bytemov #0x7225, &0x0208mov #0x0209, r4mov #0xaaaa, &0x020Arra.b @r4 ;# RRA.B ({mem04=0x7225} => {mem04=0x3925, C=0})mov r2, r6mov #0x0001, r2 ;# Test 2: High Bytemov #0x7325, &0x020Amov #0x020B, r6mov #0xaaaa, &0x020Crra.b @r6 ;# RRA.B ({mem05=0x7325} => {mem05=0x3925, C=1})mov r2, r8mov #0x0000, r2 ;# Test 3: High Bytemov #0x8225, &0x020Cmov #0x020D, r8mov #0xaaaa, &0x020Erra.b @r8 ;# RRA.B ({mem06=0x8225} => {mem06=0xc125, C=0})mov r2, r10mov #0x0000, r2 ;# Test 4: High Bytemov #0x8325, &0x020Emov #0x020F, r10mov #0xaaaa, &0x0210rra.b @r10 ;# RRA.B ({mem07=0x8325} => {mem07=0xc125, C=1})mov r2, r11mov #0x9001, r15# Addressing mode: @Rn+ (Low Byte)#---------------------------------mov #0x0001, r2 ;# Test 1: Low Bytemov #0x2572, &0x0210mov #0x0210, r4mov #0xaaaa, &0x0212rra.b @r4+ ;# RRA.B ({mem08=0x2582} => {mem08=0x2539, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2: Low Bytemov #0x2573, &0x0212mov #0x0212, r6mov #0xaaaa, &0x0214rra.b @r6+ ;# RRA.B ({mem09=0x2583} => {mem09=0x2539, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3: Low Bytemov #0x2582, &0x0214mov #0x0214, r8mov #0xaaaa, &0x0216rra.b @r8+ ;# RRA.B ({mem0a=0x2572} => {mem0a=0x25c1, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4: Low Bytemov #0x2583, &0x0216mov #0x0216, r10mov #0xaaaa, &0x0218rra.b @r10+ ;# RRA.B ({mem0b=0x2573} => {mem0b=0x25c1, C=1})mov r2, r11mov #0xA000, r15# Addressing mode: @Rn+ (High Byte)#-----------------------------------mov #0x0001, r2 ;# Test 1: High Bytemov #0x7225, &0x0218mov #0x0219, r4mov #0xaaaa, &0x021Arra.b @r4+ ;# RRA.B ({mem0c=0x7225} => {mem0c=0x3925, C=0})mov r2, r6mov #0x0001, r2 ;# Test 2: High Bytemov #0x7325, &0x021Amov #0x021B, r6mov #0xaaaa, &0x021Crra.b @r6+ ;# RRA.B ({mem0d=0x7325} => {mem0d=0x3925, C=1})mov r2, r8mov #0x0000, r2 ;# Test 3: High Bytemov #0x8225, &0x021Cmov #0x021D, r8mov #0xaaaa, &0x021Erra.b @r8+ ;# RRA.B ({mem0e=0x8225} => {mem0e=0xc125, C=0})mov r2, r10mov #0x0000, r2 ;# Test 4: High Bytemov #0x8325, &0x021Emov #0x021F, r10mov #0xaaaa, &0x0220rra.b @r10+ ;# RRA.B ({mem0f=0x8325} => {mem0f=0xc125, C=1})mov r2, r11mov #0xA001, r15# Addressing mode: X(Rn) (Low Byte)#-----------------------------------mov #0x0001, r2 ;# Test 1mov #0x2572, &0x0220mov #0x0200, r4mov #0xaaaa, &0x0222rra.b 32(r4) ;# RRA ({mem10=0x2572} => {mem10=0x2539, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2mov #0x2573, &0x0222mov #0x0200, r6mov #0xaaaa, &0x0224rra.b 34(r6) ;# RRA ({mem11=0x2573} => {mem11=0x2539, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3mov #0x2582, &0x0224mov #0x0200, r8mov #0xaaaa, &0x0226rra.b 36(r8) ;# RRA ({mem12=0x2582} => {mem12=0x25c1, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4mov #0x2583, &0x0226mov #0x0200, r10mov #0xaaaa, &0x0228rra.b 38(r10) ;# RRA ({mem13=0x2583} => {mem13=0x25c1, C=1})mov r2, r11mov #0xB000, r15# Addressing mode: X(Rn) (High Byte)#------------------------------------mov #0x0001, r2 ;# Test 1mov #0x7225, &0x0228mov #0x0200, r4mov #0xaaaa, &0x022Arra.b 41(r4) ;# RRA ({mem14=0x7225} => {mem14=0x3925, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2mov #0x7325, &0x022Amov #0x0200, r6mov #0xaaaa, &0x022Crra.b 43(r6) ;# RRA ({mem15=0x7325} => {mem15=0x3925, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3mov #0x8225, &0x022Cmov #0x0200, r8mov #0xaaaa, &0x022Erra.b 45(r8) ;# RRA ({mem16=0x8225} => {mem16=0xc125, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4mov #0x8325, &0x022Emov #0x0200, r10mov #0xaaaa, &0x0230rra.b 47(r10) ;# RRA ({mem17=0x8325} => {mem17=0xc125, C=1})mov r2, r11mov #0xB001, r15# Addressing mode: EDE (Low Byte)#---------------------------------.set EDE_230, (__data_start+0x0030).set EDE_232, (__data_start+0x0032).set EDE_234, (__data_start+0x0034).set EDE_236, (__data_start+0x0036)mov #0x0001, r2 ;# Test 1mov #0x2572, &0x0230mov #0xaaaa, &0x0232rra.b EDE_230 ;# RRA ({mem18=0x2572} => {mem18=0x2539, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2mov #0x2573, &0x0232mov #0xaaaa, &0x0234rra.b EDE_232 ;# RRA ({mem19=0x2573} => {mem19=0x2539, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3mov #0x2582, &0x0234mov #0xaaaa, &0x0236rra.b EDE_234 ;# RRA ({mem1a=0x2582} => {mem1a=0x25c1, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4mov #0x2583, &0x0236mov #0xaaaa, &0x0238rra.b EDE_236 ;# RRA ({mem1b=0x2583} => {mem1b=0x25c1, C=1})mov r2, r11mov #0xC000, r15# Addressing mode: EDE (High Byte)#----------------------------------.set EDE_239, (__data_start+0x0039).set EDE_23B, (__data_start+0x003B).set EDE_23D, (__data_start+0x003D).set EDE_23F, (__data_start+0x003F)mov #0x0001, r2 ;# Test 1mov #0x7225, &0x0238mov #0xaaaa, &0x023Arra.b EDE_239 ;# RRA ({mem1c=0x7225} => {mem1c=0x3925, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2mov #0x7325, &0x023Amov #0xaaaa, &0x023Crra.b EDE_23B ;# RRA ({mem1d=0x7325} => {mem1d=0x3925, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3mov #0x8225, &0x023Cmov #0xaaaa, &0x023Erra.b EDE_23D ;# RRA ({mem1e=0x8225} => {mem1e=0xc125, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4mov #0x8325, &0x023Emov #0xaaaa, &0x0240rra.b EDE_23F ;# RRA ({mem1f=0x8325} => {mem1f=0xc125, C=1})mov r2, r11mov #0xC001, r15# Addressing mode: &EDE (Low Byte)#----------------------------------.set aEDE_240, 0x0240.set aEDE_242, 0x0242.set aEDE_244, 0x0244.set aEDE_246, 0x0246mov #0x0001, r2 ;# Test 1mov #0x2572, &0x0240mov #0xaaaa, &0x0242rra.b &aEDE_240 ;# RRA ({mem20=0x2572} => {mem20=0x2539, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2mov #0x2573, &0x0242mov #0xaaaa, &0x0244rra.b &aEDE_242 ;# RRA ({mem21=0x2573} => {mem21=0x2539, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3mov #0x2582, &0x0244mov #0xaaaa, &0x0246rra.b &aEDE_244 ;# RRA ({mem22=0x2582} => {mem22=0x25c1, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4mov #0x2583, &0x0246mov #0xaaaa, &0x0248rra.b &aEDE_246 ;# RRA ({mem23=0x2583} => {mem23=0x25c1, C=1})mov r2, r11mov #0xD000, r15# Addressing mode: &EDE (High Byte)#-----------------------------------.set aEDE_249, 0x0249.set aEDE_24B, 0x024B.set aEDE_24D, 0x024D.set aEDE_24F, 0x024Fmov #0x0001, r2 ;# Test 1mov #0x7225, &0x0248mov #0xaaaa, &0x024Arra.b &aEDE_249 ;# RRA ({mem24=0x7225} => {mem24=0x3925, C=0})mov r2, r5mov #0x0001, r2 ;# Test 2mov #0x7325, &0x024Amov #0xaaaa, &0x024Crra.b &aEDE_24B ;# RRA ({mem25=0x7325} => {mem25=0x3925, C=1})mov r2, r7mov #0x0000, r2 ;# Test 3mov #0x8225, &0x024Cmov #0xaaaa, &0x024Erra.b &aEDE_24D ;# RRA ({mem26=0x8225} => {mem26=0xc125, C=0})mov r2, r9mov #0x0000, r2 ;# Test 4mov #0x8325, &0x024Emov #0xaaaa, &0x0250rra.b &aEDE_24F ;# RRA ({mem27=0x8325} => {mem27=0xc125, C=1})mov r2, r11mov #0xD001, r15/* ---------------------- END OF TEST --------------- */end_of_test:nopbr #0xffff/* ---------------------- INTERRUPT VECTORS --------------- */.section .vectors, "a".word end_of_test ; Interrupt 0 (lowest priority) <unused>.word end_of_test ; Interrupt 1 <unused>.word end_of_test ; Interrupt 2 <unused>.word end_of_test ; Interrupt 3 <unused>.word end_of_test ; Interrupt 4 <unused>.word end_of_test ; Interrupt 5 <unused>.word end_of_test ; Interrupt 6 <unused>.word end_of_test ; Interrupt 7 <unused>.word end_of_test ; Interrupt 8 <unused>.word end_of_test ; Interrupt 9 <unused>.word end_of_test ; Interrupt 10 Watchdog timer.word end_of_test ; Interrupt 11 <unused>.word end_of_test ; Interrupt 12 <unused>.word end_of_test ; Interrupt 13 <unused>.word end_of_test ; Interrupt 14 NMI.word main ; Interrupt 15 (highest priority) RESET
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