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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                    16 BIT PERIPHERAL TEMPLATE                             */
/*---------------------------------------------------------------------------*/
/* Test the 16 bit peripheral template:                                      */
/*                                     - Read/Write register access.         */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 111 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $          */
/*===========================================================================*/

.global main

.set   DMEM_BASE, (__data_start     )
.set   DMEM_200,  (__data_start+0x00)
.set   DMEM_202,  (__data_start+0x02)
.set   DMEM_204,  (__data_start+0x04)
.set   DMEM_206,  (__data_start+0x06)
.set   DMEM_208,  (__data_start+0x08)
.set   DMEM_20A,  (__data_start+0x0A)
.set   DMEM_20C,  (__data_start+0x0C)
.set   DMEM_20E,  (__data_start+0x0E)
.set   DMEM_210,  (__data_start+0x10)
.set   DMEM_212,  (__data_start+0x12)
.set   DMEM_214,  (__data_start+0x14)
.set   DMEM_216,  (__data_start+0x16)

.set   UNUSED_0,  (DMEM_BASE-0x0070-0x0002)
.set   CNTRL1,    (DMEM_BASE-0x0070+0x0000)
.set   CNTRL2,    (DMEM_BASE-0x0070+0x0002)
.set   CNTRL3,    (DMEM_BASE-0x0070+0x0004)
.set   CNTRL4,    (DMEM_BASE-0x0070+0x0006)
.set   UNUSED_1,  (DMEM_BASE-0x0070-0x0008)

main:
        /* --------------     TEST RD/WR REGISTER ACCESS     --------------- */

        mov   #0x1234,  &UNUSED_0       ; UNUSED 0
        mov &UNUSED_0,  &DMEM_200
        mov   #0x5678,  &UNUSED_0
        mov &UNUSED_0,  &DMEM_202

        mov   #0x5555,  &CNTRL1         ; CNTRL1
        mov   &CNTRL1,  &DMEM_204
        mov   #0xaaaa,  &CNTRL1
        mov   &CNTRL1,  &DMEM_206

        mov   #0xaaaa,  &CNTRL2         ; CNTRL2
        mov   &CNTRL2,  &DMEM_208
        mov   #0x5555,  &CNTRL2
        mov   &CNTRL2,  &DMEM_20A

        mov   #0x55aa,  &CNTRL3         ; CNTRL3
        mov   &CNTRL3,  &DMEM_20C
        mov   #0xaa55,  &CNTRL3
        mov   &CNTRL3,  &DMEM_20E

        mov   #0xaa55,  &CNTRL4         ; CNTRL4
        mov   &CNTRL4,  &DMEM_210
        mov   #0x55aa,  &CNTRL4
        mov   &CNTRL4,  &DMEM_212

        mov   #0x8765,  &UNUSED_1       ; UNUSED 1
        mov &UNUSED_1,  &DMEM_214
        mov   #0x4321,  &UNUSED_1
        mov &UNUSED_1,  &DMEM_216
        
        mov   #0x0001, r15



        /* ----------------------         END OF TEST        --------------- */
end_of_test:
        nop
        br #0xffff


        /* ----------------------         INTERRUPT VECTORS  --------------- */

.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    <unused>
.word end_of_test  ; Interrupt  1                      <unused>
.word end_of_test  ; Interrupt  2                      <unused>
.word end_of_test  ; Interrupt  3                      <unused>
.word end_of_test  ; Interrupt  4                      <unused>
.word end_of_test  ; Interrupt  5                      <unused>
.word end_of_test  ; Interrupt  6                      <unused>
.word end_of_test  ; Interrupt  7                      <unused>
.word end_of_test  ; Interrupt  8                      <unused>
.word end_of_test  ; Interrupt  9                      <unused>
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      <unused>
.word end_of_test  ; Interrupt 12                      <unused>
.word end_of_test  ; Interrupt 13                      <unused>
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET