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/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                 TWO-OPERAND ARITHMETIC: ADDC[.B] INSTRUCTION              */
/*---------------------------------------------------------------------------*/
/* Test the ADDC[.B] instruction.                                            */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 19 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
/*===========================================================================*/


.global main

main:
        /* -------------- TEST INSTRUCTION IN WORD MODE ------------------- */

        # Test standard ADD without Carry bit set
        mov     #0x0000, r2
        mov     #0x4444, r4
        mov     #0x5555, r5
        add          r4, r5        ;# Add r4+r5 (0x4444+0x5555=0x9999)

        # Test standard ADD withCarry bit set
        mov     #0x0001, r2
        mov     #0x6666, r4
        mov     #0x7777, r6
        add          r4, r6        ;# Add r4+r6 (0x6666+0x7777=0xdddd)


        # Test standard ADDC without Carry bit set
        mov     #0x0000, r2
        mov     #0x8888, r4
        mov     #0x9999, r7
        addc         r4, r7        ;# Add r4+r7+c (0x8888+0x9999=0x2221)

        # Test standard ADDC with Carry bit set
        mov     #0x0001, r2
        mov     #0xaaaa, r4
        mov     #0xbbbb, r8
        addc         r4, r8        ;# Add r4+r8+C (0xaaaa+0xbbbb=0x6666)


        mov     #0x1000, r15


        /* -------------- TEST INSTRUCTION IN BYTE MODE ------------------- */

        # Test standard ADD with and without Carry bit set
        mov     #0x0000, r2
        mov     #0x4444, r4
        mov     #0x5555, r5
        add.b        r4, r5        ;# Add r4+r5 (0x0044+0x0055=0x0099)

        # Test standard ADD with and with Carry bit set
        mov     #0x0001, r2
        mov     #0x6666, r4
        mov     #0x6677, r6
        add.b        r4, r6        ;# Add r4+r6 (0x0066+0x0077=0x00dd)


        # Test standard ADDC with and without Carry bit set
        mov     #0x0000, r2
        mov     #0x8888, r4
        mov     #0x9999, r7
        addc.b       r4, r7        ;# Add r4+r5+c (0x0088+0x0099=0x0021)

        # Test standard ADDC with and with Carry bit set
        mov     #0x0001, r2
        mov     #0xaaaa, r4
        mov     #0xbbbb, r8
        addc.b       r4, r8        ;# Add r4+r6+C (0x00aa+0x00bb=0x0066)


        mov     #0x2000, r15


        /* ------------------ TEST FLAGS IN WORD MODE ---------------------- */

        mov     #0x0000, r2        ;# V=0, N=0, Z=0, C=0
        mov     #0x0444, r4        ;#
        mov     #0x0555, r5        ;#
        addc         r4, r5        ;# Add r4+r5 (0x0444+0x0555=0x0999)
        mov     #0x3000, r15

        mov     #0x0000, r2        ;# V=0, N=0, Z=0, C=1
        mov     #0x0011, r4        ;#
        mov     #0xfff0, r5        ;#
        addc         r4, r5        ;# Add r4+r5 (0xfff0+0x0011=0x0001)
        mov     #0x3001, r15

        mov     #0x0000, r2        ;# V=0, N=0, Z=1, C=0
        mov     #0x0000, r4        ;#
        mov     #0x0000, r5        ;#
        addc         r4, r5        ;# Add r4+r5 (0x0000+0x0000=0x0000)
        mov     #0x3002, r15

        mov     #0x0000, r2        ;# V=0, N=1, Z=0, C=0
        mov     #0xff00, r4        ;#
        mov     #0x0010, r5        ;#
        addc         r4, r5        ;# Add r4+r5 (0xff00+0x0010=0xff10)
        mov     #0x3003, r15

        mov     #0x0000, r2        ;# V=1, N=1, Z=0, C=0
        mov     #0x7fff, r4        ;#
        mov     #0x0010, r5        ;#
        addc         r4, r5        ;# Add r4+r5 (0x7fff+0x0010=0x800f)
        mov     #0x3004, r15

        mov     #0x0000, r2        ;# V=1, N=0, Z=0, C=1
        mov     #0xff00, r4        ;#
        mov     #0x8000, r5        ;#
        addc         r4, r5        ;# Add r4+r5 (0xff00+0x8000=0x7f00)
        mov     #0x3005, r15


        /* ------------------ TEST FLAGS IN BYTE MODE --------------------- */

        mov     #0x0000, r2        ;# V=0, N=0, Z=0, C=0
        mov     #0xaa04, r4        ;#
        mov     #0x6605, r5        ;#
        addc.b       r4, r5        ;# Add r4+r5 (0xaa04+0x6605=0x0009)
        mov     #0x4000, r15

        mov     #0x0000, r2        ;# V=0, N=0, Z=0, C=1
        mov     #0xaa11, r4        ;#
        mov     #0x66f0, r5        ;#
        addc.b       r4, r5        ;# Add r4+r5 (0x0011+0x00f0=0x0001)
        mov     #0x4001, r15

        mov     #0x0000, r2        ;# V=0, N=0, Z=1, C=0
        mov     #0xaa00, r4        ;#
        mov     #0x6600, r5        ;#
        addc.b       r4, r5        ;# Add r4+r5 (0x0000+0x0000=0x0000)
        mov     #0x4002, r15

        mov     #0x0000, r2        ;# V=0, N=1, Z=0, C=0
        mov     #0xaaf0, r4        ;#
        mov     #0x6603, r5        ;#
        addc.b       r4, r5        ;# Add r4+r5 (0x00f0+0x0003=0x00f3)
        mov     #0x4003, r15

        mov     #0x0000, r2        ;# V=1, N=1, Z=0, C=0
        mov     #0x007f, r4        ;#
        mov     #0x0010, r5        ;#
        addc.b       r4, r5        ;# Add r4+r5 (0x007f+0x0010=0x008f)
        mov     #0x4004, r15

        mov     #0x0000, r2        ;# V=1, N=0, Z=0, C=1
        mov     #0x00ff, r4        ;#
        mov     #0x0080, r5        ;#
        addc.b       r4, r5        ;# Add r4+r5 (0x00ff+0x0080=0x007f)
        mov     #0x4005, r15


        /* ----------------------         END OF TEST        --------------- */
        mov     #0x5000, r15
end_of_test:
        nop
        br #0xffff



        /* ----------------------         INTERRUPT VECTORS  --------------- */

.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    <unused>
.word end_of_test  ; Interrupt  1                      <unused>
.word end_of_test  ; Interrupt  2                      <unused>
.word end_of_test  ; Interrupt  3                      <unused>
.word end_of_test  ; Interrupt  4                      <unused>
.word end_of_test  ; Interrupt  5                      <unused>
.word end_of_test  ; Interrupt  6                      <unused>
.word end_of_test  ; Interrupt  7                      <unused>
.word end_of_test  ; Interrupt  8                      <unused>
.word end_of_test  ; Interrupt  9                      <unused>
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      <unused>
.word end_of_test  ; Interrupt 12                      <unused>
.word end_of_test  ; Interrupt 13                      <unused>
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET