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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [two-op_autoincr-b.s43] - Rev 137
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/*===========================================================================*/
/* Copyright (C) 2001 Authors */
/* */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer. */
/* */
/* This source file is free software; you can redistribute it and/or modify */
/* it under the terms of the GNU Lesser General Public License as published */
/* by the Free Software Foundation; either version 2.1 of the License, or */
/* (at your option) any later version. */
/* */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public */
/* License for more details. */
/* */
/* You should have received a copy of the GNU Lesser General Public License */
/* along with this source; if not, write to the Free Software Foundation, */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
/* */
/*===========================================================================*/
/* TWO-OPERAND ARITHMETIC: MOV INSTRUCTION */
/*---------------------------------------------------------------------------*/
/* Test the MOV instruction with all addressing modes */
/* */
/* Author(s): */
/* - Olivier Girard, olgirard@gmail.com */
/* */
/*---------------------------------------------------------------------------*/
/* $Rev: 19 $ */
/* $LastChangedBy: olivier.girard $ */
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $ */
/*===========================================================================*/
.set DMEM_BASE, (__data_start )
.set DMEM_200, (__data_start+0x00)
.set DMEM_202, (__data_start+0x02)
.set DMEM_204, (__data_start+0x04)
.set DMEM_206, (__data_start+0x06)
.set DMEM_208, (__data_start+0x08)
.set DMEM_20A, (__data_start+0x0A)
.set DMEM_20C, (__data_start+0x0C)
.set DMEM_20E, (__data_start+0x0E)
.set DMEM_210, (__data_start+0x10)
.set DMEM_212, (__data_start+0x12)
.set DMEM_214, (__data_start+0x14)
.set DMEM_216, (__data_start+0x16)
.set DMEM_218, (__data_start+0x18)
.set DMEM_21A, (__data_start+0x1A)
.set DMEM_21C, (__data_start+0x1C)
.set DMEM_21E, (__data_start+0x1E)
.set DMEM_220, (__data_start+0x20)
.set DMEM_222, (__data_start+0x22)
.global main
main:
/* ---------------------- INITIALIZE MEMORY --------------------- */
mov #0x0000, &DMEM_200
mov #0x1020, &DMEM_202
mov #0x1122, &DMEM_204
mov #0x3344, &DMEM_206
mov #0x5566, &DMEM_208
mov #0x7788, &DMEM_20A
mov #0x99AA, &DMEM_20C
mov #0xBBCC, &DMEM_20E
mov #0xDDEE, &DMEM_210
mov #0xFF21, &DMEM_212
mov #0x1223, &DMEM_214
mov #0x3445, &DMEM_216
mov #0x5667, &DMEM_218
mov #0x7889, &DMEM_21A
mov #0x9AAB, &DMEM_21C
mov #0xBCCD, &DMEM_21E
mov #0xDEEF, &DMEM_220
mov #0xF001, &DMEM_222
mov #0x0001, &DMEM_200
/* ---------------------- AUTO-INCREMENT: R1 --------------------- */
/* */
/* NOTE: it increment by 2 even in byte mode */
mov #DMEM_204, r1
mov #0x0000, r2
mov #0x0000, r3
mov #0x0000, r4
mov #0x0000, r5
mov #0x0000, r6
mov #0x0000, r7
mov #0x0000, r8
mov #0x0000, r9
mov #0x0000, r10
mov #0x0000, r11
mov #0x0000, r12
mov #0x0000, r13
mov #0x0000, r14
mov #0x0000, r15
mov #0x1000, &DMEM_200
mov.b @r1+, &DMEM_202
mov #0x1001, &DMEM_200
mov.b @r1+, &DMEM_202
mov #0x1002, &DMEM_200
mov #0x0000, &DMEM_202
/* ---------------------- AUTO-INCREMENT: R2 --------------------- */
mov #0x0000, r1
mov #0x0004, r2
mov #0x0000, r3
mov #0x0000, r4
mov #0x0000, r5
mov #0x0000, r6
mov #0x0000, r7
mov #0x0000, r8
mov #0x0000, r9
mov #0x0000, r10
mov #0x0000, r11
mov #0x0000, r12
mov #0x0000, r13
mov #0x0000, r14
mov #0x0000, r15
mov #0x2000, &DMEM_200
mov.b @r2+, &DMEM_202
mov #0x2001, &DMEM_200
mov.b @r2+, &DMEM_202
mov #0x2002, &DMEM_200
mov #0x0000, &DMEM_202
/* ---------------------- AUTO-INCREMENT: R3 --------------------- */
mov #0x0000, r1
mov #0x0000, r2
mov #DMEM_208, r3
mov #0x0000, r4
mov #0x0000, r5
mov #0x0000, r6
mov #0x0000, r7
mov #0x0000, r8
mov #0x0000, r9
mov #0x0000, r10
mov #0x0000, r11
mov #0x0000, r12
mov #0x0000, r13
mov #0x0000, r14
mov #0x0000, r15
mov #0x3000, &DMEM_200
mov.b @r3+, &DMEM_202
mov #0x3001, &DMEM_200
mov.b @r3+, &DMEM_202
mov #0x3002, &DMEM_200
swpb @r3+
mov #0x0000, &DMEM_202
/* ---------------------- AUTO-INCREMENT: R4 --------------------- */
mov #0x0000, r1
mov #0x0000, r2
mov #0x0000, r3
mov #DMEM_20A, r4
mov #0x0000, r5
mov #0x0000, r6
mov #0x0000, r7
mov #0x0000, r8
mov #0x0000, r9
mov #0x0000, r10
mov #0x0000, r11
mov #0x0000, r12
mov #0x0000, r13
mov #0x0000, r14
mov #0x0000, r15
mov #0x4000, &DMEM_200
mov.b @r4+, &DMEM_202
mov #0x4001, &DMEM_200
mov.b @r4+, &DMEM_202
mov #0x4002, &DMEM_200
mov #0x0000, &DMEM_202
/* ---------------------- AUTO-INCREMENT: R5 --------------------- */
mov #0x0000, r1
mov #0x0000, r2
mov #0x0000, r3
mov #0x0000, r4
mov #DMEM_20C, r5
mov #0x0000, r6
mov #0x0000, r7
mov #0x0000, r8
mov #0x0000, r9
mov #0x0000, r10
mov #0x0000, r11
mov #0x0000, r12
mov #0x0000, r13
mov #0x0000, r14
mov #0x0000, r15
mov #0x5000, &DMEM_200
mov.b @r5+, &DMEM_202
mov #0x5001, &DMEM_200
mov.b @r5+, &DMEM_202
mov #0x5002, &DMEM_200
mov #0x0000, &DMEM_202
/* ---------------------- AUTO-INCREMENT: R6 --------------------- */
mov #0x0000, r1
mov #0x0000, r2
mov #0x0000, r3
mov #0x0000, r4
mov #0x0000, r5
mov #DMEM_20E, r6
mov #0x0000, r7
mov #0x0000, r8
mov #0x0000, r9
mov #0x0000, r10
mov #0x0000, r11
mov #0x0000, r12
mov #0x0000, r13
mov #0x0000, r14
mov #0x0000, r15
mov #0x6000, &DMEM_200
mov.b @r6+, &DMEM_202
mov #0x6001, &DMEM_200
mov.b @r6+, &DMEM_202
mov #0x6002, &DMEM_200
mov #0x0000, &DMEM_202
/* ---------------------- AUTO-INCREMENT: R7 --------------------- */
mov #0x0000, r1
mov #0x0000, r2
mov #0x0000, r3
mov #0x0000, r4
mov #0x0000, r5
mov #0x0000, r6
mov #DMEM_210, r7
mov #0x0000, r8
mov #0x0000, r9
mov #0x0000, r10
mov #0x0000, r11
mov #0x0000, r12
mov #0x0000, r13
mov #0x0000, r14
mov #0x0000, r15
mov #0x7000, &DMEM_200
mov.b @r7+, &DMEM_202
mov #0x7001, &DMEM_200
mov.b @r7+, &DMEM_202
mov #0x7002, &DMEM_200
mov #0x0000, &DMEM_202
/* ---------------------- AUTO-INCREMENT: R8 --------------------- */
mov #0x0000, r1
mov #0x0000, r2
mov #0x0000, r3
mov #0x0000, r4
mov #0x0000, r5
mov #0x0000, r6
mov #0x0000, r7
mov #DMEM_212, r8
mov #0x0000, r9
mov #0x0000, r10
mov #0x0000, r11
mov #0x0000, r12
mov #0x0000, r13
mov #0x0000, r14
mov #0x0000, r15
mov #0x8000, &DMEM_200
mov.b @r8+, &DMEM_202
mov #0x8001, &DMEM_200
mov.b @r8+, &DMEM_202
mov #0x8002, &DMEM_200
mov #0x0000, &DMEM_202
/* ---------------------- AUTO-INCREMENT: R9 --------------------- */
mov #0x0000, r1
mov #0x0000, r2
mov #0x0000, r3
mov #0x0000, r4
mov #0x0000, r5
mov #0x0000, r6
mov #0x0000, r7
mov #0x0000, r8
mov #DMEM_214, r9
mov #0x0000, r10
mov #0x0000, r11
mov #0x0000, r12
mov #0x0000, r13
mov #0x0000, r14
mov #0x0000, r15
mov #0x9000, &DMEM_200
mov.b @r9+, &DMEM_202
mov #0x9001, &DMEM_200
mov.b @r9+, &DMEM_202
mov #0x9002, &DMEM_200
mov #0x0000, &DMEM_202
/* ---------------------- AUTO-INCREMENT: R10 --------------------- */
mov #0x0000, r1
mov #0x0000, r2
mov #0x0000, r3
mov #0x0000, r4
mov #0x0000, r5
mov #0x0000, r6
mov #0x0000, r7
mov #0x0000, r8
mov #0x0000, r9
mov #DMEM_216, r10
mov #0x0000, r11
mov #0x0000, r12
mov #0x0000, r13
mov #0x0000, r14
mov #0x0000, r15
mov #0xA000, &DMEM_200
mov.b @r10+, &DMEM_202
mov #0xA001, &DMEM_200
mov.b @r10+, &DMEM_202
mov #0xA002, &DMEM_200
mov #0x0000, &DMEM_202
/* ---------------------- AUTO-INCREMENT: R11 --------------------- */
mov #0x0000, r1
mov #0x0000, r2
mov #0x0000, r3
mov #0x0000, r4
mov #0x0000, r5
mov #0x0000, r6
mov #0x0000, r7
mov #0x0000, r8
mov #0x0000, r9
mov #0x0000, r10
mov #DMEM_218, r11
mov #0x0000, r12
mov #0x0000, r13
mov #0x0000, r14
mov #0x0000, r15
mov #0xB000, &DMEM_200
mov.b @r11+, &DMEM_202
mov #0xB001, &DMEM_200
mov.b @r11+, &DMEM_202
mov #0xB002, &DMEM_200
mov #0x0000, &DMEM_202
/* ---------------------- AUTO-INCREMENT: R12 --------------------- */
mov #0x0000, r1
mov #0x0000, r2
mov #0x0000, r3
mov #0x0000, r4
mov #0x0000, r5
mov #0x0000, r6
mov #0x0000, r7
mov #0x0000, r8
mov #0x0000, r9
mov #0x0000, r10
mov #0x0000, r11
mov #DMEM_21A, r12
mov #0x0000, r13
mov #0x0000, r14
mov #0x0000, r15
mov #0xC000, &DMEM_200
mov.b @r12+, &DMEM_202
mov #0xC001, &DMEM_200
mov.b @r12+, &DMEM_202
mov #0xC002, &DMEM_200
mov #0x0000, &DMEM_202
/* ---------------------- AUTO-INCREMENT: R13 --------------------- */
mov #0x0000, r1
mov #0x0000, r2
mov #0x0000, r3
mov #0x0000, r4
mov #0x0000, r5
mov #0x0000, r6
mov #0x0000, r7
mov #0x0000, r8
mov #0x0000, r9
mov #0x0000, r10
mov #0x0000, r11
mov #0x0000, r12
mov #DMEM_21C, r13
mov #0x0000, r14
mov #0x0000, r15
mov #0xD000, &DMEM_200
mov.b @r13+, &DMEM_202
mov #0xD001, &DMEM_200
mov.b @r13+, &DMEM_202
mov #0xD002, &DMEM_200
mov #0x0000, &DMEM_202
/* ---------------------- AUTO-INCREMENT: R14 --------------------- */
mov #0x0000, r1
mov #0x0000, r2
mov #0x0000, r3
mov #0x0000, r4
mov #0x0000, r5
mov #0x0000, r6
mov #0x0000, r7
mov #0x0000, r8
mov #0x0000, r9
mov #0x0000, r10
mov #0x0000, r11
mov #0x0000, r12
mov #0x0000, r13
mov #DMEM_21E, r14
mov #0x0000, r15
mov #0xE000, &DMEM_200
mov.b @r14+, &DMEM_202
mov #0xE001, &DMEM_200
mov.b @r14+, &DMEM_202
mov #0xE002, &DMEM_200
mov #0x0000, &DMEM_202
/* ---------------------- AUTO-INCREMENT: R15 --------------------- */
mov #0x0000, r1
mov #0x0000, r2
mov #0x0000, r3
mov #0x0000, r4
mov #0x0000, r5
mov #0x0000, r6
mov #0x0000, r7
mov #0x0000, r8
mov #0x0000, r9
mov #0x0000, r10
mov #0x0000, r11
mov #0x0000, r12
mov #0x0000, r13
mov #0x0000, r14
mov #DMEM_220, r15
mov #0xF000, &DMEM_200
mov.b @r15+, &DMEM_202
mov #0xF001, &DMEM_200
mov.b @r15+, &DMEM_202
mov #0xF002, &DMEM_200
mov #0x0000, &DMEM_202
/* ---------------------- END OF TEST --------------- */
end_of_test:
nop
br #0xffff
/* ---------------------- INTERRUPT VECTORS --------------- */
.section .vectors, "a"
.word end_of_test ; Interrupt 0 (lowest priority) <unused>
.word end_of_test ; Interrupt 1 <unused>
.word end_of_test ; Interrupt 2 <unused>
.word end_of_test ; Interrupt 3 <unused>
.word end_of_test ; Interrupt 4 <unused>
.word end_of_test ; Interrupt 5 <unused>
.word end_of_test ; Interrupt 6 <unused>
.word end_of_test ; Interrupt 7 <unused>
.word end_of_test ; Interrupt 8 <unused>
.word end_of_test ; Interrupt 9 <unused>
.word end_of_test ; Interrupt 10 Watchdog timer
.word end_of_test ; Interrupt 11 <unused>
.word end_of_test ; Interrupt 12 <unused>
.word end_of_test ; Interrupt 13 <unused>
.word end_of_test ; Interrupt 14 NMI
.word main ; Interrupt 15 (highest priority) RESET
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