OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [two-op_autoincr.s43] - Rev 141

Compare with Previous | Blame | View Log 

/*===========================================================================*/
/* Copyright (C) 2001 Authors                                                */
/*                                                                           */
/* This source file may be used and distributed without restriction provided */
/* that this copyright statement is not removed from the file and that any   */
/* derivative work contains the original copyright notice and the associated */
/* disclaimer.                                                               */
/*                                                                           */
/* This source file is free software; you can redistribute it and/or modify  */
/* it under the terms of the GNU Lesser General Public License as published  */
/* by the Free Software Foundation; either version 2.1 of the License, or    */
/* (at your option) any later version.                                       */
/*                                                                           */
/* This source is distributed in the hope that it will be useful, but WITHOUT*/
/* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or     */
/* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public       */
/* License for more details.                                                 */
/*                                                                           */
/* You should have received a copy of the GNU Lesser General Public License  */
/* along with this source; if not, write to the Free Software Foundation,    */
/* Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA        */
/*                                                                           */
/*===========================================================================*/
/*                   TWO-OPERAND ARITHMETIC: MOV INSTRUCTION                 */
/*---------------------------------------------------------------------------*/
/* Test the MOV instruction with all addressing modes                        */
/*                                                                           */
/* Author(s):                                                                */
/*             - Olivier Girard,    olgirard@gmail.com                       */
/*                                                                           */
/*---------------------------------------------------------------------------*/
/* $Rev: 19 $                                                                */
/* $LastChangedBy: olivier.girard $                                          */
/* $LastChangedDate: 2009-08-04 23:47:15 +0200 (Tue, 04 Aug 2009) $          */
/*===========================================================================*/

.include "pmem_defs.asm"
        
.global main

main:
        /* ---------------------- INITIALIZE MEMORY --------------------- */

        mov     #0x0000,    &DMEM_200
        mov     #0x0000,    &DMEM_202
        mov     #0x1111,    &DMEM_204
        mov     #0x2222,    &DMEM_206
        mov     #0x3333,    &DMEM_208
        mov     #0x4444,    &DMEM_20A
        mov     #0x5555,    &DMEM_20C
        mov     #0x6666,    &DMEM_20E
        mov     #0x7777,    &DMEM_210
        mov     #0x8888,    &DMEM_212
        mov     #0x9999,    &DMEM_214
        mov     #0xAAAA,    &DMEM_216
        mov     #0xBBBB,    &DMEM_218
        mov     #0xCCCC,    &DMEM_21A
        mov     #0xDDDD,    &DMEM_21C
        mov     #0xEEEE,    &DMEM_21E
        mov     #0xFFFF,    &DMEM_220
        mov     #0x1122,    &DMEM_222

        mov     #0x0001,    &DMEM_200

        /* ---------------------- AUTO-INCREMENT: R1 --------------------- */

        mov     #DMEM_204,  r1
        mov     #0x0000,    r2
        mov     #0x0000,    r3
        mov     #0x0000,    r4
        mov     #0x0000,    r5
        mov     #0x0000,    r6
        mov     #0x0000,    r7
        mov     #0x0000,    r8
        mov     #0x0000,    r9
        mov     #0x0000,    r10
        mov     #0x0000,    r11
        mov     #0x0000,    r12
        mov     #0x0000,    r13
        mov     #0x0000,    r14
        mov     #0x0000,    r15

        mov     #0x1000,    &DMEM_200
        mov        @r1+,    &DMEM_202
        mov     #0x1001,    &DMEM_200
        mov        @r1+,    &DMEM_202
        mov     #0x1002,    &DMEM_200
        mov     #0x0000,    &DMEM_202

        /* ---------------------- AUTO-INCREMENT: R2 --------------------- */

        mov     #0x0000,    r1
        mov     #0x0004,    r2
        mov     #0x0000,    r3
        mov     #0x0000,    r4
        mov     #0x0000,    r5
        mov     #0x0000,    r6
        mov     #0x0000,    r7
        mov     #0x0000,    r8
        mov     #0x0000,    r9
        mov     #0x0000,    r10
        mov     #0x0000,    r11
        mov     #0x0000,    r12
        mov     #0x0000,    r13
        mov     #0x0000,    r14
        mov     #0x0000,    r15

        mov     #0x2000,    &DMEM_200
        mov        @r2+,    &DMEM_202
        mov     #0x2001,    &DMEM_200
        mov        @r2+,    &DMEM_202
        mov     #0x2002,    &DMEM_200
        mov     #0x0000,    &DMEM_202

        /* ---------------------- AUTO-INCREMENT: R3 --------------------- */

        mov     #0x0000,    r1
        mov     #0x0000,    r2
        mov     #DMEM_208,  r3
        mov     #0x0000,    r4
        mov     #0x0000,    r5
        mov     #0x0000,    r6
        mov     #0x0000,    r7
        mov     #0x0000,    r8
        mov     #0x0000,    r9
        mov     #0x0000,    r10
        mov     #0x0000,    r11
        mov     #0x0000,    r12
        mov     #0x0000,    r13
        mov     #0x0000,    r14
        mov     #0x0000,    r15

        mov     #0x3000,    &DMEM_200
        mov        @r3+,    &DMEM_202
        mov     #0x3001,    &DMEM_200
        mov        @r3+,    &DMEM_202
        mov     #0x3002,    &DMEM_200
        swpb       @r3+
        mov     #0x0000,    &DMEM_202

        /* ---------------------- AUTO-INCREMENT: R4 --------------------- */

        mov     #0x0000,    r1
        mov     #0x0000,    r2
        mov     #0x0000,    r3
        mov     #DMEM_20A,  r4
        mov     #0x0000,    r5
        mov     #0x0000,    r6
        mov     #0x0000,    r7
        mov     #0x0000,    r8
        mov     #0x0000,    r9
        mov     #0x0000,    r10
        mov     #0x0000,    r11
        mov     #0x0000,    r12
        mov     #0x0000,    r13
        mov     #0x0000,    r14
        mov     #0x0000,    r15

        mov     #0x4000,    &DMEM_200
        mov        @r4+,    &DMEM_202
        mov     #0x4001,    &DMEM_200
        mov        @r4+,    &DMEM_202
        mov     #0x4002,    &DMEM_200
        mov     #0x0000,    &DMEM_202

        /* ---------------------- AUTO-INCREMENT: R5 --------------------- */

        mov     #0x0000,    r1
        mov     #0x0000,    r2
        mov     #0x0000,    r3
        mov     #0x0000,    r4
        mov     #DMEM_20C,  r5
        mov     #0x0000,    r6
        mov     #0x0000,    r7
        mov     #0x0000,    r8
        mov     #0x0000,    r9
        mov     #0x0000,    r10
        mov     #0x0000,    r11
        mov     #0x0000,    r12
        mov     #0x0000,    r13
        mov     #0x0000,    r14
        mov     #0x0000,    r15

        mov     #0x5000,    &DMEM_200
        mov        @r5+,    &DMEM_202
        mov     #0x5001,    &DMEM_200
        mov        @r5+,    &DMEM_202
        mov     #0x5002,    &DMEM_200
        mov     #0x0000,    &DMEM_202

        /* ---------------------- AUTO-INCREMENT: R6 --------------------- */

        mov     #0x0000,    r1
        mov     #0x0000,    r2
        mov     #0x0000,    r3
        mov     #0x0000,    r4
        mov     #0x0000,    r5
        mov     #DMEM_20E,  r6
        mov     #0x0000,    r7
        mov     #0x0000,    r8
        mov     #0x0000,    r9
        mov     #0x0000,    r10
        mov     #0x0000,    r11
        mov     #0x0000,    r12
        mov     #0x0000,    r13
        mov     #0x0000,    r14
        mov     #0x0000,    r15

        mov     #0x6000,    &DMEM_200
        mov        @r6+,    &DMEM_202
        mov     #0x6001,    &DMEM_200
        mov        @r6+,    &DMEM_202
        mov     #0x6002,    &DMEM_200
        mov     #0x0000,    &DMEM_202

        /* ---------------------- AUTO-INCREMENT: R7 --------------------- */

        mov     #0x0000,    r1
        mov     #0x0000,    r2
        mov     #0x0000,    r3
        mov     #0x0000,    r4
        mov     #0x0000,    r5
        mov     #0x0000,    r6
        mov     #DMEM_210,  r7
        mov     #0x0000,    r8
        mov     #0x0000,    r9
        mov     #0x0000,    r10
        mov     #0x0000,    r11
        mov     #0x0000,    r12
        mov     #0x0000,    r13
        mov     #0x0000,    r14
        mov     #0x0000,    r15

        mov     #0x7000,    &DMEM_200
        mov        @r7+,    &DMEM_202
        mov     #0x7001,    &DMEM_200
        mov        @r7+,    &DMEM_202
        mov     #0x7002,    &DMEM_200
        mov     #0x0000,    &DMEM_202

        /* ---------------------- AUTO-INCREMENT: R8 --------------------- */

        mov     #0x0000,    r1
        mov     #0x0000,    r2
        mov     #0x0000,    r3
        mov     #0x0000,    r4
        mov     #0x0000,    r5
        mov     #0x0000,    r6
        mov     #0x0000,    r7
        mov     #DMEM_212,  r8
        mov     #0x0000,    r9
        mov     #0x0000,    r10
        mov     #0x0000,    r11
        mov     #0x0000,    r12
        mov     #0x0000,    r13
        mov     #0x0000,    r14
        mov     #0x0000,    r15

        mov     #0x8000,    &DMEM_200
        mov        @r8+,    &DMEM_202
        mov     #0x8001,    &DMEM_200
        mov        @r8+,    &DMEM_202
        mov     #0x8002,    &DMEM_200
        mov     #0x0000,    &DMEM_202

        /* ---------------------- AUTO-INCREMENT: R9 --------------------- */

        mov     #0x0000,    r1
        mov     #0x0000,    r2
        mov     #0x0000,    r3
        mov     #0x0000,    r4
        mov     #0x0000,    r5
        mov     #0x0000,    r6
        mov     #0x0000,    r7
        mov     #0x0000,    r8
        mov     #DMEM_214,  r9
        mov     #0x0000,    r10
        mov     #0x0000,    r11
        mov     #0x0000,    r12
        mov     #0x0000,    r13
        mov     #0x0000,    r14
        mov     #0x0000,    r15

        mov     #0x9000,    &DMEM_200
        mov         @r9+,   &DMEM_202
        mov     #0x9001,    &DMEM_200
        mov         @r9+,   &DMEM_202
        mov     #0x9002,    &DMEM_200
        mov     #0x0000,    &DMEM_202

        /* ---------------------- AUTO-INCREMENT: R10 --------------------- */

        mov     #0x0000,    r1
        mov     #0x0000,    r2
        mov     #0x0000,    r3
        mov     #0x0000,    r4
        mov     #0x0000,    r5
        mov     #0x0000,    r6
        mov     #0x0000,    r7
        mov     #0x0000,    r8
        mov     #0x0000,    r9
        mov     #DMEM_216,  r10
        mov     #0x0000,    r11
        mov     #0x0000,    r12
        mov     #0x0000,    r13
        mov     #0x0000,    r14
        mov     #0x0000,    r15

        mov     #0xA000,    &DMEM_200
        mov       @r10+,    &DMEM_202
        mov     #0xA001,    &DMEM_200
        mov       @r10+,    &DMEM_202
        mov     #0xA002,    &DMEM_200
        mov     #0x0000,    &DMEM_202

        /* ---------------------- AUTO-INCREMENT: R11 --------------------- */

        mov     #0x0000,    r1
        mov     #0x0000,    r2
        mov     #0x0000,    r3
        mov     #0x0000,    r4
        mov     #0x0000,    r5
        mov     #0x0000,    r6
        mov     #0x0000,    r7
        mov     #0x0000,    r8
        mov     #0x0000,    r9
        mov     #0x0000,    r10
        mov     #DMEM_218,  r11
        mov     #0x0000,    r12
        mov     #0x0000,    r13
        mov     #0x0000,    r14
        mov     #0x0000,    r15

        mov     #0xB000,    &DMEM_200
        mov       @r11+,    &DMEM_202
        mov     #0xB001,    &DMEM_200
        mov       @r11+,    &DMEM_202
        mov     #0xB002,    &DMEM_200
        mov     #0x0000,    &DMEM_202

        /* ---------------------- AUTO-INCREMENT: R12 --------------------- */

        mov     #0x0000,    r1
        mov     #0x0000,    r2
        mov     #0x0000,    r3
        mov     #0x0000,    r4
        mov     #0x0000,    r5
        mov     #0x0000,    r6
        mov     #0x0000,    r7
        mov     #0x0000,    r8
        mov     #0x0000,    r9
        mov     #0x0000,    r10
        mov     #0x0000,    r11
        mov     #DMEM_21A,  r12
        mov     #0x0000,    r13
        mov     #0x0000,    r14
        mov     #0x0000,    r15

        mov     #0xC000,    &DMEM_200
        mov       @r12+,    &DMEM_202
        mov     #0xC001,    &DMEM_200
        mov       @r12+,    &DMEM_202
        mov     #0xC002,    &DMEM_200
        mov     #0x0000,    &DMEM_202

        /* ---------------------- AUTO-INCREMENT: R13 --------------------- */

        mov     #0x0000,    r1
        mov     #0x0000,    r2
        mov     #0x0000,    r3
        mov     #0x0000,    r4
        mov     #0x0000,    r5
        mov     #0x0000,    r6
        mov     #0x0000,    r7
        mov     #0x0000,    r8
        mov     #0x0000,    r9
        mov     #0x0000,    r10
        mov     #0x0000,    r11
        mov     #0x0000,    r12
        mov     #DMEM_21C,  r13
        mov     #0x0000,    r14
        mov     #0x0000,    r15

        mov     #0xD000,    &DMEM_200
        mov       @r13+,    &DMEM_202
        mov     #0xD001,    &DMEM_200
        mov       @r13+,    &DMEM_202
        mov     #0xD002,    &DMEM_200
        mov     #0x0000,    &DMEM_202

        /* ---------------------- AUTO-INCREMENT: R14 --------------------- */

        mov     #0x0000,    r1
        mov     #0x0000,    r2
        mov     #0x0000,    r3
        mov     #0x0000,    r4
        mov     #0x0000,    r5
        mov     #0x0000,    r6
        mov     #0x0000,    r7
        mov     #0x0000,    r8
        mov     #0x0000,    r9
        mov     #0x0000,    r10
        mov     #0x0000,    r11
        mov     #0x0000,    r12
        mov     #0x0000,    r13
        mov     #DMEM_21E,  r14
        mov     #0x0000,    r15

        mov     #0xE000,    &DMEM_200
        mov       @r14+,    &DMEM_202
        mov     #0xE001,    &DMEM_200
        mov       @r14+,    &DMEM_202
        mov     #0xE002,    &DMEM_200
        mov     #0x0000,    &DMEM_202

        /* ---------------------- AUTO-INCREMENT: R15 --------------------- */

        mov     #0x0000,    r1
        mov     #0x0000,    r2
        mov     #0x0000,    r3
        mov     #0x0000,    r4
        mov     #0x0000,    r5
        mov     #0x0000,    r6
        mov     #0x0000,    r7
        mov     #0x0000,    r8
        mov     #0x0000,    r9
        mov     #0x0000,    r10
        mov     #0x0000,    r11
        mov     #0x0000,    r12
        mov     #0x0000,    r13
        mov     #0x0000,    r14
        mov     #DMEM_220,  r15

        mov     #0xF000,    &DMEM_200
        mov       @r15+,    &DMEM_202
        mov     #0xF001,    &DMEM_200
        mov       @r15+,    &DMEM_202
        mov     #0xF002,    &DMEM_200
        mov     #0x0000,    &DMEM_202

        /* ----------------------         END OF TEST        --------------- */
end_of_test:
        nop
        br #0xffff


        /* ----------------------         INTERRUPT VECTORS  --------------- */

.section .vectors, "a"
.word end_of_test  ; Interrupt  0 (lowest priority)    <unused>
.word end_of_test  ; Interrupt  1                      <unused>
.word end_of_test  ; Interrupt  2                      <unused>
.word end_of_test  ; Interrupt  3                      <unused>
.word end_of_test  ; Interrupt  4                      <unused>
.word end_of_test  ; Interrupt  5                      <unused>
.word end_of_test  ; Interrupt  6                      <unused>
.word end_of_test  ; Interrupt  7                      <unused>
.word end_of_test  ; Interrupt  8                      <unused>
.word end_of_test  ; Interrupt  9                      <unused>
.word end_of_test  ; Interrupt 10                      Watchdog timer
.word end_of_test  ; Interrupt 11                      <unused>
.word end_of_test  ; Interrupt 12                      <unused>
.word end_of_test  ; Interrupt 13                      <unused>
.word end_of_test  ; Interrupt 14                      NMI
.word main         ; Interrupt 15 (highest priority)   RESET

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.