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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [wdt_clkmux.s43] - Rev 154
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/*===========================================================================*//* Copyright (C) 2001 Authors *//* *//* This source file may be used and distributed without restriction provided *//* that this copyright statement is not removed from the file and that any *//* derivative work contains the original copyright notice and the associated *//* disclaimer. *//* *//* This source file is free software; you can redistribute it and/or modify *//* it under the terms of the GNU Lesser General Public License as published *//* by the Free Software Foundation; either version 2.1 of the License, or *//* (at your option) any later version. *//* *//* This source is distributed in the hope that it will be useful, but WITHOUT*//* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or *//* FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public *//* License for more details. *//* *//* You should have received a copy of the GNU Lesser General Public License *//* along with this source; if not, write to the Free Software Foundation, *//* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA *//* *//*===========================================================================*//* WATCHDOG TIMER *//*---------------------------------------------------------------------------*//* Test the Watdog timer: *//* - Clock source selection. *//* *//* Author(s): *//* - Olivier Girard, olgirard@gmail.com *//* *//*---------------------------------------------------------------------------*//* $Rev: 141 $ *//* $LastChangedBy: olivier.girard $ *//* $LastChangedDate: 2012-05-05 23:22:06 +0200 (Sat, 05 May 2012) $ *//*===========================================================================*/.include "pmem_defs.asm".global mainWAIT_FUNC:dec r14jnz WAIT_FUNCretmain:/* ------- WATCHDOG TEST INTERVAL MODE /64 - SMCLK /2 ------ */mov #DMEM_250, r1 ;# Initialize stack & Enable interruptseintbis.b #0x01, &IE1mov.b #0x02, &BCSCTL2 ;# SMCLK = MCLK/2mov #0x5a1b, &WDTCTL ;# Enable interval mode /64 & clear countermov #0x0001, r15mov #0x0470, r14call #WAIT_FUNCmov #0x1000, r15mov.b #0x00, &BCSCTL2 ;# SMCLK = MCLK/* ------- WATCHDOG TEST INTERVAL MODE /64 - ACLK ------ */mov #DMEM_250, r1 ;# Initialize stack & Enable interruptseintbis.b #0x01, &IE1mov.b #0x00, &BCSCTL1 ;# ACLK = LFXTCLK/1mov #0x5a1f, &WDTCTL ;# Enable interval mode /64 & clear countermov #0x1001, r15mov #0x1000, r14call #WAIT_FUNCmov #0x2000, r15/* ---------------------- END OF TEST --------------- */end_of_test:nopbr #0xffff/* ---------------------- INTERRUPT ROUTINES --------------- */WDOG_VECTOR:xor #0x0001, r5 ; # Toggle r5[0] for testbench stimulus checkreti/* ---------------------- INTERRUPT VECTORS --------------- */.section .vectors, "a".word end_of_test ; Interrupt 0 (lowest priority) <unused>.word end_of_test ; Interrupt 1 <unused>.word end_of_test ; Interrupt 2 <unused>.word end_of_test ; Interrupt 3 <unused>.word end_of_test ; Interrupt 4 <unused>.word end_of_test ; Interrupt 5 <unused>.word end_of_test ; Interrupt 6 <unused>.word end_of_test ; Interrupt 7 <unused>.word end_of_test ; Interrupt 8 <unused>.word end_of_test ; Interrupt 9 <unused>.word WDOG_VECTOR ; Interrupt 10 Watchdog timer.word end_of_test ; Interrupt 11 <unused>.word end_of_test ; Interrupt 12 <unused>.word end_of_test ; Interrupt 13 <unused>.word end_of_test ; Interrupt 14 NMI.word main ; Interrupt 15 (highest priority) RESET
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