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[/] [openmsp430/] [trunk/] [core/] [synthesis/] [xilinx/] [xst_verilog_spartan6.opt] - Rev 172
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FLOWTYPE = FPGA_SYNTHESIS;
#########################################################
## Filename: xst_verilog.opt
##
## Verilog Option File for XST targeted for speed
## This works for FPGA devices.
##
## Version: 11.1
## $Header: /devl/xcs/repo/env/Jobs/Xflow/data/optionfiles/spartan6_xst_verilog_speed.opt,v 1.1 2008/10/20 23:38:48 rvklair Exp $
#########################################################
#
# Options for XST
#
#
Program xst
-ifn <design>_xst.scr; # input XST script file
-ofn <design>_xst.log; # output XST log file
-intstyle xflow; # Message Reporting Style: ise, xflow, or silent
#
# The options listed under ParamFile are the XST Properties that can be set by the
# user. To turn on an option, uncomment by removing the '#' in front of the switch.
#
ParamFile: <design>_xst.scr
"run";
#
# Global Synthesis Options
#
"-ifn <synthdesign>"; # Input/Project File Name
"-ifmt Verilog"; # Input Format
"-ofn <design>"; # Output File Name
"-ofmt ngc"; # Output File Format
"-p <partname>"; # Target Device
"-opt_level 2"; # Optimization Effort Criteria
# 1 (Normal) or 2 (High)
"-opt_mode SPEED"; # Optimization Criteria
# AREA or SPEED
"-vlgincdir ../src/";
End ParamFile
End Program xst
#
# See XST USER Guide Chapter 8 (Command Line Mode) for all XST options
#
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