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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [synthesis/] [actel/] [design_constraints.pdc] - Rev 82

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#------------------------------------------------------------------------------
# Actel Physical design constraints file
#------------------------------------------------------------------------------

#----------------------#
# I/O constraints      #
# ---------------------#

# CLOCK & RESET
#------------------------------------------------
set_io oscclk              -pinname E4
set_io porst_n             -pinname V7
set_io pbrst_n             -pinname T9


# GPIOA
#------------------------------------------------
set_io din_x               -pinname D5     ;# GPIOA_0
set_io sclk_x              -pinname D6     ;# GPIOA_1
set_io sync_n_x            -pinname D10    ;# GPIOA_2
set_io din_y               -pinname G10    ;# GPIOA_3
set_io sync_n_y            -pinname G11    ;# GPIOA_4
set_io sclk_y              -pinname E11    ;# GPIOA_5


# UART INTERFACE
#------------------------------------------------
set_io uart_rx             -pinname D9
set_io uart_tx             -pinname G9


# SWITCHES & LEDS
#------------------------------------------------
#set_io switch\[0\]         -pinname D18
#set_io switch\[1\]         -pinname D17
#set_io switch\[2\]         -pinname E17
#set_io switch\[3\]         -pinname F16
#set_io switch\[4\]         -pinname D15
#set_io switch\[5\]         -pinname G14
#set_io switch\[6\]         -pinname E14
#set_io switch\[7\]         -pinname F14
#set_io switch\[8\]         -pinname G13
#set_io switch\[9\]         -pinname D14
set_io led\[0\]            -pinname E10
set_io led\[1\]            -pinname F10
set_io led\[2\]            -pinname U8
set_io led\[3\]            -pinname W5
set_io led\[4\]            -pinname U7
set_io led\[5\]            -pinname V6
set_io led\[6\]            -pinname U5
set_io led\[7\]            -pinname U4
set_io led\[8\]            -pinname V4
set_io led\[9\]            -pinname V5
 

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